coreboot-gerrit May 2024

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[XS] Change in coreboot[main]: mb/google/ovis/var/deku: Set TCC_offset to 5
by Sumeet R Pawnikar (Code Review) 24 May '24

24 May '24

Attention is currently required from: Derek Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun, Tony Huang. Sumeet R Pawnikar has posted comments on this change by Tony Huang. ( https://review.coreboot.org/c/coreboot/+/82614?usp=email ) Change subject: mb/google/ovis/var/deku: Set TCC_offset to 5 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I30f54ae6017c54c91ff9b432bba0ebd5bfc65ab9 Gerrit-Change-Number: 82614 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 24 May 2024 05:46:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/trulo: Refactor gpio pad configuration
by Dinesh Gehlot (Code Review) 24 May '24

24 May '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik. Dinesh Gehlot has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/82629?usp=email ) Change subject: mb/google/trulo: Refactor gpio pad configuration ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82629?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ab88ac094a45c608cd894feb5eeec24b867527a Gerrit-Change-Number: 82629 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 24 May 2024 05:44:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/rex/var/deku: Update DPTF parameters
by Sumeet R Pawnikar (Code Review) 24 May '24

24 May '24

Attention is currently required from: Tony Huang. Sumeet R Pawnikar has posted comments on this change by Tony Huang. ( https://review.coreboot.org/c/coreboot/+/82434?usp=email ) Change subject: mb/google/rex/var/deku: Update DPTF parameters ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82434?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I710682771bd0679ae4b44dd43be68f60e8984b2e Gerrit-Change-Number: 82434 Gerrit-PatchSet: 6 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 24 May 2024 05:42:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/nissa: Fix potential null pointer dereference
by Eric Lai (Code Review) 24 May '24

24 May '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/82628?usp=email ) Change subject: mb/google/nissa: Fix potential null pointer dereference ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/mainboard/google/brya/variants/baseboard/nissa/ramstage.c: https://review.coreboot.org/c/coreboot/+/82628/comment/d105eccf_7bb0f674?us… : PS1, Line 19: if (override_pads != NULL) > > As long as the override_num is 0 is fine. […] sure good to have :p -- To view, visit https://review.coreboot.org/c/coreboot/+/82628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I733210a08091b37eda6e6b0d6924aafd5e7e6280 Gerrit-Change-Number: 82628 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 24 May 2024 05:11:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: mb/google/trulo: Refactor gpio pad configuration
by Eric Lai (Code Review) 24 May '24

24 May '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/82629?usp=email ) Change subject: mb/google/trulo: Refactor gpio pad configuration ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82629?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ab88ac094a45c608cd894feb5eeec24b867527a Gerrit-Change-Number: 82629 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 24 May 2024 05:10:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/asus/p8z77-m: Squelch leftover static devices warning
by Keith Hui (Code Review) 24 May '24

24 May '24

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82633?usp=email ) Change subject: mb/asus/p8z77-m: Squelch leftover static devices warning ...................................................................... mb/asus/p8z77-m: Squelch leftover static devices warning [WARN ] PCI: Leftover static devices: [WARN ] PCI: 00:00:01.1 [WARN ] PCI: 00:00:01.2 [WARN ] PCI: 00:00:04.0 [WARN ] PCI: 00:00:06.0 [WARN ] PCI: Check your devicetree.cb. These devices don't exist on this board. Hide them. Change-Id: I75402d338e64f477f40682f796477e8fcb94a4e8 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/82633/1 diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb index b3d05fe..617e224 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb @@ -8,6 +8,10 @@ }" device domain 0 on subsystemid 0x1043 0x84ca inherit + device ref peg11 hidden end # These don't exist on this board + device ref peg12 hidden end + device ref dev4 hidden end + device ref peg60 hidden end chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "gen1_dec" = "0x000c0291" -- To view, visit https://review.coreboot.org/c/coreboot/+/82633?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I75402d338e64f477f40682f796477e8fcb94a4e8 Gerrit-Change-Number: 82633 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82632?usp=email ) Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... sio/nuvoton: Implement a common ramstage ACPI LDN helper With few exceptions, Nuvoton super I/O chips have the same configuration registers. This patch provides a helper function for configuring the ACPI logical device on Nuvoton SIOs, covering system power state after power loss and switching PS/2 port roles between keyboard and mouse, both controllable using nvram options. This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to all that don't have it already. It extends these features to Nuvoton SIOs that currently lack them, with additional improvements: 1. Enable waking up the system from PS/2 keyboard and/or mouse. 2. Establish a known state for "user-defined" power state after power loss: off. This value is not used by coreboot. Inclusion of these helpers are controlled by existing Kconfigs: HAVE_SHARED_PS2_PORT for PS/2 port roles swap, to be set by mainboards. HAVE_POWER_STATE_AFTER_FAILURE for power state after failure. The nvram options have to be added individually to mainboards. TEST=Both features boot tested on asus/p8z77-m which uses sio/nuvoton/nct6779d. Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/Makefile.mk A src/superio/nuvoton/common/common.c A src/superio/nuvoton/common/common.h M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6776/Kconfig M src/superio/nuvoton/nct6776/superio.c M src/superio/nuvoton/nct6779d/Kconfig M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/nct6791d/Kconfig M src/superio/nuvoton/nct6791d/superio.c 10 files changed, 110 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/1 diff --git a/src/superio/nuvoton/Makefile.mk b/src/superio/nuvoton/Makefile.mk index 570102a..b4645e7 100644 --- a/src/superio/nuvoton/Makefile.mk +++ b/src/superio/nuvoton/Makefile.mk @@ -3,6 +3,8 @@ ## include generic nuvoton pre-ram stage driver bootblock-$(CONFIG_SUPERIO_NUVOTON_COMMON_PRE_RAM) += common/early_serial.c romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_PRE_RAM) += common/early_serial.c +## include generic nuvoton helper +ramstage-y += common/common.c subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d diff --git a/src/superio/nuvoton/common/common.c b/src/superio/nuvoton/common/common.c new file mode 100644 index 0000000..ca1d0b4 --- /dev/null +++ b/src/superio/nuvoton/common/common.c @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * Configuration routines common to Nuvoton NCT67xx SIO chips. + * Also covers 5572. + * + * Do not use for NCT6687D; some registers are in different places. + */ + +#include <stdint.h> +#include <console/console.h> +#include <device/device.h> +#include <device/pnp.h> +#include <option.h> +#include "common.h" + +#define POWER_LOSS_CONTROL_SHIFT 5 +#define POWER_LOSS_CONTROL_MASK (3 << POWER_LOSS_CONTROL_SHIFT) + +/* CR 0xe6 */ +#define ENMDAT_UP (1 << 7) +#define CASEOPEN0_CLEAR (1 << 5) +#define POWER_LOSS_LAST_STATE (1 << 4) /* 1=off */ +#define PWROK_TRIG (1 << 0) /* We keep this low */ +/* CR 0xe0 */ +#define KB_WAKEUP_PSOUT (1 << 6) +#define MS_WAKEUP_PSOUT (1 << 5) +#define KBD_MS_SWAP (1 << 2) +#define MSXKEY (1 << 1) +#define KBXKEY (1 << 0) +/* CR 0xe4 */ +#define EN_3VSBSW (1 << 4) /* Power RAM in S3; required for S3 suspend */ +#define KB_WAKEUP_ANYKEY (1 << 3) /* Keyboard wakeup: any key */ + +void nct677x_configure_acpi_ldn(struct device *dev) +{ + uint8_t byte; + + pnp_enter_conf_mode(dev); + pnp_set_logical_device(dev); + + /* Set power state after power fail */ + /* Important: Make sure the definitions in mainboard/Kconfig around + * MAINBOARD_POWER_FAILURE_STATE and your board's cmos.layout match. + * And if MAINBOARD_POWER_FAILURE_STATE deviates from the chip's + * expectation (ie. 0=off, 1=on, 2=keep), this code must be adapted. + */ + if (CONFIG(HAVE_POWER_STATE_AFTER_FAILURE)) { + unsigned int power_status = get_uint_option("power_on_after_fail", + CONFIG_MAINBOARD_POWER_FAILURE_STATE) & 3; + /* TODO: Show proper message for "keep". */ + printk(BIOS_INFO, "set power %s after power fail\n", + power_status ? "on" : "off"); + byte = (power_status << POWER_LOSS_CONTROL_SHIFT); + } else + byte = 0; + + byte |= (KB_WAKEUP_ANYKEY | EN_3VSBSW); + + pnp_unset_and_set_config(dev, 0xe4, POWER_LOSS_CONTROL_MASK, byte); + + /* Allow PS/2 mouse wake up + * Clear case open pin 0 status. + * Set user-defined power state to "off" just in case. + */ + pnp_unset_and_set_config(dev, 0xe6, PWROK_TRIG, + ENMDAT_UP | CASEOPEN0_CLEAR | POWER_LOSS_LAST_STATE); + + /* Keyboard wakeup: any key (TODO: Check if KB_WAKEUP_PSOUT is needed) + * Mouse wakeup: any button or movement + */ + byte = (KBXKEY | MSXKEY); + + /* Swap keyboard and mouse port roles if requested by nvram option */ + if (CONFIG(HAVE_SHARED_PS2_PORT) && get_uint_option("swap_keyboard_and_mouse", 0)) + byte |= KBD_MS_SWAP; + + pnp_unset_and_set_config(dev, 0xe0, KBD_MS_SWAP, byte); + + pnp_exit_conf_mode(dev); +} diff --git a/src/superio/nuvoton/common/common.h b/src/superio/nuvoton/common/common.h new file mode 100644 index 0000000..648173e --- /dev/null +++ b/src/superio/nuvoton/common/common.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef SUPERIO_NUVOTON_COMMON_H +#define SUPERIO_NUVOTON_COMMON_H + +#include <device/pnp_type.h> + +void nct677x_configure_acpi_ldn(struct device *dev); + +#endif /* SUPERIO_NUVOTON_COMMON_H */ diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c index 34fa016..000d1d3 100644 --- a/src/superio/nuvoton/nct5572d/superio.c +++ b/src/superio/nuvoton/nct5572d/superio.c @@ -45,20 +45,7 @@ } break; case NCT5572D_ACPI: - /* Set power state after power fail */ - power_status = get_uint_option("power_on_after_fail", - CONFIG_MAINBOARD_POWER_FAILURE_STATE); - pnp_enter_conf_mode(dev); - pnp_set_logical_device(dev); - byte = pnp_read_config(dev, 0xe4); - byte &= ~0x60; - if (power_status == MAINBOARD_POWER_ON) - byte |= (0x1 << 5); - else if (power_status == MAINBOARD_POWER_KEEP) - byte |= (0x2 << 5); - pnp_write_config(dev, 0xe4, byte); - pnp_exit_conf_mode(dev); - printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off"); + nct677x_configure_acpi_ldn(dev); break; } } diff --git a/src/superio/nuvoton/nct6776/Kconfig b/src/superio/nuvoton/nct6776/Kconfig index 9f5e084..7a4478a 100644 --- a/src/superio/nuvoton/nct6776/Kconfig +++ b/src/superio/nuvoton/nct6776/Kconfig @@ -3,3 +3,5 @@ config SUPERIO_NUVOTON_NCT6776 bool select SUPERIO_NUVOTON_COMMON_PRE_RAM + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE diff --git a/src/superio/nuvoton/nct6776/superio.c b/src/superio/nuvoton/nct6776/superio.c index d98e303..09f5cd5 100644 --- a/src/superio/nuvoton/nct6776/superio.c +++ b/src/superio/nuvoton/nct6776/superio.c @@ -19,6 +19,9 @@ case NCT6776_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; + case NCT6776_ACPI: + nct677x_configure_acpi_ldn(dev); + break; } } diff --git a/src/superio/nuvoton/nct6779d/Kconfig b/src/superio/nuvoton/nct6779d/Kconfig index ce2af16..f60cf1c 100644 --- a/src/superio/nuvoton/nct6779d/Kconfig +++ b/src/superio/nuvoton/nct6779d/Kconfig @@ -3,3 +3,5 @@ config SUPERIO_NUVOTON_NCT6779D bool select SUPERIO_NUVOTON_COMMON_PRE_RAM + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c index 1360476..41f9203 100644 --- a/src/superio/nuvoton/nct6779d/superio.c +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -4,6 +4,7 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> +#include <superio/nuvoton/common/common.h> #include "nct6779d.h" @@ -17,6 +18,9 @@ case NCT6779D_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; + case NCT6779D_ACPI: + nct677x_configure_acpi_ldn(dev); + break; } } diff --git a/src/superio/nuvoton/nct6791d/Kconfig b/src/superio/nuvoton/nct6791d/Kconfig index a536491..f7d8a33 100644 --- a/src/superio/nuvoton/nct6791d/Kconfig +++ b/src/superio/nuvoton/nct6791d/Kconfig @@ -3,3 +3,5 @@ config SUPERIO_NUVOTON_NCT6791D bool select SUPERIO_NUVOTON_COMMON_PRE_RAM + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE diff --git a/src/superio/nuvoton/nct6791d/superio.c b/src/superio/nuvoton/nct6791d/superio.c index 91a3908..cc55d7f 100644 --- a/src/superio/nuvoton/nct6791d/superio.c +++ b/src/superio/nuvoton/nct6791d/superio.c @@ -17,6 +17,9 @@ case NCT6791D_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; + case NCT6791D_ACPI: + nct677x_configure_acpi_ldn(dev); + break; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com>

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[S] Change in coreboot[main]: sio/nuvoton: Add Kconfig for shared PS/2 port
by Keith Hui (Code Review) 24 May '24

24 May '24

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82631?usp=email ) Change subject: sio/nuvoton: Add Kconfig for shared PS/2 port ...................................................................... sio/nuvoton: Add Kconfig for shared PS/2 port Introduce HAVE_SHARED_PS2_PORT Kconfig for this Super I/O to have mainboards indicate if they have one shared PS/2 port on the rear panel. On these boards (where a Y-cable cannot allow both keyboard and mouse to work off the same port), if a PS/2 keyboard is not present, SIO should be configured to swap its role to mouse, to allow the OS to find and initialize any mouse connected. For starter, add this Kconfig to all variants of asus/p8x7x-series where the official owners manual indicate such a port. Supporting code will come in a separate patch. Idea is to condition them on this Kconfig. Change-Id: I156b15c6ba233cbe8b9ba4d2cfbca6836ad7483a Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/Kconfig M src/superio/nuvoton/common/Kconfig 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/82631/1 diff --git a/src/mainboard/asus/p8x7x-series/Kconfig b/src/mainboard/asus/p8x7x-series/Kconfig index e278b56..6ae529c 100644 --- a/src/mainboard/asus/p8x7x-series/Kconfig +++ b/src/mainboard/asus/p8x7x-series/Kconfig @@ -25,6 +25,7 @@ select BOARD_ROMSIZE_KB_8192 select SUPERIO_NUVOTON_NCT6779D select USE_NATIVE_RAMINIT + select HAVE_SHARED_PS2_PORT config BOARD_ASUS_P8Z77_M_PRO select BOARD_ASUS_P8X7X_SERIES @@ -32,6 +33,7 @@ select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA select MEMORY_MAPPED_TPM select SUPERIO_NUVOTON_NCT6779D + select HAVE_SHARED_PS2_PORT config BOARD_ASUS_P8Z77_V_LX2 select BOARD_ASUS_P8X7X_SERIES @@ -48,6 +50,7 @@ select MAINBOARD_USES_IFD_GBE_REGION select SUPERIO_NUVOTON_NCT6779D select USE_NATIVE_RAMINIT + select HAVE_SHARED_PS2_PORT config BOARD_ASUS_P8Z77_M select BOARD_ASUS_P8X7X_SERIES @@ -55,6 +58,7 @@ select MEMORY_MAPPED_TPM select SUPERIO_NUVOTON_NCT6779D select SUPERIO_NUVOTON_COMMON_COM_A + select HAVE_SHARED_PS2_PORT if BOARD_ASUS_P8X7X_SERIES diff --git a/src/superio/nuvoton/common/Kconfig b/src/superio/nuvoton/common/Kconfig index ffb6208..c24fd9c 100644 --- a/src/superio/nuvoton/common/Kconfig +++ b/src/superio/nuvoton/common/Kconfig @@ -11,3 +11,10 @@ help When enabled, the 'nuvoton_enable_serial()' function will unset global CR 0x2a bit 7 to route COM A to the GPIO8 pin group. + +config HAVE_SHARED_PS2_PORT + bool + depends on SUPERIO_NUVOTON_COMMON_PRE_RAM + help + Select this option if your mainboard has a single PS/2 port for both keyboard and + mouse. Add an nvram option to cmos.layout for PS/2 mouse support. -- To view, visit https://review.coreboot.org/c/coreboot/+/82631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156b15c6ba233cbe8b9ba4d2cfbca6836ad7483a Gerrit-Change-Number: 82631 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com>

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[S] Change in coreboot[main]: mb/asus/p8x7x-series: Enable keyboard/mouse swap option
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Keith Hui, Nico Huber. Hello Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81885?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Nico Huber, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: mb/asus/p8x7x-series: Enable keyboard/mouse swap option ...................................................................... mb/asus/p8x7x-series: Enable keyboard/mouse swap option Enabled by commit xxxxxxxxxxxx ("sio/nuvoton: Implement a common ramstage ACPI LDN helper"). TEST=On p8z77-m, PS/2 mouse (Logitech M-S48) works with option turned on. PS/2 keyboard (IBM Model M #1391401 and Microsoft Natural gen 1) still works with option turned off. Change-Id: I21b73da99168e751b1a23485d4b1695963f9eef5 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/variants/p8h77-v/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8h77-v/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-m/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-m/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/cmos.layout 8 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/81885/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21b73da99168e751b1a23485d4b1695963f9eef5 Gerrit-Change-Number: 81885 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/nissa: Fix potential null pointer dereference
by Dinesh Gehlot (Code Review) 24 May '24

24 May '24

Attention is currently required from: Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Dinesh Gehlot has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/82628?usp=email ) Change subject: mb/google/nissa: Fix potential null pointer dereference ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I733210a08091b37eda6e6b0d6924aafd5e7e6280 Gerrit-Change-Number: 82628 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 24 May 2024 04:17:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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