Attention is currently required from: Fabian Groffen, Keith Hui.
Keith Hui has uploaded a new patch set (#5) to the change originally created by Fabian Groffen. ( https://review.coreboot.org/c/coreboot/+/75144?usp=email )
The change is no longer submittable: Code-Review is unsatisfied now.
Change subject: mb/asus/p8z77-m: Disable WDT1
......................................................................
mb/asus/p8z77-m: Disable WDT1
WDT1 is currently enabled but gives these errors:
[ERROR] ERROR: Resource didn't fit!!!
PNP: 002e.8 60 * size: 0x8 limit: fff io
[ERROR] PNP: 002e.8 60 io size: 0x0000000008 not assigned in devicetree
Therefore, just disable it, like it is disabled on all other variants.
Signed-off-by: Fabian Groffen <grobian(a)gentoo.org>
Change-Id: Ie33c219eae60f55d272b261480283a02c2d502e5
---
M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/75144/5
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Change subject: mb/google/brya: Enable UFS driver for edk2 payload
......................................................................
Patch Set 1: Code-Review+2
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Change subject: include: Add 'IWYU pragma: export' comment
......................................................................
Patch Set 3: Code-Review+2
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Change subject: drivers/i2c/generic: Add i2c_generic_write_gpio for public
......................................................................
Patch Set 1:
(1 comment)
File src/drivers/i2c/generic/generic.c:
https://review.coreboot.org/c/coreboot/+/81788/comment/ed9fbc92_9a614782 :
PS1, Line 31: int i2c_generic_write_gpio(struct acpi_gpio *gpio, int *curr_index)
: {
: int ret = -1;
:
: if (gpio->pin_count == 0)
: return ret;
:
: acpi_device_write_gpio(gpio);
: ret = *curr_index;
: (*curr_index)++;
:
: return ret;
: }
> I think this function can be copied to the new driver instead of making it public. […]
If you consider the name we can change it. Or move to acpi.c or somewhere else.
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I'd like you to reexamine a change. Please visit
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Change subject: mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City
......................................................................
mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City
Beechnut City CRB is the 2 socket reference board for 6th Gen Xeon-SP
SP SoCs (Granite Rapids SP and Sierra Forest SP).
This patch initially sets the code set up as a compilation target with
GNR N-1 FSP, and with basic feature supports (Integrated IO Controller
(IIO) configuration, BMC, UART, HPET).
TEST=Build and boot on intel/archercity CRB
TEST=Build on intel/beechnutcity CRB
Change-Id: I3f6a0fb97b62baadb438fb9f11fdd78fccb3f89a
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
---
A configs/builder/config.intel.crb.bnc
A src/mainboard/intel/beechnutcity_crb/Kconfig
A src/mainboard/intel/beechnutcity_crb/Kconfig.name
A src/mainboard/intel/beechnutcity_crb/Makefile.mk
A src/mainboard/intel/beechnutcity_crb/board.fmd
A src/mainboard/intel/beechnutcity_crb/board_info.txt
A src/mainboard/intel/beechnutcity_crb/bootblock.c
A src/mainboard/intel/beechnutcity_crb/config/iio.c
A src/mainboard/intel/beechnutcity_crb/devicetree.cb
A src/mainboard/intel/beechnutcity_crb/dsdt.asl
A src/mainboard/intel/beechnutcity_crb/ramstage.c
A src/mainboard/intel/beechnutcity_crb/romstage.c
12 files changed, 261 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/81322/16
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Change subject: mb/intel/avenuecity_crb: Add GNR/SRF-AP 2S server board Avenue City
......................................................................
mb/intel/avenuecity_crb: Add GNR/SRF-AP 2S server board Avenue City
Avenue City CRB is the 2 socket reference board for 6th Gen Xeon-SP
AP SoCs (Granite Rapids AP and Sierra Forest AP).
This patch initially sets the code set up as a compilation target
with GNR N-1 FSP, and with basic feature supports (Integrated IO
Controller (IIO) configuration, BMC, UART, HPET).
TEST=Build and boot on intel/archercity CRB
TEST=Build on intel/avenuecity CRB
Change-Id: I64fdd5388aadf7732f6d3daa600c1455d3672a46
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Jincheng Li <jincheng.li(a)intel.com>
---
A configs/builder/config.intel.crb.avc
A src/mainboard/intel/avenuecity_crb/Kconfig
A src/mainboard/intel/avenuecity_crb/Kconfig.name
A src/mainboard/intel/avenuecity_crb/Makefile.mk
A src/mainboard/intel/avenuecity_crb/board.fmd
A src/mainboard/intel/avenuecity_crb/board_info.txt
A src/mainboard/intel/avenuecity_crb/bootblock.c
A src/mainboard/intel/avenuecity_crb/config/iio.c
A src/mainboard/intel/avenuecity_crb/devicetree.cb
A src/mainboard/intel/avenuecity_crb/dsdt.asl
A src/mainboard/intel/avenuecity_crb/ramstage.c
A src/mainboard/intel/avenuecity_crb/romstage.c
12 files changed, 261 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/81319/39
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Change subject: soc/intel/xeon_sp/gnr: Add IIO config utils
......................................................................
soc/intel/xeon_sp/gnr: Add IIO config utils
Add IIO configuration utils shared in GNR boards to handle the
complex IIO configuration settings.
TEST=Build and boot on intel/archercity CRB
Change-Id: If7146761db6f73a0c4b0d31b010c0d30a42bf690
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
---
M src/soc/intel/xeon_sp/gnr/Makefile.inc
A src/soc/intel/xeon_sp/gnr/include/soc/iio.h
A src/soc/intel/xeon_sp/gnr/soc_iio.c
3 files changed, 200 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/81318/36
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Change subject: soc/intel/xeon_sp/gnr: Use OCP_VPD drivers
......................................................................
soc/intel/xeon_sp/gnr: Use OCP_VPD drivers
Use OCP_VPD driver provided functions to get VPD value.
TEST=Build and boot on intel/archercity CRB
Change-Id: Ifeca8cf4312ab66ca03188fe25af88a952073130
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
Signed-off-by: Jincheng Li <jincheng.li(a)intel.com>
---
M src/soc/intel/xeon_sp/gnr/Kconfig
M src/soc/intel/xeon_sp/gnr/chip.h
M src/soc/intel/xeon_sp/gnr/romstage.c
3 files changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/81317/34
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