coreboot-gerrit March 2024

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[L] Change in coreboot[main]: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Felix Singer, Matt DeVillier, Nicholas Chin. Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81368?usp=email ) Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ...................................................................... Patch Set 4: (14 comments) File Documentation/mainboard/hp/pro_3500_series.md: https://review.coreboot.org/c/coreboot/+/81368/comment/9dfe2c02_911fd010 : PS3, Line 17: eval_rst > Should be `{eval-rst}` after commit 35599f9a66 (Docs: Replace Recommonmark with MyST Parser) Done FYI I noticed there is a number of places which still have "```eval_rst", should I open a ticket about them? https://review.coreboot.org/c/coreboot/+/81368/comment/1b7bcfc5_5a148bd2 : PS3, Line 85: eval_rst > `{eval-rst}` Done https://review.coreboot.org/c/coreboot/+/81368/comment/1447c651_5846341d : PS3, Line 93: E > Remove "E" after "IT". I.e. […] Done File src/mainboard/hp/pro_3500_series/Kconfig: https://review.coreboot.org/c/coreboot/+/81368/comment/2e640515_f48623e5 : PS3, Line 11: select INTEL_INT15 > See my comment for mainboard. […] Done File src/mainboard/hp/pro_3500_series/Makefile.mk: https://review.coreboot.org/c/coreboot/+/81368/comment/16758b8d_e50b2848 : PS3, Line 11: bootblock-y += led.c > Move to the other bootblock lines Done File src/mainboard/hp/pro_3500_series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/81368/comment/f43435ef_24426250 : PS3, Line 4: register "gpu_dp_b_hotplug" = "0" : register "gpu_dp_c_hotplug" = "0" : register "gpu_dp_d_hotplug" = "0" > Set to 0 by default, remove Done https://review.coreboot.org/c/coreboot/+/81368/comment/cff74d1f_5f3922ae : PS3, Line 15: # Host bridge Host bridge > Remove superfluous comment Done https://review.coreboot.org/c/coreboot/+/81368/comment/fd938fcd_a6ae369d : PS3, Line 19: chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH > Remove devices which are set to off, as their config is equal to chipset devicetree. Done https://review.coreboot.org/c/coreboot/+/81368/comment/0f54399d_87dbbec7 : PS3, Line 22: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" > All set to 0, remove Done https://review.coreboot.org/c/coreboot/+/81368/comment/2202cdda_8db6ab57 : PS3, Line 50: subsystemid 0x103c 0x2abf > Can remove, already covered by the `subsystemid 0x103c 0x2abf inherit` earlier Done File src/mainboard/hp/pro_3500_series/dsdt.asl: https://review.coreboot.org/c/coreboot/+/81368/comment/c1a3f45f_f69f673c : PS3, Line 14: /* OEM revision */ > Remove comment Done File src/mainboard/hp/pro_3500_series/mainboard.c: https://review.coreboot.org/c/coreboot/+/81368/comment/d01a0071_72295ecb : PS2, Line 9: * FIXME: untested. */ > Well the board boots with libgfxinit but so do others and they keep it as well. […] Done File src/mainboard/hp/pro_3500_series/mainboard.c: PS3: > The INT15 handler is only needed when the proprietary VGA bios is used. […] Done File src/mainboard/hp/pro_3500_series/smihandler.c: https://review.coreboot.org/c/coreboot/+/81368/comment/c027d73f_fcc19a51 : PS3, Line 12: */ > No need for multiline comment, just use single line format Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81368?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Gerrit-Change-Number: 81368 Gerrit-PatchSet: 4 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sun, 24 Mar 2024 16:19:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Joel Linn <jl_coreboot(a)conductive.de> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add four new USB currents
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Paul Menzel. Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81427?usp=email ) Change subject: sb/intel/bd82x6x: Add four new USB currents ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81427/comment/de2e4673_0d1db2fb : PS1, Line 7: Add new USB currents > Add *four* new USB currents Done https://review.coreboot.org/c/coreboot/+/81427/comment/5322d166_1e1bfa13 : PS1, Line 9: vendor firmware > Please also document the version. Done https://review.coreboot.org/c/coreboot/+/81427/comment/c086d350_85af31f0 : PS1, Line 9: Found > I mean, what tool (inteltool(?)) or command did you run to get these values. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 2 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 24 Mar 2024 16:18:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: superio/ite: Add special fan vectors and further options
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Matt DeVillier, Nico Huber. Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81426?usp=email ) Change subject: superio/ite: Add special fan vectors and further options ...................................................................... Patch Set 2: (6 comments) File src/superio/ite/common/env_ctrl.c: https://review.coreboot.org/c/coreboot/+/81426/comment/6e9d4e25_4c0a999f : PS1, Line 128: } > Actually more like `__pnp_002e_04->chip_info` and needs a cast, so probably […] Thanks, I was looking for this but it was not obvious and I had no responses on IRC so I kinda gave up. Done https://review.coreboot.org/c/coreboot/+/81426/comment/3d73820e_94bd29a6 : PS1, Line 274: s8 slope = conf->slope; : bool slope_neg = slope < 0; > Both should be `const` to show the intention. Done https://review.coreboot.org/c/coreboot/+/81426/comment/a1b870d9_f21b75ce : PS1, Line 369: #endif > If trying the 0 array length (see comment in `env_ctrl_chip.h`), this should […] Done File src/superio/ite/common/env_ctrl_chip.h: https://review.coreboot.org/c/coreboot/+/81426/comment/8c6252ba_3adee81a : PS1, Line 106: #endif > As odd as it may seem, GCC accepts a `[0]` here (hopefully clang too). This […] Done File src/superio/ite/common/ite.h: https://review.coreboot.org/c/coreboot/+/81426/comment/895e1fcb_0d0e38ca : PS1, Line 21: void ite_pme_out_disable(pnp_devfn_t dev); > The other APIs above have the verb first. So how about […] Done https://review.coreboot.org/c/coreboot/+/81426/comment/86ecb6b8_363675f1 : PS1, Line 26: #define ite_disable_3vsbsw(dev) ite_set_3vsbsw((dev), false) > Inline functions are preferred. e.g. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81426?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93df2b5652fc3fde775b6161fa5bebc4a34d5e94 Gerrit-Change-Number: 81426 Gerrit-PatchSet: 2 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Sun, 24 Mar 2024 16:18:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: superio/ite: Unify it8772f with common code
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Matt DeVillier, Michał Żygowski, MrChromebox, Nico Huber, Piotr Król. Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81310?usp=email ) Change subject: superio/ite: Unify it8772f with common code ...................................................................... Patch Set 5: (10 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81310/comment/15e022bf_303fe69c : PS4, Line 7: it8722f > it87*7*2f Done https://review.coreboot.org/c/coreboot/+/81310/comment/3847aa89_aa99bc38 : PS4, Line 9: it8722f > it87*7*2f Done File src/mainboard/google/beltino/devicetree.cb: https://review.coreboot.org/c/coreboot/+/81310/comment/3fb18ed4_d791fc13 : PS4, Line 86: register "FAN2.mode" = "FAN_SMART_SOFTWARE" > IIUC, the old code would have left the PWM signal at 0% (datasheet […] Yes, until the OS picks up fans will run at 50%. We could set it to 1% (as setting 0% would trigger the default value of 50% without further changes) but I am not sure if it's ok for the fan to be driven so low. File src/superio/ite/common/env_ctrl.c: https://review.coreboot.org/c/coreboot/+/81310/comment/dbdfcffc_8ab50d38 : PS4, Line 84: * > As by our coding style, no leading asterisk in the short comment form. e.g. […] Done https://review.coreboot.org/c/coreboot/+/81310/comment/1fe2b9d2_d68b4588 : PS4, Line 86: reg != reg_new) { > Line break isn't needed, as we allow ~96 chars per line. Done https://review.coreboot.org/c/coreboot/+/81310/comment/a935cf06_99c545ca : PS4, Line 110: break; > Shouldn't we `return` here? […] Done https://review.coreboot.org/c/coreboot/+/81310/comment/8d3f4605_d758f697 : PS4, Line 186: if (!CONFIG(SUPERIO_ITE_IT8772F)) { > We shouldn't check for specific chips in common code. This should be a […] Done https://review.coreboot.org/c/coreboot/+/81310/comment/f8522c96_cbdaf3d2 : PS4, Line 313: if (CONFIG(SUPERIO_ITE_IT8772F)) { Note: I will remove this in the next patchset because contrary to the documentation which reserves these bits, they are enabled in the vendor firmware and seem to report some voltage with the it87 linux driver. File src/superio/ite/it8728f/Kconfig: https://review.coreboot.org/c/coreboot/+/81310/comment/147fe6e6_be7d3c54 : PS4, Line 8: select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG > I see the bits are reserved in the datasheet. But this should definitely […] Done https://review.coreboot.org/c/coreboot/+/81499 File src/superio/ite/it8772f/superio.c: https://review.coreboot.org/c/coreboot/+/81310/comment/4b4add7c_5b4c3357 : PS4, Line 26: conf = dev->chip_info; > It's already initialized like this. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81310?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6 Gerrit-Change-Number: 81310 Gerrit-PatchSet: 5 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Sun, 24 Mar 2024 16:15:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier. Hello Matt DeVillier, Nicholas Chin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81368?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ...................................................................... mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) This is another readily available (used market) system. Based on autoport. All peripherals should work. Automatic fan control as well as S3 are working. The board was tested to boot Linux and Windows. EHCI debug is untested. When using MrChromebox edk2 with secure boot build in, the board will hang on each boot for about 20 seconds before continuing. There are some quirks for doing the first flash, see the documentation. Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Signed-off-by: Joel Linn <jl(a)conductive.de> --- A Documentation/mainboard/hp/pro_3500_series.md A Documentation/mainboard/hp/pro_3500_series_flash.avif A Documentation/mainboard/hp/pro_3500_series_jumper.avif M Documentation/mainboard/index.md A src/mainboard/hp/pro_3500_series/Kconfig A src/mainboard/hp/pro_3500_series/Kconfig.name A src/mainboard/hp/pro_3500_series/Makefile.mk A src/mainboard/hp/pro_3500_series/acpi/ec.asl A src/mainboard/hp/pro_3500_series/acpi/platform.asl A src/mainboard/hp/pro_3500_series/acpi/superio.asl A src/mainboard/hp/pro_3500_series/acpi_tables.c A src/mainboard/hp/pro_3500_series/board_info.txt A src/mainboard/hp/pro_3500_series/common_defines.h A src/mainboard/hp/pro_3500_series/data.vbt A src/mainboard/hp/pro_3500_series/devicetree.cb A src/mainboard/hp/pro_3500_series/dsdt.asl A src/mainboard/hp/pro_3500_series/early_init.c A src/mainboard/hp/pro_3500_series/gma-mainboard.ads A src/mainboard/hp/pro_3500_series/gpio.c A src/mainboard/hp/pro_3500_series/hda_verb.c A src/mainboard/hp/pro_3500_series/led.c A src/mainboard/hp/pro_3500_series/led.h A src/mainboard/hp/pro_3500_series/mainboard.c A src/mainboard/hp/pro_3500_series/smihandler.c 24 files changed, 710 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/81368/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81368?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Gerrit-Change-Number: 81368 Gerrit-PatchSet: 4 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add four new USB currents
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Joel Linn, Paul Menzel. Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81427?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: sb/intel/bd82x6x: Add four new USB currents ...................................................................... sb/intel/bd82x6x: Add four new USB currents Found by inteltool on HP Pro 3500 Series running vendor firmware version 8.14 Rev.A. Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Signed-off-by: Joel Linn <jl(a)conductive.de> --- M src/southbridge/intel/bd82x6x/early_usb.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/81427/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 2 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: superio/ite: Add special fan vectors and further options
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier. Hello Matt DeVillier, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81426?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: superio/ite: Add special fan vectors and further options ...................................................................... superio/ite: Add special fan vectors and further options A number of ITE SIOs support "special fan control vectors", which effectively allow non-linear fan speed control. This is for example used by the vendor firmware of the "HP Pro 3500 Series". The 3VSBSW# signal can now also be disabled again which is necessary to power components down properly in SMM when entering S5. A function to disable the PME# output was added as well. Change-Id: I93df2b5652fc3fde775b6161fa5bebc4a34d5e94 Signed-off-by: Joel Linn <jl(a)conductive.de> --- M src/superio/ite/Makefile.mk M src/superio/ite/common/Kconfig M src/superio/ite/common/early_serial.c M src/superio/ite/common/env_ctrl.c M src/superio/ite/common/env_ctrl.h M src/superio/ite/common/env_ctrl_chip.h M src/superio/ite/common/ite.h M src/superio/ite/it8728f/Kconfig M src/superio/ite/it8772f/Kconfig 9 files changed, 125 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81426/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81426?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93df2b5652fc3fde775b6161fa5bebc4a34d5e94 Gerrit-Change-Number: 81426 Gerrit-PatchSet: 2 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: superio/ite: Unify it8772f with common code
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier, Michał Żygowski, MrChromebox, Nico Huber, Piotr Król. Hello Matt DeVillier, Michał Żygowski, MrChromebox, Nico Huber, Piotr Król, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81310?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins) Change subject: superio/ite: Unify it8772f with common code ...................................................................... superio/ite: Unify it8772f with common code The it8772f is now configured by the much better common code that is used for other chips in the family as well. This mainly concerns the EC, the GPIO functionality was not moved to common as it currently lacks a sane abstraction in any codebase. The datasheets of the it8772e(f) and it8728f (for reference) were studied and verified against the common code, adding exceptions where needed. Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6 Signed-off-by: Joel Linn <jl(a)conductive.de> --- M src/mainboard/google/beltino/bootblock.c M src/mainboard/google/beltino/devicetree.cb M src/mainboard/google/beltino/onboard.h M src/mainboard/google/jecht/bootblock.c M src/mainboard/google/jecht/devicetree.cb M src/mainboard/google/jecht/onboard.h M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/samsung/stumpy/devicetree.cb M src/mainboard/samsung/stumpy/early_init.c M src/mainboard/samsung/stumpy/smihandler.c M src/superio/ite/common/Kconfig M src/superio/ite/common/early_serial.c M src/superio/ite/common/env_ctrl.c M src/superio/ite/common/ite.h M src/superio/ite/it8613e/Kconfig M src/superio/ite/it8623e/Kconfig M src/superio/ite/it8629e/Kconfig M src/superio/ite/it8718f/Kconfig M src/superio/ite/it8720f/Kconfig M src/superio/ite/it8721f/Kconfig M src/superio/ite/it8728f/Kconfig M src/superio/ite/it8772f/Kconfig M src/superio/ite/it8772f/chip.h M src/superio/ite/it8772f/early_init.c M src/superio/ite/it8772f/it8772f.h M src/superio/ite/it8772f/superio.c M src/superio/ite/it8783ef/Kconfig M src/superio/ite/it8784e/Kconfig M src/superio/ite/it8786e/Kconfig 29 files changed, 92 insertions(+), 331 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/81310/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/81310?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6 Gerrit-Change-Number: 81310 Gerrit-PatchSet: 5 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Attention: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Move domain resources adding to their creation
by Shuo Liu (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu. Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81435?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_sp: Move domain resources adding to their creation ...................................................................... soc/intel/xeon_sp: Move domain resources adding to their creation Domain resources adding is moved from read_resources to domain creation so that late HOB lookup could be avoided. TEST=intel/archercity CRB Change-Id: Iba58dc9ac1d2e7d07004ee2bb0cc76b273d37e99 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/chip_gen1.c M src/soc/intel/xeon_sp/chip_gen6.c M src/soc/intel/xeon_sp/include/soc/chip_common.h 4 files changed, 25 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/81435/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81435?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iba58dc9ac1d2e7d07004ee2bb0cc76b273d37e99 Gerrit-Change-Number: 81435 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: superio/ite: Disable 16-bit tacho counters for IT8728F
by Joel Linn (Code Review) 24 Mar '24

24 Mar '24

Joel Linn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81499?usp=email ) Change subject: superio/ite: Disable 16-bit tacho counters for IT8728F ...................................................................... superio/ite: Disable 16-bit tacho counters for IT8728F According to the datasheet, these are not supported on this model. Change-Id: If65b2cab249144ae85e2bc9023f16b73106262df Signed-off-by: Joel Linn <jl(a)conductive.de> --- M src/superio/ite/it8728f/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/81499/1 diff --git a/src/superio/ite/it8728f/Kconfig b/src/superio/ite/it8728f/Kconfig index 6d02c0b..2f9be8d 100644 --- a/src/superio/ite/it8728f/Kconfig +++ b/src/superio/ite/it8728f/Kconfig @@ -5,7 +5,6 @@ select SUPERIO_ITE_COMMON_PRE_RAM select SUPERIO_ITE_ENV_CTRL select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 - select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_5FANS select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG -- To view, visit https://review.coreboot.org/c/coreboot/+/81499?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If65b2cab249144ae85e2bc9023f16b73106262df Gerrit-Change-Number: 81499 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: newchange

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