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Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
Patch Set 7: Code-Review+1
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Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
all failed case in https://qa.coreboot.org/job/coreboot-gerrit/252630/#showFailuresLink is about SKX
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Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
However, SKX is not covered, because some undergoing activities is on to drop SKX
(https://review.coreboot.org/c/coreboot/+/80172).
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Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS6:
Below regex pattern is used to make sure no FSP header reference is left in Xeon-SP common codes.
grep -E "<[A-Z][a-z]+[A-Za-z]+.h>" src/ -r
grep -E "<hob_.+.h>" src/ -r
grep -E "<defs_.+.h>" src/ -r
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Hello Andrey Petrov, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80684?usp=email
to look at the new patch set (#7).
Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
soc/intel/xeon_sp: Add fsp_headers.h
FSP headers change across SoC generations. Add fsp_headers.h as
the centralized placeholder to include these headers and related
definitions for Xeon-SP common codes, thus to reduce the
dependency.
TEST=intel/archercity CRB
Change-Id: I89a87ec72933484326cb594b83bb3ed39d06b85c
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
---
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/soc/intel/xeon_sp/Makefile.mk
M src/soc/intel/xeon_sp/bootblock.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
A src/soc/intel/xeon_sp/include/soc/fsp_headers.h
D src/soc/intel/xeon_sp/include/soc/fsp_upd.h
M src/soc/intel/xeon_sp/include/soc/util.h
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
M src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_iiouds.h
9 files changed, 38 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/80684/7
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Hello Andrey Petrov, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80684?usp=email
to look at the new patch set (#6).
Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
soc/intel/xeon_sp: Add fsp_headers.h
FSP headers change across SoC generations. Add fsp_headers.h as
the centralized placeholder to include these headers and related
definitions for Xeon-SP common codes, thus to reduce the
dependency.
TEST=intel/archercity CRB
Change-Id: I89a87ec72933484326cb594b83bb3ed39d06b85c
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
---
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/soc/intel/xeon_sp/Makefile.mk
M src/soc/intel/xeon_sp/include/soc/chip_common.h
A src/soc/intel/xeon_sp/include/soc/fsp_headers.h
D src/soc/intel/xeon_sp/include/soc/fsp_upd.h
M src/soc/intel/xeon_sp/include/soc/util.h
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
M src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_iiouds.h
8 files changed, 37 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/80684/6
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Hello Andrey Petrov, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80684?usp=email
to look at the new patch set (#5).
Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
soc/intel/xeon_sp: Add fsp_headers.h
FSP headers change across SoC generations. Add fsp_headers.h as
the centralized placeholder to include these headers and related
definitions for Xeon-SP common codes, thus to reduce the
dependency.
TEST=intel/archercity CRB
Change-Id: I89a87ec72933484326cb594b83bb3ed39d06b85c
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
---
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/soc/intel/xeon_sp/Makefile.mk
M src/soc/intel/xeon_sp/cpx/include/soc/soc_util.h
M src/soc/intel/xeon_sp/include/soc/chip_common.h
A src/soc/intel/xeon_sp/include/soc/fsp_headers.h
D src/soc/intel/xeon_sp/include/soc/fsp_upd.h
M src/soc/intel/xeon_sp/include/soc/util.h
M src/soc/intel/xeon_sp/spr/ioat.c
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
M src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_iiouds.h
10 files changed, 38 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/80684/5
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Hello Andrey Petrov, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80684?usp=email
to look at the new patch set (#4).
Change subject: soc/intel/xeon_sp: Add fsp_headers.h
......................................................................
soc/intel/xeon_sp: Add fsp_headers.h
FSP headers change across SoC generations. Add fsp_headers.h as
the centralized placeholder to include these headers and related
definitions for Xeon-SP common codes, thus to reduce the
dependency.
TEST=intel/archercity CRB
Change-Id: I89a87ec72933484326cb594b83bb3ed39d06b85c
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Signed-off-by: Gang Chen <gang.c.chen(a)intel.com>
---
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/soc/intel/xeon_sp/Makefile.mk
M src/soc/intel/xeon_sp/cpx/include/soc/soc_util.h
M src/soc/intel/xeon_sp/include/soc/chip_common.h
A src/soc/intel/xeon_sp/include/soc/fsp_headers.h
D src/soc/intel/xeon_sp/include/soc/fsp_upd.h
M src/soc/intel/xeon_sp/include/soc/util.h
M src/soc/intel/xeon_sp/spr/ioat.c
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
M src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_iiouds.h
10 files changed, 39 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/80684/4
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Jincheng Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80693?usp=email )
Change subject: drivers/mrc_cache: Deselect MRC_CACHE_USING_MRC_VERSION by default
......................................................................
drivers/mrc_cache: Deselect MRC_CACHE_USING_MRC_VERSION by default
MRC_CACHE_USING_MRC_VERSION is by default selected when a platform
uses EDK binding >= 202302 even the corresponding FSP doesn't provide
the feature. Deselect the option and leave it to SoC codes to enable it
depending on needs.
Change-Id: I84fdcfbf3c833a7ccb259a1a1d4be0bcfe291dc3
Signed-off-by: Jincheng Li <jincheng.li(a)intel.com>
---
M src/drivers/mrc_cache/Kconfig
M src/soc/intel/meteorlake/Kconfig
2 files changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/80693/1
diff --git a/src/drivers/mrc_cache/Kconfig b/src/drivers/mrc_cache/Kconfig
index e12a3a5..aabb4d8 100644
--- a/src/drivers/mrc_cache/Kconfig
+++ b/src/drivers/mrc_cache/Kconfig
@@ -56,7 +56,6 @@
config MRC_CACHE_USING_MRC_VERSION
bool
- default y if UDK_VERSION >= 202302
default n
help
Use the MRC version info from FSP extended header to store the MRC cache data.
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index f732d69..43bb25e 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -38,6 +38,7 @@
select IOAPIC
select MICROCODE_BLOB_UNDISCLOSED
select MP_SERVICES_PPI_V2
+ select MRC_CACHE_USING_MRC_VERSION
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK
select PCIE_CLOCK_CONTROL_THROUGH_P2SB
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I84fdcfbf3c833a7ccb259a1a1d4be0bcfe291dc3
Gerrit-Change-Number: 80693
Gerrit-PatchSet: 1
Gerrit-Owner: Jincheng Li <jincheng.li(a)intel.com>
Gerrit-MessageType: newchange