coreboot-gerrit February 2024

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[XS] Change in coreboot[main]: lint: Make lint work on Darwin
by Stefan Reinauer (Code Review) 09 Feb '24

09 Feb '24

Stefan Reinauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80436?usp=email ) Change subject: lint: Make lint work on Darwin ...................................................................... lint: Make lint work on Darwin Darwin's getopt does not support the same parameters as the util-linux version and so it is not possible to commit any changes because lint fails. Change-Id: Ife26083d2de080af9ed3d509945720051ca14bd7 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M util/lint/lint 1 file changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/80436/1 diff --git a/util/lint/lint b/util/lint/lint index 94cd4a6..b3551cf 100755 --- a/util/lint/lint +++ b/util/lint/lint @@ -22,6 +22,13 @@ printf "\n" } +# Look if we have getopt. If not, build it. +if [ $(uname) == Darwin ]; then + GETOPT="getopt hIJ " +else + GETOPT="getopt -l help,junit,invert -o hIJ -- " +fi + #write to the junit xml file if --junit was specified junit_write () { if [ "$JUNIT" -eq 1 ]; then @@ -29,7 +36,7 @@ fi } -if ! cmd_args="$(getopt -l help,junit,invert -o hIJ -- "$@")"; then +if ! cmd_args="$($GETOPT -- "$@")"; then usage exit 0 fi -- To view, visit https://review.coreboot.org/c/coreboot/+/80436?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ife26083d2de080af9ed3d509945720051ca14bd7 Gerrit-Change-Number: 80436 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: Documentation/mainboard/lenovo: Add ThinkCentre M710s
by Nicholas Sudsgaard (Code Review) 09 Feb '24

09 Feb '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80411?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: Documentation/mainboard/lenovo: Add ThinkCentre M710s ...................................................................... Documentation/mainboard/lenovo: Add ThinkCentre M710s Change-Id: I90311257a28bd463712c4d43f8b83baa745509cc Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/ch341a_pinout.jpg A Documentation/mainboard/lenovo/thinkcentre_m710s.md A Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg 4 files changed, 209 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/80411/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80411?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I90311257a28bd463712c4d43f8b83baa745509cc Gerrit-Change-Number: 80411 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: crossgcc: Add buildgcc support for Apple M1/M2 devices
by Stefan Reinauer (Code Review) 09 Feb '24

09 Feb '24

Attention is currently required from: Felix Singer, Martin L Roth. Hello Felix Singer, Martin L Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80435?usp=email to look at the new patch set (#2). Change subject: crossgcc: Add buildgcc support for Apple M1/M2 devices ...................................................................... crossgcc: Add buildgcc support for Apple M1/M2 devices GMP and IASL don't compile with the default compiler and linker flags: - GMP's check for the MacOS architecture hard coded x86_64 but it also needs to know about arm64. - iasl does some trickery on pointer alignment to save space(?), so we need to tell clang about it. Change-Id: If4cca9d3e55051a6121d992e5320bee1df17af9f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M util/crossgcc/buildgcc 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/80435/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80435?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If4cca9d3e55051a6121d992e5320bee1df17af9f Gerrit-Change-Number: 80435 Gerrit-PatchSet: 2 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: crossgcc: Add buildgcc support for Apple M1/M2 devices
by Stefan Reinauer (Code Review) 09 Feb '24

09 Feb '24

Stefan Reinauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80435?usp=email ) Change subject: crossgcc: Add buildgcc support for Apple M1/M2 devices ...................................................................... crossgcc: Add buildgcc support for Apple M1/M2 devices GMP and IASL don't compile with the default compiler and linker flags: - GMP's check for the MacOS architecture hard coded x86_64 but it also needs to know about arm64. - iasl does some trickery on pointer alignment to save space(?), so we need to tell clang about it. Change-Id: If4cca9d3e55051a6121d992e5320bee1df17af9f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M util/crossgcc/buildgcc 1 file changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/80435/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index b294da5..54ab4e2 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -847,10 +847,11 @@ cd ../$IASL_DIR/generate/unix || exit 1 CFLAGS="$HOSTCFLAGS" HOST="_LINUX" - test "$UNAME" = "Darwin" && HOST="_APPLE" + test "$UNAME" = "Darwin" && HOST="_APPLE" && OPT_LDFLAGS="-Wl,-no_fixup_chains" test "$UNAME" = "FreeBSD" && HOST="_FreeBSD" test "$UNAME" = "Cygwin" && HOST="_CYGWIN" HOST="$HOST" CFLAGS="$CFLAGS" \ + OPT_LDFLAGS="$OPT_LDFLAGS" \ OPT_CFLAGS="-O -D_FORTIFY_SOURCE=2 -D COREBOOT_TOOLCHAIN_VERSION='\"coreboot toolchain v$CROSSGCC_VERSION\"' " \ $MAKE $JOBS CC="$(hostcc host)" iasl acpibin acpidump acpiexec acpihelp acpisrc acpixtract mkdir -p "$DESTDIR$TARGETDIR/bin/" @@ -1143,7 +1144,10 @@ # so we're setting the ABI explicitly here. if [ "$(sysctl -n hw.optional.x86_64 2>/dev/null)" -eq 1 ] 2>/dev/null; then OPTIONS="ABI=64" + elif [ "$(sysctl -n hw.optional.arm64 2>/dev/null)" -eq 1 ] 2>/dev/null; then + OPTIONS="ABI=64" else + echo "Select ABI=32" OPTIONS="ABI=32" fi -- To view, visit https://review.coreboot.org/c/coreboot/+/80435?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If4cca9d3e55051a6121d992e5320bee1df17af9f Gerrit-Change-Number: 80435 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: soc/intel/cmn/sa: Refactor SA common code
by sridhar siricilla (Code Review) 09 Feb '24

09 Feb '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tarun. sridhar siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80361?usp=email ) Change subject: soc/intel/cmn/sa: Refactor SA common code ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80361?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I476f213d75a0978336b3749a5ba1499107eb2238 Gerrit-Change-Number: 80361 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: sridhar siricilla <siricillasridhar(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 09 Feb 2024 05:10:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/puff: Hide LSPCON device from Windows
by Felix Singer (Code Review) 09 Feb '24

09 Feb '24

Attention is currently required from: CoolStar, Matt DeVillier, Subrata Banik. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78040?usp=email ) Change subject: mb/google/puff: Hide LSPCON device from Windows ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/78040?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib646e01a337b8d7baf20a886c49a8cb64d6408f3 Gerrit-Change-Number: 78040 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Comment-Date: Fri, 09 Feb 2024 00:06:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: include/device/device: drop unused soft_reserved_ram_resource macro
by Nico Huber (Code Review) 09 Feb '24

09 Feb '24

Attention is currently required from: Arthur Heymans, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80409?usp=email ) Change subject: include/device/device: drop unused soft_reserved_ram_resource macro ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80409?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b454175c6530e539aa24dffb771368b0aea6da9 Gerrit-Change-Number: 80409 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 08 Feb 2024 23:35:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: util/ifdtool.c: Fix long_options platform has argument
by Maximilian Brune (Code Review) 09 Feb '24

09 Feb '24

Attention is currently required from: AtomicFS, Stefan Reinauer, Vojtěch Veselý. Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80432?usp=email ) Change subject: util/ifdtool.c: Fix long_options platform has argument ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80432?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d5c31c2b1da544cb73d9e213d463332fcdba7df Gerrit-Change-Number: 80432 Gerrit-PatchSet: 1 Gerrit-Owner: AtomicFS Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Vojtěch Veselý <vojtech.vesely(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Vojtěch Veselý <vojtech.vesely(a)9elements.com> Gerrit-Attention: AtomicFS Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2024 23:20:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/puff/var/*: Clean up SerialIO/I2C config in overridetree
by Felix Singer (Code Review) 09 Feb '24

09 Feb '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80164?usp=email ) Change subject: mb/google/puff/var/*: Clean up SerialIO/I2C config in overridetree ...................................................................... mb/google/puff/var/*: Clean up SerialIO/I2C config in overridetree Ensure that the SerialIoDevMode config and common_soc_config registers for each variant are programmed consistently with the devices' enabled status in that variant's overridetree; remove and disable extraneous devices as appropriate. TEST=build/boot several puff variants, verify all components working as expected, nothing missing from cbmem, lspci, etc. Change-Id: Ib9d0cf48e405be7c00c553646651fc6f28c4e3f0 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80164 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/puff/variants/ambassador/overridetree.cb M src/mainboard/google/puff/variants/dooly/overridetree.cb M src/mainboard/google/puff/variants/duffy/overridetree.cb M src/mainboard/google/puff/variants/faffy/overridetree.cb M src/mainboard/google/puff/variants/genesis/overridetree.cb M src/mainboard/google/puff/variants/kaisa/overridetree.cb M src/mainboard/google/puff/variants/moonbuggy/overridetree.cb M src/mainboard/google/puff/variants/noibat/overridetree.cb M src/mainboard/google/puff/variants/puff/overridetree.cb M src/mainboard/google/puff/variants/scout/overridetree.cb M src/mainboard/google/puff/variants/wyvern/overridetree.cb 11 files changed, 21 insertions(+), 75 deletions(-) Approvals: Felix Singer: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/puff/variants/ambassador/overridetree.cb b/src/mainboard/google/puff/variants/ambassador/overridetree.cb index 78801fd..5a1002a 100644 --- a/src/mainboard/google/puff/variants/ambassador/overridetree.cb +++ b/src/mainboard/google/puff/variants/ambassador/overridetree.cb @@ -15,9 +15,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -157,7 +157,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -167,11 +166,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/dooly/overridetree.cb b/src/mainboard/google/puff/variants/dooly/overridetree.cb index 9768ec3..fce8eec 100644 --- a/src/mainboard/google/puff/variants/dooly/overridetree.cb +++ b/src/mainboard/google/puff/variants/dooly/overridetree.cb @@ -22,9 +22,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, diff --git a/src/mainboard/google/puff/variants/duffy/overridetree.cb b/src/mainboard/google/puff/variants/duffy/overridetree.cb index a876be1..27768df 100644 --- a/src/mainboard/google/puff/variants/duffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/duffy/overridetree.cb @@ -15,9 +15,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -218,7 +218,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -228,11 +227,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/faffy/overridetree.cb b/src/mainboard/google/puff/variants/faffy/overridetree.cb index 6ef2472..d024043 100644 --- a/src/mainboard/google/puff/variants/faffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/faffy/overridetree.cb @@ -15,9 +15,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -226,7 +226,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -236,11 +235,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/genesis/overridetree.cb b/src/mainboard/google/puff/variants/genesis/overridetree.cb index 802ddf1..2ec3aa1 100644 --- a/src/mainboard/google/puff/variants/genesis/overridetree.cb +++ b/src/mainboard/google/puff/variants/genesis/overridetree.cb @@ -8,9 +8,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -150,7 +150,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -160,11 +159,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/kaisa/overridetree.cb b/src/mainboard/google/puff/variants/kaisa/overridetree.cb index 45e4bc7..3e71aa4 100644 --- a/src/mainboard/google/puff/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/puff/variants/kaisa/overridetree.cb @@ -15,9 +15,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -218,7 +218,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -228,11 +227,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb index 4fb617b..aa2377e 100644 --- a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb +++ b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb @@ -8,9 +8,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoPci, @@ -150,7 +150,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -160,11 +159,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb index d83459c..0986048 100644 --- a/src/mainboard/google/puff/variants/noibat/overridetree.cb +++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb @@ -13,9 +13,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -141,7 +141,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -151,11 +150,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/puff/overridetree.cb b/src/mainboard/google/puff/variants/puff/overridetree.cb index 474a2fa..349740c 100644 --- a/src/mainboard/google/puff/variants/puff/overridetree.cb +++ b/src/mainboard/google/puff/variants/puff/overridetree.cb @@ -9,9 +9,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -151,7 +151,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -161,11 +160,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb index a61e41b..7729ccc 100644 --- a/src/mainboard/google/puff/variants/scout/overridetree.cb +++ b/src/mainboard/google/puff/variants/scout/overridetree.cb @@ -10,7 +10,7 @@ [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoPci, diff --git a/src/mainboard/google/puff/variants/wyvern/overridetree.cb b/src/mainboard/google/puff/variants/wyvern/overridetree.cb index 2c11e70..89530f3 100644 --- a/src/mainboard/google/puff/variants/wyvern/overridetree.cb +++ b/src/mainboard/google/puff/variants/wyvern/overridetree.cb @@ -11,9 +11,9 @@ [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, @@ -152,7 +152,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | #| I2C2 | PS175 | #| I2C3 | MST | #| I2C4 | Audio | @@ -162,11 +161,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, - }, .i2c[2] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 60, -- To view, visit https://review.coreboot.org/c/coreboot/+/80164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib9d0cf48e405be7c00c553646651fc6f28c4e3f0 Gerrit-Change-Number: 80164 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[L] Change in coreboot[main]: mb/google/puff/var/*: Drop redundant device entries in overridetree
by Felix Singer (Code Review) 09 Feb '24

09 Feb '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80163?usp=email ) Change subject: mb/google/puff/var/*: Drop redundant device entries in overridetree ...................................................................... mb/google/puff/var/*: Drop redundant device entries in overridetree Now that the puff baseboard uses chipset devicetree references, remove all references whose value is identical to the chipset devicetree default or the baseboard default, since they are pointless clutter. TEST=tested with rest of patch train Change-Id: Iada32111367fdc964d6126ee43e261c1feb123cf Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80163 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> --- M src/mainboard/google/puff/variants/ambassador/overridetree.cb M src/mainboard/google/puff/variants/dooly/overridetree.cb M src/mainboard/google/puff/variants/duffy/overridetree.cb M src/mainboard/google/puff/variants/faffy/overridetree.cb M src/mainboard/google/puff/variants/genesis/overridetree.cb M src/mainboard/google/puff/variants/kaisa/overridetree.cb M src/mainboard/google/puff/variants/moonbuggy/overridetree.cb M src/mainboard/google/puff/variants/noibat/overridetree.cb M src/mainboard/google/puff/variants/puff/overridetree.cb M src/mainboard/google/puff/variants/scout/overridetree.cb M src/mainboard/google/puff/variants/wyvern/overridetree.cb 11 files changed, 128 insertions(+), 196 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/mainboard/google/puff/variants/ambassador/overridetree.cb b/src/mainboard/google/puff/variants/ambassador/overridetree.cb index 80bcb68..78801fd 100644 --- a/src/mainboard/google/puff/variants/ambassador/overridetree.cb +++ b/src/mainboard/google/puff/variants/ambassador/overridetree.cb @@ -208,7 +208,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -273,7 +273,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -354,11 +354,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -367,7 +363,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -376,8 +372,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -391,8 +386,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -403,11 +398,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/dooly/overridetree.cb b/src/mainboard/google/puff/variants/dooly/overridetree.cb index 8c3d473..9768ec3 100644 --- a/src/mainboard/google/puff/variants/dooly/overridetree.cb +++ b/src/mainboard/google/puff/variants/dooly/overridetree.cb @@ -185,7 +185,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -239,7 +239,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -261,8 +261,8 @@ device usb 2.2 on end end chip drivers/usb/acpi - device usb 2.3 off end - end + device usb 2.3 off end + end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port 1"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" @@ -270,8 +270,8 @@ device usb 2.4 on end end chip drivers/usb/acpi - register "desc" = ""Camera"" - register "type" = "UPC_TYPE_INTERNAL" + register "desc" = ""Camera"" + register "type" = "UPC_TYPE_INTERNAL" device usb 2.5 on end end chip drivers/usb/acpi @@ -310,25 +310,24 @@ end end end - device ref sdxc off end - device ref i2c0 on + device ref sdxc off end + device ref i2c0 on # ALC1015 chip drivers/i2c/generic - register "hid" = ""10EC1015"" - register "desc" = ""Realtek SPK AMP L"" - register "uid" = "0" - device i2c 28 on end - end - chip drivers/i2c/generic - register "hid" = ""10EC1015"" - register "desc" = ""Realtek SPK AMP R"" - register "uid" = "1" - device i2c 29 on end - end + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "0" + device i2c 28 on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end end - device ref i2c1 off end - device ref i2c2 on end # LVDS - device ref i2c3 on + device ref i2c2 on end # LVDS + device ref i2c3 on # Touchscreen chip drivers/i2c/hid register "generic.hid" = ""WDHT2002"" @@ -343,8 +342,7 @@ device i2c 2c on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -385,13 +383,12 @@ device generic 0 on end end end - device ref emmc on end - device ref pcie_rp11 on + device ref emmc on end + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end - device ref hda on + device ref hda on chip drivers/sof register "spkr_tplg" = "rt1015" register "jack_tplg" = "rt5682" diff --git a/src/mainboard/google/puff/variants/duffy/overridetree.cb b/src/mainboard/google/puff/variants/duffy/overridetree.cb index 97a9af2..a876be1 100644 --- a/src/mainboard/google/puff/variants/duffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/duffy/overridetree.cb @@ -269,7 +269,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -332,7 +332,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -413,11 +413,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -426,7 +422,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -435,8 +431,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -450,8 +445,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -462,11 +457,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/faffy/overridetree.cb b/src/mainboard/google/puff/variants/faffy/overridetree.cb index d8b8001..6ef2472 100644 --- a/src/mainboard/google/puff/variants/faffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/faffy/overridetree.cb @@ -277,7 +277,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" @@ -306,7 +306,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -387,11 +387,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -400,7 +396,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -409,8 +405,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -424,8 +419,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -436,11 +431,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/genesis/overridetree.cb b/src/mainboard/google/puff/variants/genesis/overridetree.cb index ef207b9..802ddf1 100644 --- a/src/mainboard/google/puff/variants/genesis/overridetree.cb +++ b/src/mainboard/google/puff/variants/genesis/overridetree.cb @@ -243,7 +243,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -305,7 +305,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -384,11 +384,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -397,7 +393,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -406,8 +402,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -421,8 +416,7 @@ device i2c 1a on end end end - device ref emmc off end - device ref pcie_rp7 on + device ref pcie_rp7 on # LAN chip drivers/net # RTL8111H Ethernet NIC register "customized_leds" = "0x05af" @@ -432,29 +426,29 @@ device pci 00.0 on end end end - device ref pcie_rp8 on + device ref pcie_rp8 on # WLAN register "PcieRpSlotImplemented[7]" = "1" # M.2 Slot end - device ref pcie_rp9 on + device ref pcie_rp9 on # TPU register "PcieRpSlotImplemented[8]" = "1" # M.2 Slot end - device ref pcie_rp10 off end - device ref pcie_rp11 on end + device ref pcie_rp11 on # TPU1 register "PcieRpSlotImplemented[10]" = "1" # M.2 Slot - device ref pcie_rp12 on end + end + device ref pcie_rp12 on # TPU0 register "PcieRpSlotImplemented[11]" = "1" # M.2 Slot - device ref pcie_rp13 on + end + device ref pcie_rp13 on # X4 i350 NIC register "PcieRpSlotImplemented[12]" = "0" # Built-in end - device ref pcie_rp14 on end # non-root - device ref pcie_rp15 on end # non-root - device ref pcie_rp16 on end # non-root - device ref gspi1 off end + device ref pcie_rp14 on end # non-root + device ref pcie_rp15 on end # non-root + device ref pcie_rp16 on end # non-root end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/kaisa/overridetree.cb b/src/mainboard/google/puff/variants/kaisa/overridetree.cb index 23ae763..45e4bc7 100644 --- a/src/mainboard/google/puff/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/puff/variants/kaisa/overridetree.cb @@ -269,7 +269,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -332,7 +332,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -413,11 +413,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -426,7 +422,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -435,8 +431,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -450,8 +445,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -462,11 +457,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb index ddbedac..4fb617b 100644 --- a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb +++ b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb @@ -243,7 +243,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -305,7 +305,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -386,11 +386,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -399,7 +395,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -408,8 +404,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -423,8 +418,7 @@ device i2c 1a on end end end - device ref emmc off end - device ref pcie_rp7 on + device ref pcie_rp7 on # LAN chip drivers/net # RTL8111H Ethernet NIC register "customized_leds" = "0x05af" @@ -434,31 +428,30 @@ device pci 00.0 on end end end - device ref pcie_rp8 on + device ref pcie_rp8 on # WLAN register "PcieRpSlotImplemented[7]" = "1" # M.2 Slot end - device ref pcie_rp9 on + device ref pcie_rp9 on # TPU register "PcieRpSlotImplemented[8]" = "1" # M.2 Slot end - device ref pcie_rp10 off end - device ref pcie_rp11 on end + device ref pcie_rp11 on # TPU1 register "PcieRpSlotImplemented[10]" = "1" # M.2 Slot - device ref pcie_rp12 on end + end + device ref pcie_rp12 on # TPU0 register "PcieRpSlotImplemented[11]" = "1" # M.2 Slot - device ref pcie_rp13 on + end + device ref pcie_rp13 on # X4 i350 NIC register "PcieRpSlotImplemented[12]" = "0" # Built-in end - device ref pcie_rp14 on end # non-root - device ref pcie_rp15 on end # non-root - device ref pcie_rp16 on end # non-root - device ref uart0 on end - device ref uart1 on end - device ref gspi1 off end + device ref pcie_rp14 on end # non-root + device ref pcie_rp15 on end # non-root + device ref pcie_rp16 on end # non-root + device ref uart1 on end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb index 5cabe9a..d83459c 100644 --- a/src/mainboard/google/puff/variants/noibat/overridetree.cb +++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb @@ -192,7 +192,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -255,7 +255,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -324,11 +324,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -337,7 +333,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -346,8 +342,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -361,8 +356,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -373,11 +368,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/puff/overridetree.cb b/src/mainboard/google/puff/variants/puff/overridetree.cb index eee82e6..474a2fa 100644 --- a/src/mainboard/google/puff/variants/puff/overridetree.cb +++ b/src/mainboard/google/puff/variants/puff/overridetree.cb @@ -202,7 +202,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -267,7 +267,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -348,11 +348,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -361,7 +357,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -370,8 +366,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -385,8 +380,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -397,11 +392,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb index abf4ff3..a61e41b 100644 --- a/src/mainboard/google/puff/variants/scout/overridetree.cb +++ b/src/mainboard/google/puff/variants/scout/overridetree.cb @@ -235,7 +235,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -299,7 +299,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -378,10 +378,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 on + device ref i2c1 on # USI (Touch screen) chip drivers/i2c/hid register "generic.hid" = ""ILTK0001"" @@ -396,12 +393,10 @@ device i2c 41 on end end end - device ref i2c2 on end # SCALER - device ref i2c3 on end # TPU - device ref heci1 on end - device ref i2c4 off end - device ref emmc on end - device ref pcie_rp7 on + device ref i2c2 on end # SCALER + device ref i2c3 on end # TPU + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -411,30 +406,25 @@ device pci 00.0 on end end end - device ref pcie_rp8 on + device ref pcie_rp8 on # WLAN register "PcieRpSlotImplemented[7]" = "1" # M.2 Slot end - device ref pcie_rp9 on + device ref pcie_rp9 on # SSD register "PcieRpSlotImplemented[8]" = "1" # M.2 Slot end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end - device ref pcie_rp13 on + device ref pcie_rp13 on # TPU0 register "PcieRpSlotImplemented[12]" = "1" # M.2 Slot end - device ref pcie_rp14 on + device ref pcie_rp14 on # TPU1 register "PcieRpSlotImplemented[13]" = "1" # M.2 Slot end - device ref pcie_rp15 on end # non-root - device ref pcie_rp16 on end # non-root - device ref uart0 on end - device ref uart1 on end - device ref gspi1 off end + device ref pcie_rp15 on end # non-root + device ref pcie_rp16 on end # non-root + device ref uart1 on end end # VR Settings Configuration for 4 Domains diff --git a/src/mainboard/google/puff/variants/wyvern/overridetree.cb b/src/mainboard/google/puff/variants/wyvern/overridetree.cb index 715ef7ff..2c11e70 100644 --- a/src/mainboard/google/puff/variants/wyvern/overridetree.cb +++ b/src/mainboard/google/puff/variants/wyvern/overridetree.cb @@ -203,7 +203,7 @@ register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on - device ref dptf on + device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, @@ -268,7 +268,7 @@ device generic 0 on end end end - device ref xhci on + device ref xhci on chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi @@ -349,11 +349,7 @@ end end end - device ref i2c0 off - # RFU - Reserved for Future Use. - end - device ref i2c1 off end - device ref i2c2 on + device ref i2c2 on # PCON PS175 chip drivers/i2c/generic register "hid" = ""1AF80175"" @@ -362,7 +358,7 @@ device i2c 4a on end end end - device ref i2c3 on + device ref i2c3 on # Realtek RTD2142 chip drivers/i2c/generic register "hid" = ""10EC2142"" @@ -371,8 +367,7 @@ device i2c 4a on end end end - device ref heci1 on end - device ref i2c4 on + device ref i2c4 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" @@ -386,8 +381,8 @@ device i2c 1a on end end end - device ref emmc on end - device ref pcie_rp7 on + device ref emmc on end + device ref pcie_rp7 on # RTL8111H Ethernet NIC chip drivers/net register "customized_leds" = "0x05af" @@ -398,11 +393,10 @@ end register "PcieRpSlotImplemented[6]" = "1" end - device ref pcie_rp11 on + device ref pcie_rp11 on # X2 NVMe register "PcieRpSlotImplemented[10]" = "1" end - device ref gspi1 off end end # VR Settings Configuration for 4 Domains -- To view, visit https://review.coreboot.org/c/coreboot/+/80163?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iada32111367fdc964d6126ee43e261c1feb123cf Gerrit-Change-Number: 80163 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit February 2024