coreboot-gerrit August 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/common/block/cse/Kconfig: Remove unused symbols
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76693?usp=email ) Change subject: soc/intel/common/block/cse/Kconfig: Remove unused symbols ...................................................................... soc/intel/common/block/cse/Kconfig: Remove unused symbols Change-Id: I35742721e049102a3e153b857824073a5d257cc3 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76693 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/common/block/cse/Kconfig 1 file changed, 0 insertions(+), 38 deletions(-) Approvals: Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index dc53268..4750889 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -358,53 +358,15 @@ help This file is the CSE data binary typically generated by Intel FIT tool. -config CSE_PMCP_FILE - string "Name of PMC file" - default "pmc.bin" - help - This file is the PMC input binary as released by Intel in a CSE kit. - -config CSE_IOMP_FILE - string "Name of IOM file" - default "iom.bin" - help - This file is the IOM input binary as released by Intel in a CSE kit. - -config CSE_TBTP_FILE - string "Name of TBT file" - default "tbt.bin" - help - This file is the TBT input binary as released by Intel in a CSE kit. - config CSE_NPHY_FILE string "Name of NPHY file" default "nphy.bin" help This file is the NPHY input binary as released by Intel in a CSE kit. -config CSE_PCHC_FILE - string "Name of PCHC file" - default "pchc.bin" - help - This file is the PCHC input binary as released by Intel in a CSE kit. - -config CSE_IUNP_FILE - string "Name of IUNIT file" - default "iunit.bin" - help - This file is the PCHC input binary as released by Intel in a CSE kit. - config CSE_BPDT_VERSION string help This config indicates the BPDT version used by CSE for a given SoC. -config CSE_OEMP_FILE - string "Name of OEM Key Manifest file" - default "oem_km.bin" - help - OEM Key Manifest lists the public key hashes used for authenticating the - OEM created binaries to be loaded. This binary is generated by signing with - the key owned by trusted owner. - endif -- To view, visit https://review.coreboot.org/c/coreboot/+/76693?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35742721e049102a3e153b857824073a5d257cc3 Gerrit-Change-Number: 76693 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr/Kconfig: Remove unused MAX_MC_CHN
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76695?usp=email ) Change subject: soc/intel/xeon_sp/spr/Kconfig: Remove unused MAX_MC_CHN ...................................................................... soc/intel/xeon_sp/spr/Kconfig: Remove unused MAX_MC_CHN Change-Id: Ia4011a0f29d360fbe46a5e052e2acb3d23d8ceaf Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76695 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/xeon_sp/spr/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index ed95457..c3710ac 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -127,10 +127,6 @@ int default 4 -config MAX_MC_CHN - int - default 2 - config DIMM_MAX int default 32 -- To view, visit https://review.coreboot.org/c/coreboot/+/76695?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia4011a0f29d360fbe46a5e052e2acb3d23d8ceaf Gerrit-Change-Number: 76695 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/ibm/sbp1/Kconfig: Remove unused MAX_SOCKET_UPD
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76696?usp=email ) Change subject: mb/ibm/sbp1/Kconfig: Remove unused MAX_SOCKET_UPD ...................................................................... mb/ibm/sbp1/Kconfig: Remove unused MAX_SOCKET_UPD Change-Id: I5d9133f2255a96c8367f69dcbb198a1a142cdb82 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76696 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/mainboard/ibm/sbp1/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/ibm/sbp1/Kconfig b/src/mainboard/ibm/sbp1/Kconfig index 150c71c..8d8b62e 100644 --- a/src/mainboard/ibm/sbp1/Kconfig +++ b/src/mainboard/ibm/sbp1/Kconfig @@ -27,10 +27,6 @@ int default 4 -config MAX_SOCKET_UPD - int - default 4 - config MAX_CPUS int default 480 -- To view, visit https://review.coreboot.org/c/coreboot/+/76696?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d9133f2255a96c8367f69dcbb198a1a142cdb82 Gerrit-Change-Number: 76696 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/jasperlake: Remove dummy CPU_SPECIFIC_OPTIONS
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76685?usp=email ) Change subject: soc/intel/jasperlake: Remove dummy CPU_SPECIFIC_OPTIONS ...................................................................... soc/intel/jasperlake: Remove dummy CPU_SPECIFIC_OPTIONS Change-Id: I5ad1a1bf51bb7a451239252f01a90c1d4d94ba49 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76685 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/jasperlake/Kconfig 1 file changed, 4 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 4ecec60..1e1f262 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -1,12 +1,5 @@ config SOC_INTEL_JASPERLAKE bool - help - Intel Jasperlake support - -if SOC_INTEL_JASPERLAKE - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES @@ -75,6 +68,10 @@ select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select SOC_INTEL_COMMON_BASECODE select SOC_INTEL_COMMON_BASECODE_RAMTOP + help + Intel Jasperlake support + +if SOC_INTEL_JASPERLAKE config DCACHE_RAM_BASE default 0xfef00000 -- To view, visit https://review.coreboot.org/c/coreboot/+/76685?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ad1a1bf51bb7a451239252f01a90c1d4d94ba49 Gerrit-Change-Number: 76685 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/skylake: Remove dummy CPU_SPECIFIC_OPTIONS
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76683?usp=email ) Change subject: soc/intel/skylake: Remove dummy CPU_SPECIFIC_OPTIONS ...................................................................... soc/intel/skylake: Remove dummy CPU_SPECIFIC_OPTIONS Change-Id: Iea0e55c6c55635976dad0422470f3927bdc26e35 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76683 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/soc/intel/skylake/Kconfig 1 file changed, 18 insertions(+), 21 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index e15af04..d6a11363e 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -1,26 +1,5 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE bool - -config SOC_INTEL_SKYLAKE - bool - select SOC_INTEL_COMMON_SKYLAKE_BASE - -config SOC_INTEL_KABYLAKE - bool - select SOC_INTEL_COMMON_SKYLAKE_BASE - -config SOC_INTEL_SKYLAKE_LGA1151_V2 - bool - select PLATFORM_USES_FSP2_1 - select SOC_INTEL_COMMON_SKYLAKE_BASE - select SKYLAKE_SOC_PCH_H - help - Selected by mainboards with a LGA1151 v2 socket and a Z370, H310C or B365 PCH - -if SOC_INTEL_COMMON_SKYLAKE_BASE - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT select ARCH_X86 @@ -92,6 +71,24 @@ select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE +config SOC_INTEL_SKYLAKE + bool + select SOC_INTEL_COMMON_SKYLAKE_BASE + +config SOC_INTEL_KABYLAKE + bool + select SOC_INTEL_COMMON_SKYLAKE_BASE + +config SOC_INTEL_SKYLAKE_LGA1151_V2 + bool + select PLATFORM_USES_FSP2_1 + select SOC_INTEL_COMMON_SKYLAKE_BASE + select SKYLAKE_SOC_PCH_H + help + Selected by mainboards with a LGA1151 v2 socket and a Z370, H310C or B365 PCH + +if SOC_INTEL_COMMON_SKYLAKE_BASE + config MAX_HECI_DEVICES int default 5 -- To view, visit https://review.coreboot.org/c/coreboot/+/76683?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea0e55c6c55635976dad0422470f3927bdc26e35 Gerrit-Change-Number: 76683 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/tigerlake: Remove dummy CPU_SPECIFIC_OPTIONS
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76682?usp=email ) Change subject: soc/intel/tigerlake: Remove dummy CPU_SPECIFIC_OPTIONS ...................................................................... soc/intel/tigerlake: Remove dummy CPU_SPECIFIC_OPTIONS Change-Id: Id268943b9347fdb54e07b55c0a2a18ac77bb3a58 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76682 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/soc/intel/tigerlake/Kconfig 1 file changed, 7 insertions(+), 10 deletions(-) Approvals: Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 9bca895..df8f5a2 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -1,15 +1,5 @@ config SOC_INTEL_TIGERLAKE bool - help - Intel Tigerlake support - -config SOC_INTEL_TIGERLAKE_PCH_H - bool - -if SOC_INTEL_TIGERLAKE - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES @@ -97,6 +87,13 @@ select SOC_INTEL_COMMON_BASECODE_RAMTOP select CR50_USE_LONG_INTERRUPT_PULSES if TPM_GOOGLE_CR50 select X86_CLFLUSH_CAR + help + Intel Tigerlake support + +config SOC_INTEL_TIGERLAKE_PCH_H + bool + +if SOC_INTEL_TIGERLAKE config MAX_CPUS int -- To view, visit https://review.coreboot.org/c/coreboot/+/76682?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id268943b9347fdb54e07b55c0a2a18ac77bb3a58 Gerrit-Change-Number: 76682 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/Kconfig: Remove useless USE_FSP2_0_DRIVER
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76697?usp=email ) Change subject: soc/intel/xeon_sp/Kconfig: Remove useless USE_FSP2_0_DRIVER ...................................................................... soc/intel/xeon_sp/Kconfig: Remove useless USE_FSP2_0_DRIVER Change-Id: Ic384ee804e217ba79f7e191f122ec61565abfc40 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76697 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/soc/intel/xeon_sp/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index f6bfd42..24f749a 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -75,10 +75,6 @@ config MAINBOARD_USES_FSP2_0 bool default y - -config USE_FSP2_0_DRIVER - def_bool y - depends on MAINBOARD_USES_FSP2_0 select PLATFORM_USES_FSP2_0 select UDK_202005_BINDING select POSTCAR_STAGE -- To view, visit https://review.coreboot.org/c/coreboot/+/76697?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic384ee804e217ba79f7e191f122ec61565abfc40 Gerrit-Change-Number: 76697 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr/Kconfig: Remove unused SIPI_FINAL_TIMEOUT
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76698?usp=email ) Change subject: soc/intel/xeon_sp/spr/Kconfig: Remove unused SIPI_FINAL_TIMEOUT ...................................................................... soc/intel/xeon_sp/spr/Kconfig: Remove unused SIPI_FINAL_TIMEOUT Change-Id: I915e0e942adf33175fdc9fe055fce013824d6c0f Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76698 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/xeon_sp/spr/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index f666ab5..ed95457 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -27,10 +27,6 @@ string default "C%03X" -config SIPI_FINAL_TIMEOUT - int - default 400000 - config PCR_BASE_ADDRESS hex default 0xfd000000 -- To view, visit https://review.coreboot.org/c/coreboot/+/76698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I915e0e942adf33175fdc9fe055fce013824d6c0f Gerrit-Change-Number: 76698 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/broadwell/Kconfig: Remove dummy SOC_SPECIFIC_OPTIONS
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76700?usp=email ) Change subject: soc/intel/broadwell/Kconfig: Remove dummy SOC_SPECIFIC_OPTIONS ...................................................................... soc/intel/broadwell/Kconfig: Remove dummy SOC_SPECIFIC_OPTIONS Change-Id: I4ccb8d38f18cb440f54723cc1f29e25b82dac8ee Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76700 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/broadwell/Kconfig 1 file changed, 4 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 3878f14..e5784c5 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -1,18 +1,15 @@ config SOC_INTEL_BROADWELL bool - help - Intel Broadwell and Haswell ULT support. - -if SOC_INTEL_BROADWELL - -config SOC_SPECIFIC_OPTIONS - def_bool y select CACHE_MRC_SETTINGS select CPU_INTEL_HASWELL select INTEL_GMA_ACPI select MRC_SETTINGS_PROTECT select REG_SCRIPT select TCO_SPACE_NOT_YET_SPLIT + help + Intel Broadwell and Haswell ULT support. + +if SOC_INTEL_BROADWELL config BROADWELL_LPDDR3 bool -- To view, visit https://review.coreboot.org/c/coreboot/+/76700?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ccb8d38f18cb440f54723cc1f29e25b82dac8ee Gerrit-Change-Number: 76700 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: Makefile.inc: Fix typo in comment
by Elyes Haouas (Code Review) 03 Aug '23

03 Aug '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76890?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: Makefile.inc: Fix typo in comment ...................................................................... Makefile.inc: Fix typo in comment Replace FILANAME with FILENAME. Change-Id: I96388245df406e6b4cb1cd3418f6a32d5b23499f Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76890 Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Pratikkumar V Prajapati: Looks good to me, approved build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Elyes Haouas: Looks good to me, approved Sridhar Siricilla: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index 094387f..414ef76 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -831,7 +831,7 @@ # mma, efi, deleted, null # 4 - Compression type [$(FILENAME)-compression] # none, LZMA -# 5 - Base address [$(FILANAME)-position] +# 5 - Base address [$(FILENAME)-position] # 6 - Alignment [$(FILENAME)-align] # 7 - cbfstool flags [$(FILENAME)-options] # -- To view, visit https://review.coreboot.org/c/coreboot/+/76890?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96388245df406e6b4cb1cd3418f6a32d5b23499f Gerrit-Change-Number: 76890 Gerrit-PatchSet: 4 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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coreboot-gerrit August 2023