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Change subject: mb/google/dedede/var/dibbi: Update power limits
......................................................................
Patch Set 12: Code-Review+2
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Change subject: mb/google/hades: select DUMP_SMBIOS_TYPE17
......................................................................
mb/google/hades: select DUMP_SMBIOS_TYPE17
Hades uses DDR5 which can't read SPD from coreboot yet. Use smbios
dump to print memory information.
TEST=check the coreboot log.
memory Channel-0-DIMM-0 type is DDR5
memory part number is MTC8C1084S1SC56BG1
memory max speed is 5600 MT/s
memory speed is 5200 MT/s
memory size is 16384 MiB
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: Ica44081228a3a1edc36e2110e84686582fbe8f33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76088
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Ivy Jian: Looks good to me, approved
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 2a9941a..d142465 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -67,6 +67,7 @@
def_bool n
select BOARD_GOOGLE_BRYA_COMMON
select BOARD_ROMSIZE_KB_32768
+ select DUMP_SMBIOS_TYPE17
select HAVE_SLP_S0_GATE
select INCLUDE_NVIDIA_GPU_ASL
select MEMORY_SODIMM
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(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: arch/x86/Kconfig: remove period from DUMP_SMBIOS_TYPE17 title
......................................................................
arch/x86/Kconfig: remove period from DUMP_SMBIOS_TYPE17 title
Option name strings should not end with a period, remove it.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: Id61d8961cad2cd311db7d9da3bdb86f0f28b57b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76087
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---
M src/arch/x86/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 7b3f34a..ec1171b 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -360,7 +360,7 @@
Size of reserved space for EC firmware pointer
config DUMP_SMBIOS_TYPE17
- bool "Dump part of SMBIOS type17 dimm information."
+ bool "Dump part of SMBIOS type17 dimm information"
depends on GENERATE_SMBIOS_TABLES
endif
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Change subject: mb/google/dedede/var/dibbi: Update power limits
......................................................................
Patch Set 12: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75681/comment/0181605b_fb6b9f11 :
PS11, Line 8:
> Possible unwrapped commit description (prefer a maximum 72 chars per line)
Please fix.
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Change subject: mb/system76/{adl,tgl}: Add FMD files
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76155/comment/7158eb74_8aff66a0 :
PS3, Line 12: This corrects the BIOS region size to match the FIT config.
> Please mention the values.
Done
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Hello Jeremy Soller, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76155?usp=email
to look at the new patch set (#4).
Change subject: mb/system76/{adl,tgl}: Add FMD files
......................................................................
mb/system76/{adl,tgl}: Add FMD files
Replace `CBFS_SIZE` with FMD files to declare regions and sizes. This
will be used to lock BIOS region (except SMMSTORE) on boot.
`CBFS_SIZE` was incorrectly set to 10 MiB, so this also corrects the
BIOS region size to match the FIT values.
Change-Id: I0f068f4d9b376f12b46faa5bb0c6a08e6cb744d8
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/adl/Kconfig
A src/mainboard/system76/adl/board.fmd
M src/mainboard/system76/tgl-h/Kconfig
A src/mainboard/system76/tgl-h/board-gbe.fmd
A src/mainboard/system76/tgl-h/board.fmd
M src/mainboard/system76/tgl-u/Kconfig
A src/mainboard/system76/tgl-u/board.fmd
7 files changed, 62 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/76155/4
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Change subject: {ec,mb}/system76: Replace color keyboard logic
......................................................................
Patch Set 1: Code-Review+1
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Change subject: UNTESTED arch/x86/tables.c: Carve out ACPI as separate bootmem range
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/system76/{adl,tgl}: Add FMD files
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76155/comment/78dbc31a_81e89283 :
PS3, Line 12: This corrects the BIOS region size to match the FIT config.
Please mention the values.
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Hello Jeremy Soller,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76155?usp=email
to look at the new patch set (#3).
Change subject: mb/system76/{adl,tgl}: Add FMD files
......................................................................
mb/system76/{adl,tgl}: Add FMD files
Replace `CBFS_SIZE` with FMD files to declare regions and sizes. This
will be used to lock BIOS region (except SMMSTORE) on boot.
This corrects the BIOS region size to match the FIT config.
Change-Id: I0f068f4d9b376f12b46faa5bb0c6a08e6cb744d8
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/adl/Kconfig
A src/mainboard/system76/adl/board.fmd
M src/mainboard/system76/tgl-h/Kconfig
A src/mainboard/system76/tgl-h/board-gbe.fmd
A src/mainboard/system76/tgl-h/board.fmd
M src/mainboard/system76/tgl-u/Kconfig
A src/mainboard/system76/tgl-u/board.fmd
7 files changed, 62 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/76155/3
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