coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

1 participants
5387 discussions

[XS] Change in coreboot[master]: mb/google/dedede/var/boxy: Update audio codec HID to use correct ALC5...
by Kevin3 Yang (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Paul Menzel. Kevin3 Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75813?usp=email ) Change subject: mb/google/dedede/var/boxy: Update audio codec HID to use correct ALC5682I-VD ...................................................................... Patch Set 4: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75813/comment/f352bc21_702f0bd8 : PS3, Line 7: for Boxy > Redundant. Done https://review.coreboot.org/c/coreboot/+/75813/comment/1799e6b1_453adce7 : PS3, Line 7: Update Audio Codec HID > Maybe: Update audio codec HID to use correct ALC5682I-VS Done https://review.coreboot.org/c/coreboot/+/75813/comment/2fd5320a_e6c0321e : PS3, Line 9: using > uses Done https://review.coreboot.org/c/coreboot/+/75813/comment/b4782978_72d5ddf4 : PS3, Line 10: need > needs Done https://review.coreboot.org/c/coreboot/+/75813/comment/fa9e6377_59a39f4c : PS3, Line 9: Boxy audio codec chip using ALC5682I-VD, not ALC5682I-VS. : It need to modify codec HID to "10EC5682" in coreboot to fix audio no output sound issue. > Please use 72 characters per line. Done https://review.coreboot.org/c/coreboot/+/75813/comment/0d48c23e_2dcee6de : PS3, Line 14: TEST=build and confirm audio can output sound > Was there any Linux message, that the audio is detected now? audio soundcard can be list by command "aplay -l" -- To view, visit https://review.coreboot.org/c/coreboot/+/75813?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd69a9d757ba817b586a703a17375682db684224 Gerrit-Change-Number: 75813 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 14 Jun 2023 06:03:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: soc/intel/jasperlake: Add per-SKU power limits
by ChiaLing (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: ChiaLing, Paul Menzel, Ryan Lin, Subrata Banik, Sumeet R Pawnikar, Zhuohao Lee. Hello Reka Norman, Ryan Lin, Subrata Banik, Zhuohao Lee, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75679?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/jasperlake: Add per-SKU power limits ...................................................................... soc/intel/jasperlake: Add per-SKU power limits Add JSL SKUs ID and add PLx from JSL PDG in project devicetree. BUG=b:281479111 TEST=emerge-dedede coreboot and read correct value on dibbi Signed-off-by: Chia-Ling Hou <chia-ling.hou(a)intel.com> Change-Id: Ic086e32a2692f4f5f9b661585b216fa207fc56fd --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/blipper/overridetree.cb M src/mainboard/google/dedede/variants/dibbi/overridetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb M src/mainboard/google/dedede/variants/haboki/overridetree.cb M src/mainboard/google/dedede/variants/kracko/overridetree.cb M src/mainboard/google/dedede/variants/lalala/overridetree.cb M src/mainboard/google/dedede/variants/lantis/overridetree.cb M src/mainboard/google/dedede/variants/madoo/overridetree.cb M src/mainboard/google/dedede/variants/magolor/overridetree.cb M src/mainboard/google/dedede/variants/metaknight/overridetree.cb M src/mainboard/google/dedede/variants/sasukette/overridetree.cb M src/mainboard/google/dedede/variants/shotzo/overridetree.cb M src/mainboard/google/dedede/variants/storo/overridetree.cb M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/systemagent.c 17 files changed, 205 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/75679/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/75679?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic086e32a2692f4f5f9b661585b216fa207fc56fd Gerrit-Change-Number: 75679 Gerrit-PatchSet: 9 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Attention: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: newpatchset

1 0

[XS] Change in coreboot[master]: soc/intel/cmn/cse: Read ISH FW version if avilable in CSE partition
by Kapil Porwal (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Subrata Banik. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75811?usp=email ) Change subject: soc/intel/cmn/cse: Read ISH FW version if avilable in CSE partition ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75811?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I689a71377e7aea0fa3bc1835f355708c33c2caea Gerrit-Change-Number: 75811 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 05:56:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/common: Add PsysPl1 support
by ChiaLing (Code Review) 14 Jun '23

14 Jun '23

ChiaLing has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75678?usp=email ) Change subject: soc/intel/common: Add PsysPl1 support ...................................................................... Abandoned Don't need to enable PsysPL1 in final discussion. -- To view, visit https://review.coreboot.org/c/coreboot/+/75678?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b2cf2c90ddef422c121e90edbe79dacb7e29320 Gerrit-Change-Number: 75678 Gerrit-PatchSet: 5 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

1 0

[XS] Change in coreboot[master]: soc/mediatek: Enable scramble feature support on fast-k flow
by Xixi Chen (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Hung-Te Lin, Xixi Chen, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75818?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/mediatek: Enable scramble feature support on fast-k flow ...................................................................... soc/mediatek: Enable scramble feature support on fast-k flow Originally, scramble feature is only enabled on full-k. For fast-k flow, needs to add the header config DRAMC_CONFIG_SCRAMBLE. BUG=b:285474337 TEST=Check the scramble feature is disabled on serial build Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Change-Id: I907bccd4e68e040179e1971db6bf7a57b88dec1b --- M src/soc/mediatek/common/Kconfig M src/soc/mediatek/common/memory.c 2 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/75818/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/75818?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I907bccd4e68e040179e1971db6bf7a57b88dec1b Gerrit-Change-Number: 75818 Gerrit-PatchSet: 4 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/pujjo: Set GPIO of WWAN_SAR_DETECT to NC
by Derek Huang (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Leo Chou, Paul Menzel, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75403?usp=email ) Change subject: mb/google/nissa/var/pujjo: Set GPIO of WWAN_SAR_DETECT to NC ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75403?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe40b32a572a8d914e01e5cd7927766ccf17c02 Gerrit-Change-Number: 75403 Gerrit-PatchSet: 7 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jynn Chen <jynn.chen(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 05:44:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/mediatek: Enable scramble feature support on fast-k flow
by Xixi Chen (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Xixi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75818?usp=email ) Change subject: soc/mediatek: Enable scramble feature support on fast-k flow ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/75818?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I907bccd4e68e040179e1971db6bf7a57b88dec1b Gerrit-Change-Number: 75818 Gerrit-PatchSet: 3 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 05:43:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/pujjo: Set GPIO of WWAN_SAR_DETECT to NC
by Leo Chou (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Derek Huang, Paul Menzel, Shou-Chieh Hsu, Tarun Tuli. Leo Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75403?usp=email ) Change subject: mb/google/nissa/var/pujjo: Set GPIO of WWAN_SAR_DETECT to NC ...................................................................... Patch Set 7: (2 comments) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/75403/comment/c9026cce_246580f3 : PS1, Line 9: Pujjo not support GPIO based D-SAR, : so set GPP_D15 and GPP_H23 to NC. > *does not* (without *does* it would have fit in one line, that means 72 characters), now it’s still […] Done https://review.coreboot.org/c/coreboot/+/75403/comment/194e9cb9_79ae06b8 : PS1, Line 13: TEST=Build and boot on pujjo > What does work now, that didn’t before? Because Pujjo does not support GPIO based D-SAR, so remove GPIO setting and check WWAN dynamic SAR function is working. -- To view, visit https://review.coreboot.org/c/coreboot/+/75403?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe40b32a572a8d914e01e5cd7927766ccf17c02 Gerrit-Change-Number: 75403 Gerrit-PatchSet: 7 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jynn Chen <jynn.chen(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 05:41:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: soc/mediatek: Add prompt for the SCRAMBLE config
by Xixi Chen (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Xixi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75815?usp=email ) Change subject: soc/mediatek: Add prompt for the SCRAMBLE config ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/common/Kconfig: https://review.coreboot.org/c/coreboot/+/75815/comment/5dd79cb3_ab277719 : PS2, Line 35: default y > Keep `default n` here. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75815?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I703ac9aa3ccc4dd9d0fef9949c6b0d49449971a4 Gerrit-Change-Number: 75815 Gerrit-PatchSet: 3 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 05:41:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: soc/mediatek: Enable scramble feature support on fast-k flow
by Xixi Chen (Code Review) 14 Jun '23

14 Jun '23

Xixi Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75818?usp=email ) Change subject: soc/mediatek: Enable scramble feature support on fast-k flow ...................................................................... soc/mediatek: Enable scramble feature support on fast-k flow Originally, scramble feature is only enabled on full-k. For fast-k flow, needs to add the header config DRAMC_CONFIG_SCRAMBLE. BUG=b:285474337 TEST=Check the scramble feature is disabled on serial build Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Change-Id: I907bccd4e68e040179e1971db6bf7a57b88dec1b --- M src/soc/mediatek/common/Kconfig M src/soc/mediatek/common/memory.c 2 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/75818/1 diff --git a/src/soc/mediatek/common/Kconfig b/src/soc/mediatek/common/Kconfig index 8092aa7..348b9a5 100644 --- a/src/soc/mediatek/common/Kconfig +++ b/src/soc/mediatek/common/Kconfig @@ -32,7 +32,7 @@ config MEDIATEK_DRAM_SCRAMBLE bool "Enable DRAM scramble feature" - default n + default y help This option enables DRAM data scramble, which can prevent DRAM data from being hacked. diff --git a/src/soc/mediatek/common/memory.c b/src/soc/mediatek/common/memory.c index b6f7dde..1a627dd 100644 --- a/src/soc/mediatek/common/memory.c +++ b/src/soc/mediatek/common/memory.c @@ -202,6 +202,8 @@ printk(BIOS_INFO, "DRAM-K: DRAM calibration data valid pass\n"); + if (CONFIG(MEDIATEK_DRAM_SCRAMBLE)) + dparam->header.config |= DRAMC_CONFIG_SCRAMBLE; if (CONFIG(MEDIATEK_DRAM_BLOB_FAST_INIT)) { printk(BIOS_INFO, "DRAM-K: Run fast calibration run in blob mode\n"); -- To view, visit https://review.coreboot.org/c/coreboot/+/75818?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I907bccd4e68e040179e1971db6bf7a57b88dec1b Gerrit-Change-Number: 75818 Gerrit-PatchSet: 1 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2023