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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63424 )
Change subject: tpm: Refactor TPM Kconfig dimensions
......................................................................
Patch Set 20: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63424/comment/6b844cf4_d3851cb3
PS13, Line 7: Kconfig
> Now I have trimmed out the chip. […]
Thanks, please do! I guess this current state is fine enough for a while but long-term it's weird that some of the transport drivers get built for !CONFIG_TPM and others don't.
Patchset:
PS20:
Thanks Jes! I think we're good to go here.
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Hello build bot (Jenkins), Sean Rhodes, Martin L Roth, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: Makefile.inc: Move adding bootblock on non-x86 targets
......................................................................
Makefile.inc: Move adding bootblock on non-x86 targets
This can be done in a separate Makefile target.
Change-Id: I50eae4f00d171d26a221ca969086f4f294fa524b
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
1 file changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/63217/10
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Hello build bot (Jenkins), Martin L Roth, Patrick Georgi, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63306
to look at the new patch set (#8).
Change subject: cbfstool/cbfs_image.c: Drop compatibility for old images
......................................................................
cbfstool/cbfs_image.c: Drop compatibility for old images
Old images should use an old cbfstool. It's too much maintenance to
keep cbfstool compatible with older images so drop code that dealt
with images having a legacy cbfs.
This also drops the possibility to add a cbfs master header as this is
now handled by generating those files directly.
Change-Id: I3c612c5d50948502609e5031b660f7519eabff0a
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M util/cbfstool/cbfs_image.c
M util/cbfstool/cbfstool.c
2 files changed, 0 insertions(+), 160 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/63306/8
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Change subject: cbfstool/cbfs_image.c: Drop compatibility for old images
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63306/comment/8a4eb55d_04483574
PS1, Line 7: cbfs_image.c
> cbfstool/cbfs_image
Done
https://review.coreboot.org/c/coreboot/+/63306/comment/6d568135_cd89a8b9
PS1, Line 9: This has long been fixed.
> What is “this”?
Done
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Change subject: Makefile.inc: Generate master header and pointer as C structs
......................................................................
Patch Set 9:
(5 comments)
File src/lib/cbfs_master_header.c:
https://review.coreboot.org/c/coreboot/+/59132/comment/6d738dd9_29bcc494
PS9, Line 7: __attribute((used))
> Same problem here as the other one.
Done
https://review.coreboot.org/c/coreboot/+/59132/comment/d2292ee2_3cb975ab
PS9, Line 10: /* The offset and romsize fields within the master header are absolute
> nit: https://doc.coreboot.org/contributing/coding_style. […]
Done
https://review.coreboot.org/c/coreboot/+/59132/comment/214fe68f_7ffd2de3
PS9, Line 11: relfect
> typo
Done
https://review.coreboot.org/c/coreboot/+/59132/comment/9fb49e41_adba7e70
PS9, Line 16: FMAP_SECTION_COREBOOT_START + FMAP_SECTION_COREBOOT_SIZE
> Okay, I figured out how that memory-mapped offset thing in these headers works now (and it's honestly pretty horrible, we should try getting rid of that. It seems completely arbitrary which .fmd files define a FLASH@xxx and which don't. Most of our APIs that take a flash offset (e.g. boot_device_ro()) would not know how to deal with a memory-mapped offset like that. I think we only get away with that because we barely use these header constants anymore anyway). But then this line is a problem, because if it's using the memory-mapped offsets this would be a huge number. So you also need to subtract FMAP_SECTION_FLASH_START here again.
agreed.
File src/lib/master_header_pointer.c:
https://review.coreboot.org/c/coreboot/+/59132/comment/bd726dd9_d3bcc034
PS7, Line 13: ATTRIBUTES uint32_t header_pointer =
> I think an easier way to write this is […]
Done
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Arthur Heymans has uploaded a new patch set (#10) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/59132 )
Change subject: Makefile.inc: Generate master header and pointer as C structs
......................................................................
Makefile.inc: Generate master header and pointer as C structs
The makefiles don't like cbfs file names with spaces in them so update
the file name with '_' instead of spaces. To keep the master header at
the top of cbfs, add a placeholder.
This removes the need to handle the cbfs master header in cbfstool.
This functionality will be dropped in a later CL.
On x86 reserve some space in the linker script to add the pointer.
On non-x86 generate a pointer inside a C struct file.
As a bonus this would actually fix the master header pointer mechanism
on Intel/APL as only the bootblock inside IFWI gets memory mapped.
Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
M src/arch/x86/bootblock.ld
M src/lib/Makefile.inc
A src/lib/cbfs_master_header.c
A src/lib/master_header_pointer.c
M src/security/vboot/Makefile.inc
6 files changed, 65 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/59132/10
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Change subject: [UNTESTED] soc/amd/sabrina: enable warm reset functionality
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Reboot works. So does `echo c > /proc/sysrq-trigger`. In both the cases, I can see ramoops captured in /sys/fs/pstore/console-ramoops-0
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Change subject: soc/amd/sabrina/psp_verstage: Unify SVC ID
......................................................................
Patch Set 2:
(2 comments)
File src/soc/amd/sabrina/psp_verstage/svc.h:
https://review.coreboot.org/c/coreboot/+/63729/comment/15526ea5_a6a92f8f
PS1, Line 144:
> Do we have post codes?
Not in the first set of sub-commands being supported. I will bring that up with PSP team for their visibility.
File src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h:
https://review.coreboot.org/c/coreboot/+/63729/comment/f55b3091_3ecec3a2
PS1, Line 150: PRODUCTION
> Can we rename this to NORMAL? It matches the vboot naming.
Done
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Change subject: soc/amd/sabrina/psp_verstage: Add platform_report_boot_mode API
......................................................................
Patch Set 3:
(2 comments)
File src/soc/amd/sabrina/psp_verstage/chipset.c:
https://review.coreboot.org/c/coreboot/+/63730/comment/33f4e3e3_e9cee00e
PS1, Line 52: Production
> Can we rename this to Normal?
Done
https://review.coreboot.org/c/coreboot/+/63730/comment/87575a83_6af90128
PS1, Line 52:
> clang-format
Done
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