coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: mb/google/cherry: support max98390 audio amp
by Rex-BC Chen (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel, Trevor Wu, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63083 ) Change subject: mb/google/cherry: support max98390 audio amp ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/cherry/chromeos.c: https://review.coreboot.org/c/coreboot/+/63083/comment/060ee60f_bf581fc2 PS4, Line 26: > Good idea. is there any example for this? -- To view, visit https://review.coreboot.org/c/coreboot/+/63083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b6bc5a5520292dd502b0389217f5062479b4490 Gerrit-Change-Number: 63083 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 25 Mar 2022 09:16:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Add a configurate "FILL_DRAM_INFO_FROM_BLOB"
by Rex-BC Chen (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63109 ) Change subject: soc/mediatek: Add a configurate "FILL_DRAM_INFO_FROM_BLOB" ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63109/comment/4383550f_60e6a874 PS1, Line 10: emove : this assertion > If adding size to 8192/8195 is very difficult, at least we can add a Kconfig to identify if the SoC […] done. I think we can develop early_init for DRAM if the series of nvme is done. -- To view, visit https://review.coreboot.org/c/coreboot/+/63109 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebe9ea0c1d01890b09fdf586813d85adde9702e1 Gerrit-Change-Number: 63109 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 25 Mar 2022 09:15:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8186: Add support for FILL_DRAM_INFO_FROM_BLOB
by Rex-BC Chen (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63114 ) Change subject: soc/mediatek/mt8186: Add support for FILL_DRAM_INFO_FROM_BLOB ...................................................................... soc/mediatek/mt8186: Add support for FILL_DRAM_INFO_FROM_BLOB The feature "FILL_DRAM_INFO_FROM_BLOB" is supported fro MT8186 DRAM blob. Therefore, we select this configuration. BUG=none TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ieaaf57aaee79c9dce69cc1acaa092207f0f906de --- M src/soc/mediatek/mt8186/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/63114/1 diff --git a/src/soc/mediatek/mt8186/Kconfig b/src/soc/mediatek/mt8186/Kconfig index 654baf2..3d249a6 100644 --- a/src/soc/mediatek/mt8186/Kconfig +++ b/src/soc/mediatek/mt8186/Kconfig @@ -10,6 +10,7 @@ select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON select MEDIATEK_BLOB_FAST_INIT + select FILL_DRAM_INFO_FROM_BLOB if SOC_MEDIATEK_MT8186 -- To view, visit https://review.coreboot.org/c/coreboot/+/63114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaaf57aaee79c9dce69cc1acaa092207f0f906de Gerrit-Change-Number: 63114 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/mediatek: Add a configurate "FILL_DRAM_INFO_FROM_BLOB"
by Rex-BC Chen (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63109 to look at the new patch set (#2). Change subject: soc/mediatek: Add a configurate "FILL_DRAM_INFO_FROM_BLOB" ...................................................................... soc/mediatek: Add a configurate "FILL_DRAM_INFO_FROM_BLOB" There is a assertion error for platforms which dram_info are not implemented in blob, like MT8192 and MT8195. Therefore, we add a configuration "FILL_DRAM_INFO_FROM_BLOB" to control this situation. BUG=none TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Iebe9ea0c1d01890b09fdf586813d85adde9702e1 --- M src/soc/mediatek/common/Kconfig M src/soc/mediatek/common/memory.c 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/63109/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63109 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebe9ea0c1d01890b09fdf586813d85adde9702e1 Gerrit-Change-Number: 63109 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek: Fix assert issue in MT8195
by Hung-Te Lin (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63109 ) Change subject: soc/mediatek: Fix assert issue in MT8195 ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63109/comment/017c4b65_bd6ae179 PS1, Line 10: emove : this assertion > ok, I will ask Xi Chen to fix this issue. […] If adding size to 8192/8195 is very difficult, at least we can add a Kconfig to identify if the SoC supports sdram, and early return in add_mem_chip_info. Or, we may even consider extending the early_init / persistent_data thing, to make dram_size part of it, so every platforms can update the DRAM size in the future. -- To view, visit https://review.coreboot.org/c/coreboot/+/63109 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebe9ea0c1d01890b09fdf586813d85adde9702e1 Gerrit-Change-Number: 63109 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Fri, 25 Mar 2022 09:07:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: commonlib/bsd/elog: Include <stdint.h> instead of <inttypes.h>
by Hsuan-ting Chen (Code Review) 25 Mar '22

25 Mar '22

Hsuan-ting Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63113 ) Change subject: commonlib/bsd/elog: Include <stdint.h> instead of <inttypes.h> ...................................................................... commonlib/bsd/elog: Include <stdint.h> instead of <inttypes.h> The header file <inttypes.h> includes <stdint.h> and defines some additional PRI* macros. Since elog.h and elog.c do not use any of the PRI* macro, we should include <stdint.h> directly. Change-Id: Iac1f4f53e43f171ecef95533cd6a3bf5dff64ec4 --- M src/commonlib/bsd/include/commonlib/bsd/elog.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/63113/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h index 29c781b..35a42e6 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/elog.h +++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h @@ -3,7 +3,7 @@ #ifndef _COMMONLIB_BSD_ELOG_H_ #define _COMMONLIB_BSD_ELOG_H_ -#include <inttypes.h> +#include <stdint.h> #include <commonlib/bsd/cb_err.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/63113 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac1f4f53e43f171ecef95533cd6a3bf5dff64ec4 Gerrit-Change-Number: 63113 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/cherry: Pre-initialize PCIe at the bootblock stage
by Jianjun Wang (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons. Hello Shelley Chen, Hung-Te Lin, build bot (Jenkins), Paul Menzel, Angel Pons, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62359 to look at the new patch set (#21). Change subject: mb/google/cherry: Pre-initialize PCIe at the bootblock stage ...................................................................... mb/google/cherry: Pre-initialize PCIe at the bootblock stage Described in PCIe CEM specification sections 2.2 (PERST# Signal) and 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should be delayed 100ms (TPVPERL) for the power and clock to become stable. Instead of asserting PERST# right before PCIe initialization and wait for 100ms, assert the pin in bootblock stage so that the extra 100ms delay could be avoided. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d --- M src/mainboard/google/cherry/bootblock.c M src/soc/mediatek/mt8195/Makefile.inc 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/62359/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 21 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Add early init support
by Jianjun Wang (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63020 to look at the new patch set (#3). Change subject: soc/mediatek/mt8195: Add early init support ...................................................................... soc/mediatek/mt8195: Add early init support Add early init support for MT8195 platform. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: I4eb7da53ff76c385cab18bbf84970e96b61662ac --- M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/bootblock.c M src/soc/mediatek/mt8195/include/soc/memlayout.ld 3 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/63020/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4eb7da53ff76c385cab18bbf84970e96b61662ac Gerrit-Change-Number: 63020 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek: Add mtk_early_init for passing data across sessions
by Jianjun Wang (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63019 to look at the new patch set (#3). Change subject: soc/mediatek: Add mtk_early_init for passing data across sessions ...................................................................... soc/mediatek: Add mtk_early_init for passing data across sessions Passing pcie timestamp from bootblock stage to ram stage, it can be used for other modules if they needs to passing data across sessions. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a --- M src/soc/mediatek/common/Kconfig A src/soc/mediatek/common/early_init.c A src/soc/mediatek/common/include/soc/early_init.h 3 files changed, 79 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/63019/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a Gerrit-Change-Number: 63019 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/cherry: support max98390 audio amp
by Yu-Ping Wu (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Trevor Wu. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63083 ) Change subject: mb/google/cherry: support max98390 audio amp ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/cherry/chromeos.c: https://review.coreboot.org/c/coreboot/+/63083/comment/6adfef04_abb4d46e PS4, Line 26: > I wonder can we do that by Kconfig 'choice' group, so all the CHERRY_USE_* will be inside a choice g […] Good idea. -- To view, visit https://review.coreboot.org/c/coreboot/+/63083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b6bc5a5520292dd502b0389217f5062479b4490 Gerrit-Change-Number: 63083 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 25 Mar 2022 08:52:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022