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Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68469 )
Change subject: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
......................................................................
Patch Set 8:
(1 comment)
File src/soc/amd/mendocino/chip.h:
https://review.coreboot.org/c/coreboot/+/68469/comment/e11eb512_a05b7ef7
PS4, Line 77: uint32_t sustained_power_limit_mW_B;
: uint32_t fast_ppt_limit_mW_B;
: uint32_t slow_ppt_limit_mW_B;
: uint32_t slow_ppt_time_constant_s_B;
: uint32_t thermctl_limit_degreeC_B;
> Hi Tim, […]
Let's reduce the change to only what's necessary, meaning only the settings that are actually changing between each table. Changing the values will require a new CL anyway, and we can add new fields then if necessary.
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Change subject: soc/amd/mendocino: Enable GPP clk req disabling for disabled devices
......................................................................
Patch Set 6:
(1 comment)
File src/soc/amd/mendocino/fch.c:
https://review.coreboot.org/c/coreboot/+/68139/comment/772e6141_5201a6ec
PS6, Line 149: GPP_CLK_OUTPUT_COUNT
i think ARRAY_SIZE(cfg->gpp_clk_config) can be used here; if not, this needs to be changed to GPP_CLK_OUTPUT_AVAILABLE to not do out of bounds reads. if it's possible to use ARRAY_SIZE, please also change this for cezanne in a follow-up patch
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Change subject: ec/google/chromec: Host event support of DTTS
......................................................................
Patch Set 11:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/67793/comment/cc37ece4_9eca61c9
PS4, Line 7: evet
> typo
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/67793/comment/4077662d_fc321966
PS11, Line 7: ec/google/chromec: Host event support of DTTS
nit: This CL is adding DPTC calls to specific host events. To be more accurate, I'd update this to use the line in the description:
> Add DPTC support for host event 1/2/9
https://review.coreboot.org/c/coreboot/+/67793/comment/10b80ba1_963128bf
PS11, Line 10: 29
Event 29 is not handled by this CL.
File src/ec/google/chromeec/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/67793/comment/09fe2197_3917a8a3
PS8, Line 59:
> whitespace: use a tab, rather than spaces, to match the other lines.
Done
https://review.coreboot.org/c/coreboot/+/67793/comment/50393b77_b9195f91
PS8, Line 60: tempture
> typo
Done
https://review.coreboot.org/c/coreboot/+/67793/comment/cb3c2577_21a45d79
PS8, Line 59: RSV1, 1, // Reserved bit
: STTT, 1, // Switch thermal table by tempture(bit 5)
: STTB, 1, // Switch thermal table by body detection(bit 6)
> Please move this change into a separate CL that describes what they are used for.
Done
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Change subject: soc/amd/cezanne: Factor out common GPP clk req code
......................................................................
Patch Set 6: Code-Review+2
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Change subject: drivers/ipmi/ipmi_ops.h: add __packed to sel_rec structs
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68757/comment/6df20cad_f51d9558
PS1, Line 8:
What is the advantage?
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Change subject: drivers/ipmi/ocp: add functions to get board configuration
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68779/comment/e99870f3_ad0ed918
PS1, Line 9: Add IPMI OEM command to get board configuration.
: Add function to get blade index in the sled
Please format this as a list.
https://review.coreboot.org/c/coreboot/+/68779/comment/2f3bf527_377c6938
PS1, Line 14:
Please remove.
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Hello Tarun Tuli, Michał Żygowski, Maciej Pijanowski, Jason Nien, Subrata Banik, Kapil Porwal, Christian Walter, Tim Wawrzynczak, Nick Vaccaro, Martin Roth, Krystian Hebel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68746
to look at the new patch set (#2).
Change subject: [WIP] security/tpm: make log format configurable via Kconfig
......................................................................
[WIP] security/tpm: make log format configurable via Kconfig
This commit doesn't add any new format options, just makes selecting
existing format explicit. It also adds an indirection through
NEED_VBOOT_COMPATIBILITY option to be able to add more similar changes
in the future without touching the boards.
Modifying Google boards that have TPM to select coreboot-specific
format as they are likely to depend on it.
Ticket: https://ticket.coreboot.org/issues/422
Change-Id: I3903aff54e01093bc9ea75862bbf5989cc6e6c55
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M src/mainboard/google/asurada/Kconfig
M src/mainboard/google/auron/Kconfig
M src/mainboard/google/beltino/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/butterfly/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/cyan/Kconfig
M src/mainboard/google/daisy/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/drallion/Kconfig
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/foster/Kconfig
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/glados/Kconfig
M src/mainboard/google/gru/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/jecht/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/link/Kconfig
M src/mainboard/google/nyan_big/Kconfig
M src/mainboard/google/nyan_blaze/Kconfig
M src/mainboard/google/oak/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/parrot/Kconfig
M src/mainboard/google/peach_pit/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/puff/Kconfig
M src/mainboard/google/rambi/Kconfig
M src/mainboard/google/reef/Kconfig
M src/mainboard/google/rex/Kconfig
M src/mainboard/google/sarien/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/slippy/Kconfig
M src/mainboard/google/smaug/Kconfig
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/stout/Kconfig
M src/mainboard/google/trogdor/Kconfig
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/zork/Kconfig
M src/security/tpm/Kconfig
M src/security/tpm/Makefile.inc
M src/security/tpm/tspi.h
M src/security/tpm/tspi/crtm.h
52 files changed, 110 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/68746/2
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Change subject: drivers/ipmi/ipmi_kcs_ops.c: accomodate BMC revision being 0
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161192):
https://review.coreboot.org/c/coreboot/+/68685/comment/1afa42ac_91516958
PS2, Line 9: BMC major/minor revision may be 0. Get the value directly from
'accomodate' may be misspelled - perhaps 'accommodate'?
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