Attention is currently required from: Arthur Heymans, Kyösti Mälkki.
Kyösti Mälkki has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/58697 )
Change subject: cpu/x86/smm: Retype variables
......................................................................
cpu/x86/smm: Retype variables
Change-Id: I85750282ab274f52bc176a1ac151ef2f9e0dd15d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/x86/mp_init.c
M src/cpu/x86/smm/smm_module_loader.c
M src/include/cpu/x86/smm.h
3 files changed, 45 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/58697/3
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Attention is currently required from: Arthur Heymans.
Kyösti Mälkki has uploaded a new patch set (#4) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/59913 )
Change subject: cpu/x86/Makefile.inc: Build smi_trigger on !HAVE_SMI_HANDLER
......................................................................
cpu/x86/Makefile.inc: Build smi_trigger on !HAVE_SMI_HANDLER
A lot of soc code requires a definition of apm_control, which
smm/smi_trigger.c provided for !HAVE_SMI_HANDLER, but is not added as
a build target.
Fixes building Q35 without smihandler.
Change-Id: Ie57819b3d169311371a1caca83c9b0c796b46048
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/x86/Makefile.inc
R src/cpu/x86/smi_trigger.c
M src/cpu/x86/smm/Makefile.inc
3 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/59913/4
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Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: [NOTFORMERGE] cpu/x86/smm: Drop SMM_LEGACY_ASEG
......................................................................
[NOTFORMERGE] cpu/x86/smm: Drop SMM_LEGACY_ASEG
Change-Id: I4fffffa8d58656bf9881dd97dec6d52789f1c0d2
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/cpu/amd/agesa/family15tn/Makefile.inc
D src/cpu/amd/smm/Makefile.inc
D src/cpu/amd/smm/smm_init.c
M src/cpu/qemu-x86/Kconfig
M src/cpu/x86/Kconfig
M src/cpu/x86/lapic/lapic_cpu_init.c
M src/cpu/x86/smm/Makefile.inc
D src/cpu/x86/smm/smihandler.c
D src/cpu/x86/smm/smm.ld
D src/cpu/x86/smm/smmhandler.S
D src/cpu/x86/smm/smmrelocate.S
D src/include/cpu/x86/smi_deprecated.h
M src/southbridge/intel/i82801ix/Makefile.inc
M src/southbridge/intel/i82801ix/i82801ix.h
M src/southbridge/intel/i82801ix/lpc.c
D src/southbridge/intel/i82801ix/smi.c
M src/southbridge/intel/i82801ix/smihandler.c
17 files changed, 3 insertions(+), 986 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/61495/2
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Attention is currently required from: Arthur Heymans.
Kyösti Mälkki has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/58700 )
Change subject: [WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG
......................................................................
[WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG
This will allow to migrate all platform to the parallel_mp init code
and drop the old lapic_init code.
Change-Id: If499e21a8dc7fca18bd5990f833170d0fc21e10c
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/cpu/x86/Kconfig
M src/cpu/x86/smm/Makefile.inc
M src/cpu/x86/smm/smm_module_handler.c
M src/cpu/x86/smm/smm_module_loader.c
4 files changed, 120 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/58700/3
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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro, EricR Lai,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Allow mainboard to lock PCH_WP_OD GPIO PADs
......................................................................
mb/google/brya: Allow mainboard to lock PCH_WP_OD GPIO PADs
BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests
PCH_WP_OD is locked.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Ia125c513c09ecbb1047100e72f8540369646988e
---
M src/mainboard/google/brya/variants/baseboard/brask/gpio.c
M src/mainboard/google/brya/variants/baseboard/brya/gpio.c
2 files changed, 2 insertions(+), 3 deletions(-)
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: mb/google/brya: Allow mainboard to lock GSC_PCH_INT_ODL GPIO PADs
......................................................................
mb/google/brya: Allow mainboard to lock GSC_PCH_INT_ODL GPIO PADs
BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests
GSC_PCH_INT_ODL is locked.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Icfc251152278c59f9a94b84fcd8c6d36c26bff62
---
M src/mainboard/google/brya/variants/baseboard/brask/gpio.c
M src/mainboard/google/brya/variants/baseboard/brya/gpio.c
2 files changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/61500/2
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Name of user not set #1003801 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58869 )
Change subject: drivers/intel/fsp2_0/include/fsp: fix fsp_header
......................................................................
Patch Set 9:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58869/comment/770ada10_f694033e
PS8, Line 8:
> Please describe the problem (caused by unaligned FSP header). […]
Ack
File src/drivers/intel/fsp2_0/header_display.c:
https://review.coreboot.org/c/coreboot/+/58869/comment/2eaaa132_e96c6182
PS8, Line 28: %s
> this probably needs to be %. […]
Ack
https://review.coreboot.org/c/coreboot/+/58869/comment/6cda90b8_6d62dc46
PS8, Line 29: hdr->image_id
> this is no longer a zero terminated c string, so you need to adjust the printk format specifier to o […]
Ack
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/58869/comment/a5abc2ae_5249025d
PS8, Line 29: api_entry_num
> this should probably be res2. a change from the fsp info header block from the fsp 1.1 to fsp 2. […]
Ack
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/58869/comment/da521f19_90c489d9
PS7, Line 30: temp
> The version of the spec I have indeed only has the […]
Ack
File src/drivers/intel/fsp2_0/util.c:
https://review.coreboot.org/c/coreboot/+/58869/comment/10054c49_1fc5a1cb
PS8, Line 54: if (!looks_like_fsp_header(raw_hdr))
> i'd pass a struct fsp_header to looks_like_fsp_header instead of the raw binary to avoid using hard- […]
Ack
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Attention is currently required from: Jason Glenesk, Raul Rangel, Subrata Banik, Marshall Dawson, Name of user not set #1003801, Andrey Petrov, Julian Schroeder, Patrick Rudolph.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Subrata Banik, Marshall Dawson, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, Julian Schroeder, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58869
to look at the new patch set (#9).
Change subject: drivers/intel/fsp2_0/include/fsp: fix fsp_header
......................................................................
drivers/intel/fsp2_0/include/fsp: fix fsp_header
This patch aligns fsp_header with the Intel specification 2.0 and 2.3.
The main impetus for this change is to make the fsp_info_header fully
accessible in soc/vendor code. Here items such as image_revision can be
checked.
TEST=verify image revision output in the coreboot serial log.
compare to FSP version shown in serial debug output.
verify Google Guybrush machine boots into OS.
Signed-off-by: Julian Schroeder <julianmarcusschroeder(a)gmail.com>
Change-Id: Ibf50f16b5e9793d946a95970fcdabc4c07289646
---
M src/drivers/intel/fsp2_0/header_display.c
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
M src/drivers/intel/fsp2_0/util.c
6 files changed, 52 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/58869/9
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