coreboot-gerrit January 2022

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Change in coreboot[master]: mb/google/corsola: Enable the SD card reader
by Hung-Te Lin (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60780 ) Change subject: mb/google/corsola: Enable the SD card reader ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec Gerrit-Change-Number: 60780 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:56:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Enable the SD card reader
by Rex-BC Chen (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60780 ) Change subject: mb/google/corsola: Enable the SD card reader ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec Gerrit-Change-Number: 60780 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:39:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Enable the SD card reader
by Rex-BC Chen (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60780 ) Change subject: mb/google/corsola: Enable the SD card reader ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60780/comment/45f87bef_0b2aa525 PS4, Line 7: > the Done https://review.coreboot.org/c/coreboot/+/60780/comment/f44ad065_f0b2a909 PS4, Line 9: a > an Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec Gerrit-Change-Number: 60780 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:39:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Enable the SD card reader
by Rex-BC Chen (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60780 to look at the new patch set (#5). Change subject: mb/google/corsola: Enable the SD card reader ...................................................................... mb/google/corsola: Enable the SD card reader The Kingler board has an SD card reader connected via USB and can be enabled by setting GPIO EN_PP3300_SDBRDG_X to output mode and activated. BUG=b:211385131 TEST=boot kernel using SD card. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/gpio.h M src/mainboard/google/corsola/mainboard.c 3 files changed, 9 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/60780/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec Gerrit-Change-Number: 60780 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: update USB3 settings for passing SI
by Kenneth Chan (Code Review) 06 Jan '22

06 Jan '22

Kenneth Chan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60809 ) Change subject: mb/google/guybrush/var/dewatt: update USB3 settings for passing SI ...................................................................... mb/google/guybrush/var/dewatt: update USB3 settings for passing SI Update tx/rx term control to 3 for passing USB3 port 0/1 SI. b:199468920 TEST= emerge-guybrush coreboot; build and pass USB3 SI. Signed-off-by: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Change-Id: I637207d7c657f6dd71d70694f9a5fb35f8294b64 --- M src/mainboard/google/guybrush/variants/dewatt/overridetree.cb 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/60809/1 diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb index f34bac8..bc63fd1 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb @@ -18,7 +18,7 @@ register "telemetry_vddcrsocfull_scale_current_mA" = "31481" #mA register "telemetry_vddcrsocoffset" = "193" - #USB 2.0 phy config + #USB 2/3 phy config register "usb_phy" = "{ /* Left USB C0 Port */ .Usb2PhyPort[0] = { @@ -56,6 +56,20 @@ .txhsxvtune = 3, .txrestune = 1, }, + /* Left USB C0 Port */ + .Usb3PhyPort[0] = { + .tx_term_ctrl=3, + .rx_term_ctrl=3, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, + /* Left USB A0 Port */ + .Usb3PhyPort[1] = { + .tx_term_ctrl=3, + .rx_term_ctrl=3, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, }" # general purpose PCIe clock output configuration -- To view, visit https://review.coreboot.org/c/coreboot/+/60809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I637207d7c657f6dd71d70694f9a5fb35f8294b64 Gerrit-Change-Number: 60809 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/gimble: Decrease touchscreen T3 timing to 200ms
by Scott Chao (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Nick Vaccaro. Scott Chao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60270 ) Change subject: mb/google/brya/var/gimble: Decrease touchscreen T3 timing to 200ms ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60270/comment/0517981a_78e80475 PS3, Line 9: We set T3 as 300ms to meet Elan's spec, but the resume/suspend times are greater than 500ms, which is the spec for Chromebooks. The actual kernel timing has been measured, and given the ACPI delay after deasserting reset in addition to : the delay until the kernel driver accesses the device, delaying : only 200ms in the ACPI method is also sufficient to meet the 300ms : requirement. > reflow text for 72 characters wide please Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bb4eda09686cb59b6e19c741aa2b78d84332d2a Gerrit-Change-Number: 60270 Gerrit-PatchSet: 4 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:26:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Enable SD card reader
by Hung-Te Lin (Code Review) 06 Jan '22

06 Jan '22

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60780 ) Change subject: mb/google/corsola: Enable SD card reader ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60780/comment/10bfaa37_2affe750 PS4, Line 7: the https://review.coreboot.org/c/coreboot/+/60780/comment/92690e6a_cafb653f PS4, Line 9: a an -- To view, visit https://review.coreboot.org/c/coreboot/+/60780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I903731ea4906328b2f0f5a7c6c06bd9c964d24ec Gerrit-Change-Number: 60780 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:26:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change I2C/DDC signals and the EN_PP3300_SS...
by build bot (Jenkins) (Code Review) 06 Jan '22

06 Jan '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60808 ) Change subject: mb/google/brya/var/brask: Change I2C/DDC signals and the EN_PP3300_SSD from GPP_D11 to GPP_F14 ...................................................................... Patch Set 1: (2 comments) File src/drivers/net/r8168.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-137418): https://review.coreboot.org/c/coreboot/+/60808/comment/dc1dc79d_54b7e004 PS1, Line 258: printk(BIOS_DEBUG, "r8125: read back LED global feature setting as 0x%x\n", inb(io_base + CMD_LED_FEATURE)); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-137418): https://review.coreboot.org/c/coreboot/+/60808/comment/015b4302_eb344f7d PS1, Line 293: } else { suspect code indent for conditional statements (8, 8) -- To view, visit https://review.coreboot.org/c/coreboot/+/60808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10605f6ce3349f27f2c10592c703f53099d4b205 Gerrit-Change-Number: 60808 Gerrit-PatchSet: 1 Gerrit-Owner: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Jan 2022 02:25:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change I2C/DDC signals and the EN_PP3300_SS...
by Rory Liu (Code Review) 06 Jan '22

06 Jan '22

Rory Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60808 ) Change subject: mb/google/brya/var/brask: Change I2C/DDC signals and the EN_PP3300_SSD from GPP_D11 to GPP_F14 ...................................................................... mb/google/brya/var/brask: Change I2C/DDC signals and the EN_PP3300_SSD from GPP_D11 to GPP_F14 The latest schematics changes the EN_PP3300_SSD from GPP_D11 to GPP_F14,I2C/DDC signals from GPP_E22/E23 to GPP_D11/D12. BUG=b:206602609 TEST=build pass Signed-off-by: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Change-Id: I10605f6ce3349f27f2c10592c703f53099d4b205 --- M src/drivers/net/r8168.c 1 file changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/60808/1 diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 2299a99..e4319b7 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -255,10 +255,9 @@ if (dev->device == PCI_DEVICE_ID_REALTEK_8125) { /* Set LED global Feature register */ outb(config->led_feature, io_base + CMD_LED_FEATURE); - printk(BIOS_DEBUG, "r8125: read back LED global feature setting as 0x%x\n", - inb(io_base + CMD_LED_FEATURE)); + printk(BIOS_DEBUG, "r8125: read back LED global feature setting as 0x%x\n", inb(io_base + CMD_LED_FEATURE)); - /* + /* * Refer to RTL8125 datasheet 5.Customizable LED Configuration * Register Name IO Address * LEDSEL0 0x18 @@ -293,7 +292,7 @@ inw(io_base + CMD_LEDSEL2)); } else { /* Read the customized LED setting from devicetree */ - printk(BIOS_DEBUG, "r8168: Customized LED 0x%x\n", config->customized_leds); + printk(BIOS_DEBUG, "r8168: Customized LED 0x%x\n", config->customized_leds); /* * Refer to RTL8111H datasheet 7.2 Customizable LED Configuration -- To view, visit https://review.coreboot.org/c/coreboot/+/60808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10605f6ce3349f27f2c10592c703f53099d4b205 Gerrit-Change-Number: 60808 Gerrit-PatchSet: 1 Gerrit-Owner: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
by Hung-Te Lin (Code Review) 06 Jan '22

06 Jan '22

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB ...................................................................... soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB The current CBFS mcache size (roughly 7KiB) is insufficient for mt8186, so we need to increase it by 1KiB (and decrease the stack by 1KiB). Error logs: CBFS ERROR: mcache overflow, should increase CBFS_MCACHE size! CBFS: mcache @0x0010e004 built for 63 files, used 0xde4 of 0xdfc bytes BUG=b:202871018 TEST=no cbfs error logs. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Reviewed-on: https://review.coreboot.org/c/coreboot/+/60529 Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/mediatek/mt8186/include/soc/memlayout.ld 1 file changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/soc/mediatek/mt8186/include/soc/memlayout.ld b/src/soc/mediatek/mt8186/include/soc/memlayout.ld index 36078d3..942c919 100644 --- a/src/soc/mediatek/mt8186/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8186/include/soc/memlayout.ld @@ -23,13 +23,13 @@ { SRAM_START(0x00100000) VBOOT2_WORK(0x00100000, 12K) - STACK(0x00103000, 8K) - TTB(0x00105000, 28K) - DMA_COHERENT(0x0010C000, 4K) - TPM_TCPA_LOG(0x0010D000, 2K) - FMAP_CACHE(0x0010D800, 2K) - WATCHDOG_TOMBSTONE(0x0010E000, 4) - CBFS_MCACHE(0x0010E004, 7K - 4) + TTB(0x00103000, 28K) + DMA_COHERENT(0x0010A000, 4K) + TPM_TCPA_LOG(0x0010B000, 2K) + FMAP_CACHE(0x0010B800, 2K) + WATCHDOG_TOMBSTONE(0x0010C000, 4) + CBFS_MCACHE(0x0010C004, 8K - 4) + STACK(0x0010E000, 7K) TIMESTAMP(0x0010FC00, 1K) /* MT8186 has 64KB SRAM. */ SRAM_END(0x00110000) -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 13 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2022