coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Nico Huber (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Subrata Banik, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > In future platform, PCI config 0x18 still has memory bar but display memory may not same as memory bar address. So, in case it is not at the same address, where will it be? -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 8 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 28 Jan 2022 23:02:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: Add display external clock support in coreboot
by mturney mturney (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Ravi kumar. mturney mturney has uploaded a new patch set (#7) to the change originally created by Ravi kumar. ( https://review.coreboot.org/c/coreboot/+/59611 ) Change subject: qualcomm/sc7280: Add display external clock support in coreboot ...................................................................... qualcomm/sc7280: Add display external clock support in coreboot Add support for EDP (Embedded DisplayPort) clocks in coreboot. This change supports the configuration and enablement of EDP PIXEL, LINK, LINK_INTF and AUX clocks. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Taniya Das <quic_tdas(a)quicinc.com> Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 --- M src/soc/qualcomm/sc7280/clock.c M src/soc/qualcomm/sc7280/include/soc/clock.h 2 files changed, 53 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/59611/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 Gerrit-Change-Number: 59611 Gerrit-PatchSet: 7 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-CC: Taniya Das <tdas(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7280: Add Modem region to avoid modem cleanup in Secboot reboot
by mturney mturney (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Shelley Chen, Ravi kumar, Sudheer Amrabadi, mturney mturney. mturney mturney has uploaded a new patch set (#22) to the change originally created by Ravi kumar. ( https://review.coreboot.org/c/coreboot/+/58545 ) Change subject: sc7280: Add Modem region to avoid modem cleanup in Secboot reboot ...................................................................... sc7280: Add Modem region to avoid modem cleanup in Secboot reboot Modem uses different memory regions based on LTE/WiFi. This adds correct carve-out to prevent region being disturbed. BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: T Michael Turney <quic_mturney(a)quicinc.com> Change-Id: I56bfb210606b08893ff71dd1b6679f1ec102ec95 --- M src/soc/qualcomm/common/include/soc/symbols_common.h M src/soc/qualcomm/sc7280/Makefile.inc A src/soc/qualcomm/sc7280/carve_out.c M src/soc/qualcomm/sc7280/memlayout.ld M src/soc/qualcomm/sc7280/soc.c 5 files changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/58545/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/58545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56bfb210606b08893ff71dd1b6679f1ec102ec95 Gerrit-Change-Number: 58545 Gerrit-PatchSet: 22 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control
by Cliff Huang (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Hello Bora Guvendik, Anil Kumar K, build bot (Jenkins), Selma Bensaid, Tim Wawrzynczak, Thejaswani Putta, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61353 to look at the new patch set (#2). Change subject: soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control ...................................................................... soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control - Optional feature to provide mechanism to skip _OFF and _On execution. - It is used for the device to skip _OFF and _ON during device driver reload. - _OFS is used to skip _OFF Method at the end of device driver removal. - _ONS is used to skip _ON Method at the beginning of driver loading. - General flow use case: 1. Device driver is removed by 'rmmod' command. 2. Device _RST is called. _RST perform reset. 3. Device sets _OFS in _RST to skip the following _OFF invoked by OSPM. 4. OSPM invokes _OFF at the end of driver removal. 5. _OFF sees _OFS and skips current execution and clears _OFS so that _OFF will be executed normally next time. 6. _OFF sets _ONS to skip the following _ON invoked by OSPM. 7. Device driver is reloaded by 'insmod/modprobe' command. 8. OSPM invokes _ON at the beginning of driver loading. 9. _ON sees _ONS and skip current execution and clears _ONS so that _ON will be executed normally next time. - In normal case: When suspend, OSPM invokes _OFF and _OFS is not set, so the device goes to deeper state as expected. When resume, OSPM invokes _ON and _ONS is not set, so the device goes to active state as expected. - Generated changes: PowerResource (RTD3, 0x00, 0x0000) Name (_ONS, Zero) Name (_OFS, Zero) ... Method (_ON, 0, Serialized) // _ON_: Power On { If ((_ONS == Zero)) { ... } ElseIf ((_ONS == One)) { _ONS = Zero } } Method (_OFF, 0, Serialized) // _OFF: Power Off { If ((_OFS == Zero)) { ... } ElseIf ((_OFS == One)) { _OFS = Zero _ONS = One } } Test: Enable and verify _OFS and _ONS Name objects and the if-condition logic inside _OFF and _ON metheds is added. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ic32d151d65107bfc220258c383a575e40a496b6f --- M src/soc/intel/common/block/pcie/rtd3/chip.h M src/soc/intel/common/block/pcie/rtd3/rtd3.c 2 files changed, 58 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/61353/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic32d151d65107bfc220258c383a575e40a496b6f Gerrit-Change-Number: 61353 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Wonkyu Kim (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Subrata Banik, Nico Huber, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > So is it an offset in the PCI BAR? or completely differently configured? It […] PCI config space offset 0x18 returns memory bar address and display memory(memory_base) which we need to be returned in the fucntion(graphics_get_memory_base) has same address as graphic IP maps. That what we have in graphics_get_memory_base implmentation. In future platform, PCI config 0x18 still has memory bar but display memory may not same as memory bar address. So, we need to overide address based on graphic IP address mapping per platform. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 8 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 28 Jan 2022 22:51:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Tim Wawrzynczak (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Lance Zhao, Anil Kumar K, Cliff Huang, Selma Bensaid, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 ) Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/pcie/rtd3/chip.h: https://review.coreboot.org/c/coreboot/+/61352/comment/d36381ff_79a81351 PS1, Line 53: ext_pm_support > Hi Tim, […] Actually this file would be included in `static.c`, therefore devicetrees that use this driver will be able to use things defined in this file, so I think the enum should work just fine, The table is nice, though! -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 28 Jan 2022 22:38:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lance Zhao Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variant/agah: Update memory settings
by Tim Wawrzynczak (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Bora Guvendik, Tony Huang, Selma Bensaid, Derek Huang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61313 ) Change subject: mb/google/brya/variant/agah: Update memory settings ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib45241d708d025ca75ed06e2bcf3997558723a62 Gerrit-Change-Number: 61313 Gerrit-PatchSet: 4 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Derek Huang <derek.huang(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Derek Huang <derek.huang(a)intel.com> Gerrit-Comment-Date: Fri, 28 Jan 2022 22:32:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Nico Huber (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > memory base can't be extracted directly from PCI config value like common code and based on mapping […] So is it an offset in the PCI BAR? or completely differently configured? It would be much easier to understand if you would point us to the implementation. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 8 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 28 Jan 2022 22:32:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Cliff Huang (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Lance Zhao, Anil Kumar K, Selma Bensaid, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Selma Bensaid, Tim Wawrzynczak, Thejaswani Putta, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61352 to look at the new patch set (#2). Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... soc/intel/common/block/pcie/rtd3: Add PM methods to the device. Add L23 enter/exit, modPHY power gate, and source clock control methods. DL23: method for L2/L3 entry. L23D: method for L2/L3 exit. PSD0: method for modPHY power gate. SRCK: method for enabling/disable source clock. These optional methods are to be used in the device ACPI to construct flows with root port's power management functions. Test: Enable and verify DL23, L23D, PSD0, SRCK methods in ssdt. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f --- M src/soc/intel/common/block/pcie/rtd3/chip.h M src/soc/intel/common/block/pcie/rtd3/rtd3.c 2 files changed, 77 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/61352/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Add the Primary to Sideband bridge library
by Wonkyu Kim (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Wonkyu Kim, John Zhao, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61283 ) Change subject: soc/intel/common: Add the Primary to Sideband bridge library ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/61283 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I63f58584e8c3bfe42cdd81912e1e5140337c2d55 Gerrit-Change-Number: 61283 Gerrit-PatchSet: 7 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 28 Jan 2022 22:22:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2022