coreboot-gerrit July 2021

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Change in coreboot[master]: soc/intel/common: Use SPR for backing up data way and eviction mask
by Subrata Banik (Code Review) 11 Jul '21

11 Jul '21

Attention is currently required from: Furquan Shaikh, Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56161 to look at the new patch set (#3). Change subject: soc/intel/common: Use SPR for backing up data way and eviction mask ...................................................................... soc/intel/common: Use SPR for backing up data way and eviction mask This patch replaces the usage of GPR (General Purpose Registers) like ECX and EBX for backing up data way and non-eviction mask with SPR (Special Purpose Registers) EDI and ESI. Purpose of this change is to ensure the safety while developers might use ECX often while doing rdmsr/wrmsr rather than making use of EDI. TEST=Able to boot JSL and TGL platform without any hang using eNEM. Change-Id: I12e0cb7bb050e4f7b17ecf30108db335d1d82ab7 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/cpu/car/cache_as_ram.S 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/56161/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56161 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12e0cb7bb050e4f7b17ecf30108db335d1d82ab7 Gerrit-Change-Number: 56161 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/sconfig: Remove unused devicetree keywords ESPI & LPC
by Martin Roth (Code Review) 11 Jul '21

11 Jul '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56197 ) Change subject: util/sconfig: Remove unused devicetree keywords ESPI & LPC ...................................................................... util/sconfig: Remove unused devicetree keywords ESPI & LPC The ESPI & LPC keywords were added for the zork program, but it was found that they weren't needed, so they were never used. BUG=None TEST=Build Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: I3a78afc55477d62eac8056e2ca4bcdd3ab12ea47 --- M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 6 files changed, 252 insertions(+), 275 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/56197/1 diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index f62bada..07cb64b 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -349,8 +349,8 @@ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; -#define YY_NUM_RULES 51 -#define YY_END_OF_BUFFER 52 +#define YY_NUM_RULES 49 +#define YY_END_OF_BUFFER 50 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -358,31 +358,31 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static const flex_int16_t yy_accept[207] = +static const flex_int16_t yy_accept[202] = { 0, - 0, 0, 52, 50, 1, 3, 50, 50, 50, 45, - 45, 42, 46, 50, 46, 46, 46, 46, 46, 50, - 50, 50, 50, 50, 50, 50, 50, 50, 50, 43, - 50, 1, 3, 50, 0, 50, 50, 0, 2, 45, - 46, 50, 50, 50, 9, 50, 50, 46, 50, 50, - 50, 50, 50, 50, 50, 50, 50, 50, 50, 36, - 50, 50, 50, 50, 50, 50, 15, 50, 50, 50, - 50, 50, 50, 50, 50, 50, 49, 49, 50, 0, - 44, 50, 50, 50, 25, 50, 50, 35, 40, 50, - 50, 50, 50, 50, 50, 22, 50, 50, 34, 50, + 0, 0, 50, 48, 1, 3, 48, 48, 48, 43, + 43, 40, 44, 48, 44, 44, 44, 44, 44, 48, + 48, 48, 48, 48, 48, 48, 48, 48, 48, 41, + 48, 1, 3, 48, 0, 48, 48, 0, 2, 43, + 44, 48, 48, 48, 9, 48, 48, 44, 48, 48, + 48, 48, 48, 48, 48, 48, 48, 48, 34, 48, + 48, 48, 48, 48, 15, 48, 48, 48, 48, 48, + 48, 48, 48, 48, 47, 47, 48, 0, 42, 48, + 48, 48, 25, 48, 48, 33, 38, 48, 48, 48, + 48, 48, 22, 48, 48, 32, 48, 48, 48, 16, - 31, 50, 50, 16, 50, 19, 21, 50, 8, 50, - 50, 29, 50, 30, 7, 50, 0, 47, 50, 4, - 50, 50, 50, 32, 50, 50, 50, 33, 50, 50, - 50, 50, 50, 28, 50, 50, 50, 50, 50, 48, - 48, 6, 50, 50, 50, 12, 50, 50, 50, 50, - 50, 23, 50, 50, 14, 50, 50, 50, 50, 5, - 26, 50, 50, 17, 50, 20, 50, 13, 50, 50, - 50, 50, 50, 27, 38, 50, 50, 50, 50, 50, - 50, 50, 50, 50, 10, 50, 50, 50, 11, 50, - 18, 50, 50, 50, 37, 50, 50, 24, 50, 39, + 48, 19, 21, 48, 8, 48, 48, 29, 48, 30, + 7, 48, 0, 45, 48, 4, 48, 48, 48, 48, + 48, 48, 31, 48, 48, 48, 48, 48, 28, 48, + 48, 48, 48, 48, 46, 46, 6, 48, 48, 48, + 12, 48, 48, 48, 48, 48, 23, 48, 48, 14, + 48, 48, 48, 48, 5, 26, 48, 48, 17, 48, + 20, 48, 13, 48, 48, 48, 48, 48, 27, 36, + 48, 48, 48, 48, 48, 48, 48, 48, 48, 10, + 48, 48, 48, 11, 48, 18, 48, 48, 48, 35, + 48, 48, 24, 48, 37, 48, 48, 48, 48, 39, - 50, 50, 50, 50, 41, 0 + 0 } ; static const YY_CHAR yy_ec[256] = @@ -425,138 +425,136 @@ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } ; -static const flex_int16_t yy_base[214] = +static const flex_int16_t yy_base[209] = { 0, - 0, 0, 279, 0, 276, 280, 274, 39, 43, 40, - 238, 0, 46, 261, 56, 60, 64, 67, 72, 56, - 249, 74, 26, 61, 77, 82, 252, 81, 239, 0, - 0, 269, 280, 89, 265, 110, 115, 266, 280, 0, - 112, 115, 253, 242, 0, 241, 230, 121, 237, 232, - 242, 231, 239, 243, 230, 232, 236, 236, 230, 236, - 221, 221, 231, 221, 223, 225, 0, 212, 220, 214, - 214, 116, 224, 216, 222, 122, 0, 280, 139, 234, - 0, 227, 220, 206, 219, 209, 216, 0, 0, 207, - 205, 211, 208, 199, 207, 0, 205, 195, 0, 199, + 0, 0, 274, 0, 271, 275, 269, 39, 43, 40, + 233, 0, 46, 256, 56, 60, 64, 67, 72, 56, + 244, 74, 251, 39, 70, 59, 246, 77, 233, 0, + 0, 263, 275, 108, 259, 112, 116, 260, 275, 0, + 113, 116, 247, 236, 0, 235, 224, 122, 231, 226, + 236, 234, 238, 225, 227, 231, 231, 225, 231, 216, + 216, 217, 219, 221, 0, 208, 216, 210, 210, 117, + 220, 212, 218, 87, 0, 275, 139, 230, 0, 223, + 216, 202, 215, 205, 212, 0, 0, 202, 208, 205, + 196, 204, 0, 202, 192, 0, 196, 200, 190, 0, - 0, 203, 193, 0, 196, 0, 0, 202, 0, 194, - 193, 0, 184, 0, 0, 211, 210, 0, 181, 0, - 194, 193, 186, 0, 190, 180, 176, 0, 186, 174, - 180, 185, 186, 0, 173, 180, 167, 170, 159, 0, - 280, 0, 171, 175, 167, 0, 166, 168, 164, 166, - 171, 0, 155, 160, 0, 153, 153, 152, 149, 0, - 0, 161, 163, 0, 147, 164, 150, 0, 157, 161, - 142, 142, 149, 0, 0, 148, 140, 139, 137, 135, - 121, 131, 121, 113, 0, 125, 123, 128, 0, 117, - 0, 118, 121, 113, 0, 97, 105, 0, 88, 0, + 193, 0, 0, 199, 0, 191, 190, 0, 181, 0, + 0, 208, 207, 0, 178, 0, 191, 190, 183, 187, + 177, 173, 0, 183, 171, 177, 182, 183, 0, 170, + 177, 164, 167, 156, 0, 275, 0, 168, 172, 164, + 0, 163, 165, 161, 163, 168, 0, 152, 157, 0, + 150, 150, 149, 146, 0, 0, 158, 160, 0, 144, + 161, 147, 0, 154, 158, 139, 139, 146, 0, 0, + 132, 124, 123, 121, 132, 118, 128, 118, 110, 0, + 122, 120, 125, 0, 114, 0, 114, 107, 94, 0, + 82, 81, 0, 83, 0, 74, 67, 37, 31, 0, - 78, 66, 37, 47, 0, 280, 49, 157, 159, 161, - 163, 165, 167 + 275, 42, 158, 160, 162, 164, 166, 168 } ; -static const flex_int16_t yy_def[214] = +static const flex_int16_t yy_def[209] = { 0, - 206, 1, 206, 207, 206, 206, 207, 208, 209, 207, - 10, 207, 10, 207, 10, 10, 10, 10, 10, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 206, 206, 208, 210, 211, 209, 212, 206, 10, - 10, 10, 207, 207, 207, 207, 207, 10, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 206, 211, 213, - 42, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, + 201, 1, 201, 202, 201, 201, 202, 203, 204, 202, + 10, 202, 10, 202, 10, 10, 10, 10, 10, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 201, 201, 203, 205, 206, 204, 207, 201, 10, + 10, 10, 202, 202, 202, 202, 202, 10, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 201, 206, 208, 42, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 206, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 206, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, - 207, 207, 207, 207, 207, 207, 207, 207, 207, 207, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 201, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 201, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, - 207, 207, 207, 207, 207, 0, 206, 206, 206, 206, - 206, 206, 206 + 0, 201, 201, 201, 201, 201, 201, 201 } ; -static const flex_int16_t yy_nxt[321] = +static const flex_int16_t yy_nxt[316] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, 13, 13, 14, 4, 4, 4, 15, 13, 16, 17, 18, 19, 20, 21, 22, 23, 24, 4, 25, 26, 4, 27, 28, 4, 29, 4, 4, 4, 4, 30, - 35, 35, 62, 36, 38, 39, 40, 40, 40, 31, - 41, 41, 41, 41, 41, 63, 41, 41, 41, 41, - 41, 41, 41, 41, 41, 205, 41, 41, 41, 204, - 41, 41, 41, 41, 41, 41, 55, 64, 41, 41, - 41, 44, 58, 46, 48, 56, 203, 65, 45, 47, - 35, 35, 49, 77, 51, 50, 53, 202, 66, 52, + 35, 35, 31, 36, 38, 39, 40, 40, 40, 200, + 41, 41, 41, 41, 41, 62, 41, 41, 41, 41, + 41, 41, 41, 41, 41, 63, 41, 41, 41, 199, + 41, 41, 41, 41, 41, 41, 54, 67, 41, 41, + 41, 44, 57, 46, 48, 55, 68, 198, 45, 47, + 69, 64, 49, 197, 51, 50, 52, 65, 196, 66, - 69, 59, 60, 201, 67, 61, 68, 73, 54, 70, - 74, 80, 80, 71, 31, 75, 38, 39, 41, 41, - 41, 81, 81, 81, 200, 81, 81, 41, 41, 41, - 199, 81, 81, 81, 81, 81, 81, 109, 110, 114, - 80, 80, 115, 116, 198, 197, 196, 195, 194, 193, - 192, 191, 190, 189, 188, 187, 86, 34, 34, 37, - 37, 35, 35, 79, 79, 38, 38, 80, 80, 186, - 185, 184, 183, 182, 181, 180, 179, 178, 177, 176, - 175, 174, 173, 172, 171, 170, 169, 168, 167, 166, - 165, 164, 163, 162, 161, 160, 159, 158, 157, 156, + 195, 58, 59, 71, 110, 60, 72, 111, 53, 35, + 35, 73, 75, 78, 78, 194, 31, 38, 39, 41, + 41, 41, 79, 79, 79, 193, 79, 79, 41, 41, + 41, 192, 79, 79, 79, 79, 79, 79, 105, 106, + 78, 78, 191, 112, 190, 189, 188, 187, 186, 185, + 184, 183, 182, 181, 180, 179, 178, 84, 34, 34, + 37, 37, 35, 35, 77, 77, 38, 38, 78, 78, + 177, 176, 175, 174, 173, 172, 171, 170, 169, 168, + 167, 166, 165, 164, 163, 162, 161, 160, 159, 158, + 157, 156, 155, 154, 153, 152, 151, 150, 149, 148, - 155, 154, 153, 152, 151, 150, 149, 148, 147, 146, - 145, 144, 143, 142, 141, 140, 139, 138, 137, 136, - 135, 134, 133, 132, 131, 130, 129, 128, 127, 126, - 125, 124, 123, 122, 121, 120, 119, 118, 117, 113, - 112, 111, 108, 107, 106, 105, 104, 103, 102, 101, - 100, 99, 98, 97, 96, 95, 94, 93, 92, 91, - 90, 89, 88, 87, 85, 84, 83, 82, 39, 78, - 32, 76, 72, 57, 43, 42, 33, 32, 206, 3, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, + 147, 146, 145, 144, 143, 142, 141, 140, 139, 138, + 137, 136, 135, 134, 133, 132, 131, 130, 129, 128, + 127, 126, 125, 124, 123, 122, 121, 120, 119, 118, + 117, 116, 115, 114, 113, 109, 108, 107, 104, 103, + 102, 101, 100, 99, 98, 97, 96, 95, 94, 93, + 92, 91, 90, 89, 88, 87, 86, 85, 83, 82, + 81, 80, 39, 76, 32, 74, 70, 61, 56, 43, + 42, 33, 32, 201, 3, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206 + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201 } ; -static const flex_int16_t yy_chk[321] = +static const flex_int16_t yy_chk[316] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 8, 8, 23, 8, 9, 9, 10, 10, 10, 207, - 10, 10, 13, 13, 13, 23, 10, 10, 10, 10, - 10, 10, 15, 15, 15, 204, 16, 16, 16, 203, - 17, 17, 17, 18, 18, 18, 20, 24, 19, 19, - 19, 15, 22, 16, 17, 20, 202, 24, 15, 16, - 34, 34, 17, 34, 18, 17, 19, 201, 25, 18, + 8, 8, 202, 8, 9, 9, 10, 10, 10, 199, + 10, 10, 13, 13, 13, 24, 10, 10, 10, 10, + 10, 10, 15, 15, 15, 24, 16, 16, 16, 198, + 17, 17, 17, 18, 18, 18, 20, 26, 19, 19, + 19, 15, 22, 16, 17, 20, 26, 197, 15, 16, + 26, 25, 17, 196, 18, 17, 19, 25, 194, 25, - 26, 22, 22, 199, 25, 22, 25, 28, 19, 26, - 28, 36, 36, 26, 36, 28, 37, 37, 41, 41, - 41, 42, 42, 42, 197, 42, 42, 48, 48, 48, - 196, 42, 42, 42, 42, 42, 42, 72, 72, 76, - 79, 79, 76, 79, 194, 193, 192, 190, 188, 187, - 186, 184, 183, 182, 181, 180, 48, 208, 208, 209, - 209, 210, 210, 211, 211, 212, 212, 213, 213, 179, - 178, 177, 176, 173, 172, 171, 170, 169, 167, 166, - 165, 163, 162, 159, 158, 157, 156, 154, 153, 151, - 150, 149, 148, 147, 145, 144, 143, 139, 138, 137, + 192, 22, 22, 28, 74, 22, 28, 74, 19, 34, + 34, 28, 34, 36, 36, 191, 36, 37, 37, 41, + 41, 41, 42, 42, 42, 189, 42, 42, 48, 48, + 48, 188, 42, 42, 42, 42, 42, 42, 70, 70, + 77, 77, 187, 77, 185, 183, 182, 181, 179, 178, + 177, 176, 175, 174, 173, 172, 171, 48, 203, 203, + 204, 204, 205, 205, 206, 206, 207, 207, 208, 208, + 168, 167, 166, 165, 164, 162, 161, 160, 158, 157, + 154, 153, 152, 151, 149, 148, 146, 145, 144, 143, + 142, 140, 139, 138, 134, 133, 132, 131, 130, 128, - 136, 135, 133, 132, 131, 130, 129, 127, 126, 125, - 123, 122, 121, 119, 117, 116, 113, 111, 110, 108, - 105, 103, 102, 100, 98, 97, 95, 94, 93, 92, - 91, 90, 87, 86, 85, 84, 83, 82, 80, 75, - 74, 73, 71, 70, 69, 68, 66, 65, 64, 63, - 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, - 52, 51, 50, 49, 47, 46, 44, 43, 38, 35, - 32, 29, 27, 21, 14, 11, 7, 5, 3, 206, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, + 127, 126, 125, 124, 122, 121, 120, 119, 118, 117, + 115, 113, 112, 109, 107, 106, 104, 101, 99, 98, + 97, 95, 94, 92, 91, 90, 89, 88, 85, 84, + 83, 82, 81, 80, 78, 73, 72, 71, 69, 68, + 67, 66, 64, 63, 62, 61, 60, 59, 58, 57, + 56, 55, 54, 53, 52, 51, 50, 49, 47, 46, + 44, 43, 38, 35, 32, 29, 27, 23, 21, 14, + 11, 7, 5, 3, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, - 206, 206, 206, 206, 206, 206, 206, 206, 206, 206 + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201 } ; static yy_state_type yy_last_accepting_state; @@ -821,13 +819,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 207 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 280 ); + while ( yy_base[yy_current_state] != 275 ); yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -975,55 +973,55 @@ YY_BREAK case 31: YY_RULE_SETUP -{yylval.number=LPC; return(BUS);} +{yylval.number=GPIO; return(BUS);} YY_BREAK case 32: YY_RULE_SETUP -{yylval.number=ESPI; return(BUS);} +{yylval.number=IRQ; return(RESOURCE);} YY_BREAK case 33: YY_RULE_SETUP -{yylval.number=GPIO; return(BUS);} +{yylval.number=DRQ; return(RESOURCE);} YY_BREAK case 34: YY_RULE_SETUP -{yylval.number=IRQ; return(RESOURCE);} +{yylval.number=IO; return(RESOURCE);} YY_BREAK case 35: YY_RULE_SETUP -{yylval.number=DRQ; return(RESOURCE);} +{return(IOAPIC_IRQ);} YY_BREAK case 36: YY_RULE_SETUP -{yylval.number=IO; return(RESOURCE);} +{return(INHERIT);} YY_BREAK case 37: YY_RULE_SETUP -{return(IOAPIC_IRQ);} +{return(SUBSYSTEMID);} YY_BREAK case 38: YY_RULE_SETUP -{return(INHERIT);} +{return(END);} YY_BREAK case 39: YY_RULE_SETUP -{return(SUBSYSTEMID);} +{return(SLOT_DESC);} YY_BREAK case 40: YY_RULE_SETUP -{return(END);} +{return(EQUALS);} YY_BREAK case 41: YY_RULE_SETUP -{return(SLOT_DESC);} +{return(PIPE);} YY_BREAK case 42: YY_RULE_SETUP -{return(EQUALS);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 43: YY_RULE_SETUP -{return(PIPE);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 44: YY_RULE_SETUP @@ -1031,31 +1029,23 @@ YY_BREAK case 45: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} - YY_BREAK -case 46: -YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} - YY_BREAK -case 47: -YY_RULE_SETUP {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} YY_BREAK +case 46: +/* rule 46 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 47: +/* rule 47 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK case 48: -/* rule 48 can match eol */ -YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} - YY_BREAK -case 49: -/* rule 49 can match eol */ -YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} - YY_BREAK -case 50: YY_RULE_SETUP {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} YY_BREAK -case 51: +case 49: YY_RULE_SETUP ECHO; YY_BREAK @@ -1355,7 +1345,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 207 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; @@ -1383,11 +1373,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 207 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; - yy_is_jam = (yy_current_state == 206); + yy_is_jam = (yy_current_state == 201); return yy_is_jam ? 0 : yy_current_state; } diff --git a/util/sconfig/main.c b/util/sconfig/main.c index e2a0586..63e283d 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -869,14 +869,6 @@ new_d->path = ".type=DEVICE_PATH_MMIO,{.mmio={ .addr = 0x%x }}"; break; - case ESPI: - new_d->path = ".type=DEVICE_PATH_ESPI,{.espi={ .addr = 0x%x }}"; - break; - - case LPC: - new_d->path = ".type=DEVICE_PATH_LPC,{.lpc={ .addr = 0x%x }}"; - break; - case GPIO: new_d->path = ".type=DEVICE_PATH_GPIO,{.gpio={ .id = 0x%x }}"; break; diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index e5dc829..1111267 100755 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -38,8 +38,6 @@ mmio {yylval.number=MMIO; return(BUS);} spi {yylval.number=SPI; return(BUS);} usb {yylval.number=USB; return(BUS);} -lpc {yylval.number=LPC; return(BUS);} -espi {yylval.number=ESPI; return(BUS);} gpio {yylval.number=GPIO; return(BUS);} irq {yylval.number=IRQ; return(RESOURCE);} drq {yylval.number=DRQ; return(RESOURCE);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 68421a1..6155dc0 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -149,42 +149,40 @@ YYSYMBOL_SPI = 36, /* SPI */ YYSYMBOL_USB = 37, /* USB */ YYSYMBOL_MMIO = 38, /* MMIO */ - YYSYMBOL_LPC = 39, /* LPC */ - YYSYMBOL_ESPI = 40, /* ESPI */ - YYSYMBOL_GPIO = 41, /* GPIO */ - YYSYMBOL_FW_CONFIG_TABLE = 42, /* FW_CONFIG_TABLE */ - YYSYMBOL_FW_CONFIG_FIELD = 43, /* FW_CONFIG_FIELD */ - YYSYMBOL_FW_CONFIG_OPTION = 44, /* FW_CONFIG_OPTION */ - YYSYMBOL_FW_CONFIG_PROBE = 45, /* FW_CONFIG_PROBE */ - YYSYMBOL_PIPE = 46, /* PIPE */ - YYSYMBOL_YYACCEPT = 47, /* $accept */ - YYSYMBOL_devtree = 48, /* devtree */ - YYSYMBOL_chipchildren = 49, /* chipchildren */ - YYSYMBOL_devicechildren = 50, /* devicechildren */ - YYSYMBOL_chip = 51, /* chip */ - YYSYMBOL_52_1 = 52, /* @1 */ - YYSYMBOL_device = 53, /* device */ - YYSYMBOL_54_2 = 54, /* @2 */ - YYSYMBOL_55_3 = 55, /* @3 */ - YYSYMBOL_alias = 56, /* alias */ - YYSYMBOL_status = 57, /* status */ - YYSYMBOL_resource = 58, /* resource */ - YYSYMBOL_reference = 59, /* reference */ - YYSYMBOL_registers = 60, /* registers */ - YYSYMBOL_subsystemid = 61, /* subsystemid */ - YYSYMBOL_ioapic_irq = 62, /* ioapic_irq */ - YYSYMBOL_smbios_slot_desc = 63, /* smbios_slot_desc */ - YYSYMBOL_fw_config_table = 64, /* fw_config_table */ - YYSYMBOL_fw_config_table_children = 65, /* fw_config_table_children */ - YYSYMBOL_fw_config_field_children = 66, /* fw_config_field_children */ - YYSYMBOL_fw_config_field_bits = 67, /* fw_config_field_bits */ - YYSYMBOL_fw_config_field_bits_repeating = 68, /* fw_config_field_bits_repeating */ - YYSYMBOL_fw_config_field = 69, /* fw_config_field */ - YYSYMBOL_70_4 = 70, /* $@4 */ - YYSYMBOL_71_5 = 71, /* $@5 */ - YYSYMBOL_72_6 = 72, /* $@6 */ - YYSYMBOL_fw_config_option = 73, /* fw_config_option */ - YYSYMBOL_fw_config_probe = 74 /* fw_config_probe */ + YYSYMBOL_GPIO = 39, /* GPIO */ + YYSYMBOL_FW_CONFIG_TABLE = 40, /* FW_CONFIG_TABLE */ + YYSYMBOL_FW_CONFIG_FIELD = 41, /* FW_CONFIG_FIELD */ + YYSYMBOL_FW_CONFIG_OPTION = 42, /* FW_CONFIG_OPTION */ + YYSYMBOL_FW_CONFIG_PROBE = 43, /* FW_CONFIG_PROBE */ + YYSYMBOL_PIPE = 44, /* PIPE */ + YYSYMBOL_YYACCEPT = 45, /* $accept */ + YYSYMBOL_devtree = 46, /* devtree */ + YYSYMBOL_chipchildren = 47, /* chipchildren */ + YYSYMBOL_devicechildren = 48, /* devicechildren */ + YYSYMBOL_chip = 49, /* chip */ + YYSYMBOL_50_1 = 50, /* @1 */ + YYSYMBOL_device = 51, /* device */ + YYSYMBOL_52_2 = 52, /* @2 */ + YYSYMBOL_53_3 = 53, /* @3 */ + YYSYMBOL_alias = 54, /* alias */ + YYSYMBOL_status = 55, /* status */ + YYSYMBOL_resource = 56, /* resource */ + YYSYMBOL_reference = 57, /* reference */ + YYSYMBOL_registers = 58, /* registers */ + YYSYMBOL_subsystemid = 59, /* subsystemid */ + YYSYMBOL_ioapic_irq = 60, /* ioapic_irq */ + YYSYMBOL_smbios_slot_desc = 61, /* smbios_slot_desc */ + YYSYMBOL_fw_config_table = 62, /* fw_config_table */ + YYSYMBOL_fw_config_table_children = 63, /* fw_config_table_children */ + YYSYMBOL_fw_config_field_children = 64, /* fw_config_field_children */ + YYSYMBOL_fw_config_field_bits = 65, /* fw_config_field_bits */ + YYSYMBOL_fw_config_field_bits_repeating = 66, /* fw_config_field_bits_repeating */ + YYSYMBOL_fw_config_field = 67, /* fw_config_field */ + YYSYMBOL_68_4 = 68, /* $@4 */ + YYSYMBOL_69_5 = 69, /* $@5 */ + YYSYMBOL_70_6 = 70, /* $@6 */ + YYSYMBOL_fw_config_option = 71, /* fw_config_option */ + YYSYMBOL_fw_config_probe = 72 /* fw_config_probe */ }; typedef enum yysymbol_kind_t yysymbol_kind_t; @@ -506,10 +504,10 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 2 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 83 +#define YYLAST 97 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 47 +#define YYNTOKENS 45 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 28 /* YYNRULES -- Number of rules. */ @@ -518,7 +516,7 @@ #define YYNSTATES 95 /* YYMAXUTOK -- Last valid token kind. */ -#define YYMAXUTOK 301 +#define YYMAXUTOK 299 /* YYTRANSLATE(TOKEN-NUM) -- Symbol number corresponding to TOKEN-NUM @@ -561,8 +559,7 @@ 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 46 + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44 }; #if YYDEBUG @@ -595,8 +592,8 @@ "MANDATORY", "BUS", "RESOURCE", "END", "EQUALS", "HEX", "STRING", "PCI", "PNP", "I2C", "APIC", "CPU_CLUSTER", "CPU", "DOMAIN", "IRQ", "DRQ", "SLOT_DESC", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "IOAPIC_IRQ", - "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", "LPC", "ESPI", - "GPIO", "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", + "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", "GPIO", + "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", "FW_CONFIG_PROBE", "PIPE", "$accept", "devtree", "chipchildren", "devicechildren", "chip", "@1", "device", "@2", "@3", "alias", "status", "resource", "reference", "registers", "subsystemid", "ioapic_irq", @@ -622,11 +619,11 @@ 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, - 295, 296, 297, 298, 299, 300, 301 + 295, 296, 297, 298, 299 }; #endif -#define YYPACT_NINF (-21) +#define YYPACT_NINF (-27) #define yypact_value_is_default(Yyn) \ ((Yyn) == YYPACT_NINF) @@ -640,16 +637,16 @@ STATE-NUM. */ static const yytype_int8 yypact[] = { - -21, 9, -21, 2, -21, -21, -21, -21, -11, -21, - -21, 8, -21, 45, -13, 10, 18, 19, -21, -21, - -21, -21, -21, 12, -20, -21, 22, 15, 25, 37, - -21, -21, 24, -21, -7, 11, 41, 38, 39, -6, - 12, -20, -21, -21, 40, -21, -21, -21, -21, 43, - 11, -21, -21, -21, -21, -1, 29, -21, -21, -21, - -21, -21, -3, -21, 32, -21, 46, 33, 35, 48, - -21, -21, -21, -21, -21, -21, -21, -21, 1, 51, - 50, 42, 20, 52, -21, 44, 53, 47, 54, -21, - -21, 55, -21, -21, -21 + -27, 9, -27, 2, -27, -27, -27, -27, -11, -27, + -27, 4, -27, 43, -13, 10, 20, 21, -27, -27, + -27, -27, -27, 13, -26, -27, 22, 14, 30, 44, + -27, -27, 24, -27, -7, 16, 45, 37, 38, -6, + 13, -26, -27, -27, 39, -27, -27, -27, -27, 41, + 16, -27, -27, -27, -27, -1, 31, -27, -27, -27, + -27, -27, -3, -27, 32, -27, 42, 33, 34, 47, + -27, -27, -27, -27, -27, -27, -27, -27, 1, 50, + 49, 40, 36, 51, -27, 46, 54, 48, 52, -27, + -27, 55, -27, -27, -27 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -672,9 +669,9 @@ /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -21, -21, -21, 5, 17, -21, 61, -21, -21, -21, - 26, -21, -21, 62, -21, -21, -21, -21, -21, -8, - 49, 36, -21, -21, -21, -21, -21, -21 + -27, -27, -27, 11, 19, -27, 60, -27, -27, -27, + 17, -27, -27, 63, -27, -27, -27, -27, -27, -8, + 53, 56, -27, -27, -27, -27, -27, -27 }; /* YYDEFGOTO[NTERM-NUM]. */ @@ -691,41 +688,43 @@ static const yytype_int8 yytable[] = { 3, 15, 16, 10, 3, 15, 16, 43, 53, 2, - 64, 65, 3, 60, 64, 84, 23, 26, 5, 7, - 46, 47, 27, 39, 66, 14, 32, 67, 66, 68, - 19, 67, 11, 68, 55, 28, 29, 44, 44, 35, - 37, 30, 69, 44, 36, 38, 69, 49, 3, 15, - 16, 4, 17, 40, 88, 51, 52, 56, 61, 18, - 58, 79, 81, 80, 82, 83, 85, 86, 78, 89, - 91, 87, 94, 90, 20, 22, 59, 54, 92, 0, - 0, 41, 0, 93 + 64, 65, 3, 60, 64, 84, 23, 26, 32, 7, + 5, 14, 27, 39, 66, 46, 47, 67, 66, 68, + 11, 67, 19, 68, 55, 44, 44, 28, 29, 35, + 69, 44, 30, 36, 69, 37, 3, 15, 16, 4, + 17, 49, 38, 40, 51, 52, 56, 18, 58, 80, + 61, 79, 81, 82, 83, 85, 86, 59, 89, 87, + 88, 91, 94, 20, 78, 90, 22, 0, 0, 92, + 0, 93, 0, 0, 0, 41, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 54 }; static const yytype_int8 yycheck[] = { 3, 4, 5, 14, 3, 4, 5, 14, 14, 0, - 13, 14, 3, 14, 13, 14, 29, 7, 1, 17, - 9, 10, 12, 31, 27, 17, 46, 30, 27, 32, - 13, 30, 43, 32, 42, 17, 17, 44, 44, 17, - 15, 29, 45, 44, 29, 8, 45, 6, 3, 4, - 5, 42, 7, 29, 34, 17, 17, 17, 29, 14, - 17, 29, 29, 17, 29, 17, 15, 17, 63, 17, - 17, 29, 17, 29, 13, 13, 50, 41, 31, -1, - -1, 32, -1, 29 + 13, 14, 3, 14, 13, 14, 29, 7, 44, 17, + 1, 17, 12, 31, 27, 9, 10, 30, 27, 32, + 41, 30, 13, 32, 42, 42, 42, 17, 17, 17, + 43, 42, 29, 29, 43, 15, 3, 4, 5, 40, + 7, 6, 8, 29, 17, 17, 17, 14, 17, 17, + 29, 29, 29, 29, 17, 15, 17, 50, 17, 29, + 34, 17, 17, 13, 63, 29, 13, -1, -1, 31, + -1, 29, -1, -1, -1, 32, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 41 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_int8 yystos[] = { - 0, 48, 0, 3, 42, 51, 64, 17, 65, 52, - 14, 43, 69, 49, 17, 4, 5, 7, 14, 51, - 53, 59, 60, 29, 67, 72, 7, 12, 17, 17, - 29, 71, 46, 68, 66, 17, 29, 15, 8, 66, - 29, 67, 70, 14, 44, 73, 9, 10, 57, 6, - 56, 17, 17, 14, 68, 66, 17, 55, 17, 57, - 14, 29, 50, 54, 13, 14, 27, 30, 32, 45, - 51, 53, 58, 60, 61, 62, 63, 74, 50, 29, + 0, 46, 0, 3, 40, 49, 62, 17, 63, 50, + 14, 41, 67, 47, 17, 4, 5, 7, 14, 49, + 51, 57, 58, 29, 65, 70, 7, 12, 17, 17, + 29, 69, 44, 66, 64, 17, 29, 15, 8, 64, + 29, 65, 68, 14, 42, 71, 9, 10, 55, 6, + 54, 17, 17, 14, 66, 64, 17, 53, 17, 55, + 14, 29, 48, 52, 13, 14, 27, 30, 32, 43, + 49, 51, 56, 58, 59, 60, 61, 72, 48, 29, 17, 29, 29, 17, 14, 15, 17, 29, 34, 17, 29, 17, 31, 29, 17 }; @@ -733,12 +732,12 @@ /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_int8 yyr1[] = { - 0, 47, 48, 48, 48, 49, 49, 49, 49, 49, - 50, 50, 50, 50, 50, 50, 50, 50, 50, 52, - 51, 54, 53, 55, 53, 56, 56, 57, 57, 58, - 59, 60, 61, 61, 62, 63, 63, 63, 64, 65, - 65, 66, 66, 67, 68, 68, 70, 69, 71, 69, - 72, 69, 73, 74 + 0, 45, 46, 46, 46, 47, 47, 47, 47, 47, + 48, 48, 48, 48, 48, 48, 48, 48, 48, 50, + 49, 52, 51, 53, 51, 54, 54, 55, 55, 56, + 57, 58, 59, 59, 60, 61, 61, 61, 62, 63, + 63, 64, 64, 65, 66, 66, 68, 67, 69, 67, + 70, 67, 71, 72 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index 061afc5..2179499 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -35,8 +35,8 @@ especially those whose name start with YY_ or yy_. They are private implementation details that can be changed or removed. */ -#ifndef YY_YY_HOME_TWAWRZYNCZAK_DEVEL_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_HOME_TWAWRZYNCZAK_DEVEL_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_WORK_GIT_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_WORK_GIT_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -90,14 +90,12 @@ SPI = 291, /* SPI */ USB = 292, /* USB */ MMIO = 293, /* MMIO */ - LPC = 294, /* LPC */ - ESPI = 295, /* ESPI */ - GPIO = 296, /* GPIO */ - FW_CONFIG_TABLE = 297, /* FW_CONFIG_TABLE */ - FW_CONFIG_FIELD = 298, /* FW_CONFIG_FIELD */ - FW_CONFIG_OPTION = 299, /* FW_CONFIG_OPTION */ - FW_CONFIG_PROBE = 300, /* FW_CONFIG_PROBE */ - PIPE = 301 /* PIPE */ + GPIO = 294, /* GPIO */ + FW_CONFIG_TABLE = 295, /* FW_CONFIG_TABLE */ + FW_CONFIG_FIELD = 296, /* FW_CONFIG_FIELD */ + FW_CONFIG_OPTION = 297, /* FW_CONFIG_OPTION */ + FW_CONFIG_PROBE = 298, /* FW_CONFIG_PROBE */ + PIPE = 299 /* PIPE */ }; typedef enum yytokentype yytoken_kind_t; #endif @@ -124,4 +122,4 @@ int yyparse (void); -#endif /* !YY_YY_HOME_TWAWRZYNCZAK_DEVEL_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_WORK_GIT_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index e60bd16..40c1295 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -21,7 +21,7 @@ uint64_t number; } -%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO LPC ESPI GPIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE +%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO GPIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE %% devtree: { cur_parent = root_parent; } | devtree chip | devtree fw_config_table; -- To view, visit https://review.coreboot.org/c/coreboot/+/56197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a78afc55477d62eac8056e2ca4bcdd3ab12ea47 Gerrit-Change-Number: 56197 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB
by Paul Menzel (Code Review) 10 Jul '21

10 Jul '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56193 ) Change subject: soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38fd74c2edd71ce9f6c08db9dacb18e553745877 Gerrit-Change-Number: 56193 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 10 Jul 2021 20:33:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK
by build bot (Jenkins) (Code Review) 10 Jul '21

10 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 ) Change subject: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK ...................................................................... Patch Set 55: (2 comments) File src/drivers/spi/spi_flash.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123805): https://review.coreboot.org/c/coreboot/+/50586/comment/8e8b3704_bce3312a PS55, Line 508: while (1) suspect code indent for conditional statements (24, 24) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123805): https://review.coreboot.org/c/coreboot/+/50586/comment/d0ed3dec_df8da2bf PS55, Line 529: while (1) suspect code indent for conditional statements (24, 24) -- To view, visit https://review.coreboot.org/c/coreboot/+/50586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied5b647d0fcc8e3effff3bb7c8680ed5a0c1f3d4 Gerrit-Change-Number: 50586 Gerrit-PatchSet: 55 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Sat, 10 Jul 2021 20:14:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add PCIe RC driver in Coreboot
by build bot (Jenkins) (Code Review) 10 Jul '21

10 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Julius Werner, Prasad Malisetty, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe RC driver in Coreboot ...................................................................... Patch Set 22: (1 comment) File src/soc/qualcomm/sc7280/include/soc/pcie.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123793): https://review.coreboot.org/c/coreboot/+/53902/comment/e688188e_c95c65ff PS22, Line 168: #define PCIE_DEV_FUNC (dev, func) {(PCI_SLOT(devfn)) | (PCI_FUNC(devfn))} Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 22 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Sat, 10 Jul 2021 20:09:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: herobrine: sc7280: Load GSI FW in ramstage
by build bot (Jenkins) (Code Review) 10 Jul '21

10 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55964 ) Change subject: herobrine: sc7280: Load GSI FW in ramstage ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/herobrine/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123790): https://review.coreboot.org/c/coreboot/+/55964/comment/bd88c3f9_820335d9 PS5, Line 21: trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/55964 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d9caa0921fcf9ad67f1071cdf769a99fb6d1a30 Gerrit-Change-Number: 55964 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Sat, 10 Jul 2021 20:07:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Increased CBFS_MCACHE size
by Ravi kumar (Code Review) 10 Jul '21

10 Jul '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56196 ) Change subject: sc7280: Increased CBFS_MCACHE size ...................................................................... sc7280: Increased CBFS_MCACHE size BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I16c41031718e1c3e41d0a128c8b254e2f6f94093 --- M src/soc/qualcomm/sc7280/memlayout.ld 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/56196/1 diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld index 84c5a96..57cdb59 100644 --- a/src/soc/qualcomm/sc7280/memlayout.ld +++ b/src/soc/qualcomm/sc7280/memlayout.ld @@ -41,9 +41,9 @@ VBOOT2_WORK(0x1484F000, 12K) DMA_COHERENT(0x14853000, 8K) REGION(qclib_serial_log, 0x14857000, 4K, 4K) - REGION(ddr_information, 0x1485B000, 1K, 1K) - FMAP_CACHE(0x1485B400, 2K) - CBFS_MCACHE(0x1485BC00,8K) + CBFS_MCACHE(0x14858000,16K) + REGION(ddr_information, 0x1485C000, 1K, 1K) + FMAP_CACHE(0x1485C400, 2K) REGION(dcb, 0x1485E000, 32K, 4K) REGION(pmic, 0x14866000, 96K, 4K) REGION(ddr_training, 0x1487E000, 32K, 4K) -- To view, visit https://review.coreboot.org/c/coreboot/+/56196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16c41031718e1c3e41d0a128c8b254e2f6f94093 Gerrit-Change-Number: 56196 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mainboard: herobrine: Add EC SPI and TPM macros
by Ravi kumar (Code Review) 10 Jul '21

10 Jul '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56195 ) Change subject: mainboard: herobrine: Add EC SPI and TPM macros ...................................................................... mainboard: herobrine: Add EC SPI and TPM macros Signed-off-by: Rajesh Patil <rajpat(a)codeaurora.org> Change-Id: Ibfc8c761ad714c3ca5201c79a5a694dd7699f9ed --- M src/mainboard/google/herobrine/Kconfig M src/mainboard/google/herobrine/mainboard.c 2 files changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/56195/1 diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig index 7f88b94..a401567 100644 --- a/src/mainboard/google/herobrine/Kconfig +++ b/src/mainboard/google/herobrine/Kconfig @@ -45,4 +45,12 @@ default "Senor" if BOARD_GOOGLE_SENOR default "Piglin" if BOARD_GOOGLE_PIGLIN +config DRIVER_TPM_SPI_BUS + hex + default 0xE + +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0xA + endif # BOARD_GOOGLE_HEROBRINE_COMMON diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 9f15ccb..a08b1f8 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -65,7 +65,6 @@ qupv3_se_fw_load_and_init(QUPV3_0_SE7, SE_PROTOCOL_UART, FIFO); /* BT UART */ qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED); /* ESIM SPI */ qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED); /* Touch I2C */ - qupv3_se_fw_load_and_init(QUPV3_1_SE6, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */ /* Set up PCIe in RC mode */ setup_pcie(); -- To view, visit https://review.coreboot.org/c/coreboot/+/56195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfc8c761ad714c3ca5201c79a5a694dd7699f9ed Gerrit-Change-Number: 56195 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sc7180: Renaming the GPIO macro in QSPI and I2C driver
by Ravi kumar (Code Review) 10 Jul '21

10 Jul '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56194 ) Change subject: sc7180: Renaming the GPIO macro in QSPI and I2C driver ...................................................................... sc7180: Renaming the GPIO macro in QSPI and I2C driver As part of GPIO driver cleanup across qcom chipsets, GPIO_OUTPUT_ENABLE has been renamed to GPIO_OUTPUT. BUG=b:182963902 TEST=Validated on qualcomm sc7180 development board Signed-off-by: Rajesh Patil <rajpat(a)codeaurora.org> Change-Id: I51eedc722a91c5ea8e009fb8468a60667d374b49 --- M src/soc/qualcomm/sc7180/qspi.c M src/soc/qualcomm/sc7180/qupv3_i2c.c 2 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/56194/1 diff --git a/src/soc/qualcomm/sc7180/qspi.c b/src/soc/qualcomm/sc7180/qspi.c index c1e9779..825e298 100644 --- a/src/soc/qualcomm/sc7180/qspi.c +++ b/src/soc/qualcomm/sc7180/qspi.c @@ -146,13 +146,13 @@ gpio_output(GPIO(68), 1); gpio_configure(GPIO(64), GPIO64_FUNC_QSPI_DATA_0, - GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE); + GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT); gpio_configure(GPIO(65), GPIO65_FUNC_QSPI_DATA_1, - GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE); + GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT); gpio_configure(GPIO(63), GPIO63_FUNC_QSPI_CLK, - GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT_ENABLE); + GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); } static void queue_bounce_data(uint8_t *data, uint32_t data_bytes, diff --git a/src/soc/qualcomm/sc7180/qupv3_i2c.c b/src/soc/qualcomm/sc7180/qupv3_i2c.c index c9adba4..5dc4d31 100644 --- a/src/soc/qualcomm/sc7180/qupv3_i2c.c +++ b/src/soc/qualcomm/sc7180/qupv3_i2c.c @@ -92,9 +92,9 @@ /* GPIO Configuration */ gpio_configure(qup[bus].pin[0], qup[bus].func[0], GPIO_PULL_UP, - GPIO_2MA, GPIO_OUTPUT_ENABLE); + GPIO_2MA, GPIO_OUTPUT); gpio_configure(qup[bus].pin[1], qup[bus].func[1], GPIO_PULL_UP, - GPIO_2MA, GPIO_OUTPUT_ENABLE); + GPIO_2MA, GPIO_OUTPUT); /* Select and setup FIFO mode */ write32(&regs->geni_m_irq_clear, 0xFFFFFFFF); -- To view, visit https://review.coreboot.org/c/coreboot/+/56194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51eedc722a91c5ea8e009fb8468a60667d374b49 Gerrit-Change-Number: 56194 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sc7280: Differentiate TPM configuration for herobrine variants
by Ravi kumar (Code Review) 10 Jul '21

10 Jul '21

Attention is currently required from: Ravi kumar. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56064 to look at the new patch set (#3). Change subject: sc7280: Differentiate TPM configuration for herobrine variants ...................................................................... sc7280: Differentiate TPM configuration for herobrine variants fix tpm boot failures in herobrine with below upstream gerrit change https://review.coreboot.org/c/coreboot/+/55829 Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I56d3576ddc078021a7d7ad0af074e01ef982d614 --- M src/mainboard/google/herobrine/Kconfig 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/56064/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56d3576ddc078021a7d7ad0af074e01ef982d614 Gerrit-Change-Number: 56064 Gerrit-PatchSet: 3 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newpatchset

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