Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56351 )
Change subject: lib/thread: Make thread_run not block the current state
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
> Yeah, I've been wondering about this too. It's probably a good idea. […]
Sounds like a good idea.
File src/lib/thread.c:
https://review.coreboot.org/c/coreboot/+/56351/comment/9bb2324d_30a993fc
PS1, Line 325: printk(BIOS_ERR, "thread_run() No more threads!\n");
> This is a bit off-topic for this patch, but I'm wondering if the better answer here would be to wait […]
I agree that waiting is a better approach. I'll shoot out a CL.
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56355 )
Change subject: [NOTFORMERGE] soc/amd/picasso: test case for mpinit-problem on mandolin
......................................................................
[NOTFORMERGE] soc/amd/picasso: test case for mpinit-problem on mandolin
When printing a lot of stuff from the CPU init on BSP and all APs to the
serial console, the BSP will end up loading and running SeaBIOS before
the mpinit is done and before post_mp_init gets called which results in
SeaBIOS getting stuck when it tries to run the VGA option rom. Tested
this on mandolin, but this will likely be a problem on all Picasso and
Cezanne boards.
When removing the unconditional mca_print_error() call added in this
test case, the added debug print will show up on the console. When the
unconditional mca_print_error call is in there, the debug print in
post_mp_init won't show up on the serial console and the last message on
the serial console is: Running option rom at c000:0003
BUG=b:193809448
Change-Id: I48a3d820fcf9c26649e2385ea0caaef7d23ca572
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/amd/common/block/cpu/mca/mca_common.c
M src/soc/amd/picasso/cpu.c
2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/56355/1
diff --git a/src/soc/amd/common/block/cpu/mca/mca_common.c b/src/soc/amd/common/block/cpu/mca/mca_common.c
index b357691..cdad945 100644
--- a/src/soc/amd/common/block/cpu/mca/mca_common.c
+++ b/src/soc/amd/common/block/cpu/mca/mca_common.c
@@ -18,6 +18,7 @@
return;
for (unsigned int i = 0 ; i < num_banks ; i++) {
+ mca_print_error(i);
if (!mca_is_valid_bank(i))
continue;
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index b04d004..fee502e 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -40,6 +40,7 @@
static void post_mp_init(void)
{
+ printk(BIOS_INFO, "post mp init smi enable\n\n\n");
global_smi_enable();
apm_control(APM_CNT_SMMINFO);
}
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56232 )
Change subject: soc/amd/common/apob: Add support for asynchronously reading APOB_NV
......................................................................
Patch Set 7: Code-Review+1
(1 comment)
File src/soc/amd/common/block/apob/apob_cache.c:
https://review.coreboot.org/c/coreboot/+/56232/comment/6aca2840_89ca3c46
PS6, Line 71: if (fmap_locate_area(DEFAULT_MRC_CACHE, r) < 0) {
> I think the reason we do this is because we start with the ro rdev, and if we need to update the SPI […]
I would say just use the RW rdev right away in that case, or just look up the FMAP section again. Either option sounds better than this.
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56228 )
Change subject: soc/amd/common/block/lpc/spi_dma: Implement SPI DMA functionality
......................................................................
Patch Set 6:
(1 comment)
File src/soc/amd/common/block/lpc/Kconfig:
https://review.coreboot.org/c/coreboot/+/56228/comment/9aba2730_d8195605
PS6, Line 15: The SPI DMA controller
: is only functional on Cezanne, Renoir or later SoCs.
> Rather than putting this in the help text, why not model it programmatically with depends on?
I didn't want to have to update it for each new SOC. I guess I could do a `depends on !SOC_AMD_PICASSO and !SOC_AMD_STONEYRIDGE`.
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56352 )
Change subject: lib/thread: Move thread_run and thread_run_until outside of #if guard
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Ahh, here you did it already. Excellent! Ignore my comment in the earlier CL.
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Change subject: lib/thread: Make thread_run not block the current state
......................................................................
Patch Set 1: Code-Review+2
(2 comments)
Patchset:
PS1:
Yeah, I've been wondering about this too. It's probably a good idea. My only concern is that there's nothing really preventing your thread from running over the end of the stage in that case. It might be a good idea to add a check somewhere in payload_run() to make sure there are no more running threads in the background.
File src/lib/thread.c:
https://review.coreboot.org/c/coreboot/+/56351/comment/58a6f291_baa1d756
PS1, Line 325: printk(BIOS_ERR, "thread_run() No more threads!\n");
This is a bit off-topic for this patch, but I'm wondering if the better answer here would be to wait and yield until a new thread slot becomes available. With the way your thread_join() and the automatic termination and the storing the result in the thread_handle works now, it would be easy to accidentally spawn more threads over the course of the ramstage than CONFIG_NUM_THREADS, and it might be fine during testing because one of the threads terminates (even though its thread_join() hasn't been reached yet) before the other one starts. But then later patches or other external factors might introduce a tiny timing change, and suddenly that thread does not terminate before the next one tries to run. We would want to make sure that the system doesn't just fail to boot in that case (which is what returning -1 here would probably do most of the time), so I think printing a BIOS_WARNING and waiting until a thread slot frees up would be the best option.
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56213 )
Change subject: payloads: FILO: Hook up autoboot options
......................................................................
Patch Set 4:
(2 comments)
Patchset:
PS3:
> Your call.
Done
File payloads/external/FILO/Kconfig:
https://review.coreboot.org/c/coreboot/+/56213/comment/bf8abb18_3985455c
PS3, Line 29: hda1
> I find it generally hard to predict what people actually need. Is there a […]
I left it, and put the line as an example.
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Change subject: lib/thread: Add thread_handle
......................................................................
Patch Set 6: Code-Review+2
(1 comment)
File src/include/thread.h:
https://review.coreboot.org/c/coreboot/+/56229/comment/d9e7c639_e3e07333
PS5, Line 111: return CB_ERR;
> I moved it out of the #if guards. This will result in a linker error. […]
Sounds good! In fact, would probably be good to do that for thread_run() and variations too.
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Change subject: lib/thread: Add mutex
......................................................................
Patch Set 6: Code-Review+2
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