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Change subject: mb/google/dedede/var/pirika: Add USB2 PHY parameters
......................................................................
mb/google/dedede/var/pirika: Add USB2 PHY parameters
This change adds fine-tuned USB2 PHY parameters for pirika.
BUG=192601233
TEST=Built and verified USB2 eye diagram test result
Signed-off-by: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com>
Change-Id: Icf9fb41cd0ae40728e4ec5bd72a15ec3c45c963b
---
M src/mainboard/google/dedede/variants/pirika/overridetree.cb
1 file changed, 12 insertions(+), 0 deletions(-)
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Change subject: UPSTREAM: mb/google/dedede/var/pirika: Add USB2 PHY parameters
......................................................................
UPSTREAM: mb/google/dedede/var/pirika: Add USB2 PHY parameters
This change adds fine-tuned USB2 PHY parameters for pirika.
BUG=192601233
TEST=Built and verified USB2 eye diagram test result
Signed-off-by: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com>
Change-Id: Icf9fb41cd0ae40728e4ec5bd72a15ec3c45c963b
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56381 )
Change subject: soc/intel/common/block: Drop unused `intelblocks/mp_init.h` include
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56381/comment/18b49cbc_c04cabe4
PS1, Line 7: Make use of `cpu/intel/cpu_ids.h'
> Drop unused `intelblocks/mp_init. […]
Ack
https://review.coreboot.org/c/coreboot/+/56381/comment/02bb27b7_9cde668d
PS1, Line 9: Remove inclusion of mp_init.h for getting CPUIDs and use dedicated
: cpu_ids.h file in SoC directory.
> With the updated commit message, this should be removed.
Ack
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Change subject: soc/intel/common/block: Drop unused `intelblocks/mp_init.h` include
......................................................................
soc/intel/common/block: Drop unused `intelblocks/mp_init.h` include
Change-Id: I8621a38214686b359ee0e7cdf7e92154af3cbc81
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/sgx/sgx.c
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Change subject: mb/google/octopus/var/phaser: Change IRQ trigger method to level
......................................................................
mb/google/octopus/var/phaser: Change IRQ trigger method to level
The change from Synaptics S7817 to Elan 3915N and pin distribution
of touch IC is the same.
According to vendor spec definition IRQ trigger method needs to
change to level.
BUG=b:190574692
TEST=Build coreboot and check that device works
Signed-off-by: joey.peng <joey.peng(a)lcfc.corp-partner.google.com>
Change-Id: I44ee779242779c78ceafdddd34dca2571e714dd3
---
M src/mainboard/google/octopus/variants/phaser/overridetree.cb
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Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56373 )
Change subject: util/kconfig: Stop trying to make sense of Linux configs
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Yes the same issue with Werner:
On my system 'make menuconfig' without an .config-file being available in the root dir of coreboot led to the usage of the kernel config file in /boot of my PC prior to this patch. With this patch everything is fine again.
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Change subject: mb/google/octopus/var/phaser: Change IRQ trigger method to level
......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56380/comment/708ac550_95023e20
PS1, Line 7: src/mainboard/google/octopus/variants/phaser
> Please look at `git log --oneline` how prefixes are composed.
Done
https://review.coreboot.org/c/coreboot/+/56380/comment/23523528_32c8f82a
PS1, Line 7: src/mainboard/google/octopus/variants/phaser:Change
> Please add a space after the colon.
Done
https://review.coreboot.org/c/coreboot/+/56380/comment/606d9024_fbef285c
PS1, Line 9: The change from Synaptics S7817 to Elan 3915N
> What do you mean? The ELAN touchpad is already configured in the devicetree, isn’t it?
Yes,originally,this is defined by former engineers who worked on this project before, but we actually never used it.
https://review.coreboot.org/c/coreboot/+/56380/comment/82ce2883_f6250aab
PS1, Line 9: The change from Synaptics S7817 to Elan 3915N and pin distribution of touch IC is the same.
:
: According to vendor spec definition IRQ trigger method needs to change to level.
> Please wrap lines after 75 characters.
Done
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Hello build bot (Jenkins), Henry Sun, Marco Chen,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/octopus/var/phaser: Change IRQ trigger method to level
......................................................................
mb/google/octopus/var/phaser: Change IRQ trigger method to level
The change from Synaptics S7817 to Elan 3915N and pin distribution
of touch IC is the same.
According to vendor spec definition IRQ trigger method needs to
change to level.
BUG=b:190574692
TEST=FW_NAME=Build coreboot and check that device works
Signed-off-by: joey.peng <joey.peng(a)lcfc.corp-partner.google.com>
Change-Id: I44ee779242779c78ceafdddd34dca2571e714dd3
---
M src/mainboard/google/octopus/variants/phaser/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
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