coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: nb/amd/pi/00730F01/northbridge.c: Use generic allocation functions
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Nico Huber, Michał Żygowski, Krystian Hebel, Kyösti Mälkki. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52926 ) Change subject: nb/amd/pi/00730F01/northbridge.c: Use generic allocation functions ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: had a look and pcengines/apu2 is the only mainboard that uses this northbridge, so i'd say you have a great test coverage on this one ;) i'm planning to have a closer look this week -- To view, visit https://review.coreboot.org/c/coreboot/+/52926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8dd5e40bce513c5ba7f1d42a06e7ab0846666942 Gerrit-Change-Number: 52926 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 05 May 2021 21:58:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Generate PCI routing table
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51556 ) Change subject: soc/amd/cezanne: Generate PCI routing table ...................................................................... Patch Set 5: (1 comment) File src/soc/amd/cezanne/pcie_gpp.c: https://review.coreboot.org/c/coreboot/+/51556/comment/f01e6582_c8061593 PS5, Line 68: Enable GNB IO-APIC see CB:52905 which adds that. feel free to take over that one. i'd also be ok with doing that in a follow-up and just acking this; your call -- To view, visit https://review.coreboot.org/c/coreboot/+/51556 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb559335435a95e73640e6d7fb224e16e0592326 Gerrit-Change-Number: 51556 Gerrit-PatchSet: 5 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-CC: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Wed, 05 May 2021 21:53:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Populate PIC IRQ data
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Raul Rangel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52915 ) Change subject: mb/google/guybrush: Populate PIC IRQ data ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: should there be a corresponding change for mancomb and majolica? -- To view, visit https://review.coreboot.org/c/coreboot/+/52915 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f Gerrit-Change-Number: 52915 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Wed, 05 May 2021 21:49:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/{common/picasso}: Move pci_int.asl
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52916 ) Change subject: soc/amd/{common/picasso}: Move pci_int.asl ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52916 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If746d55345f6b7c828376b64adc5532d20413f68 Gerrit-Change-Number: 52916 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Wed, 05 May 2021 21:47:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call
by Felix Held (Code Review) 05 May '21

05 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52904 ) Change subject: soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call ...................................................................... soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call this adds the ALIB SSDT that gets passed from the FSP to coreboot via a HOB. BUG=b:185481298 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52904 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt Papageorge <matthewpapa07(a)gmail.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/soc/amd/cezanne/agesa_acpi.c 1 file changed, 4 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Matt Papageorge: Looks good to me, but someone else must approve diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c index 8084e4d..35114a1 100644 --- a/src/soc/amd/cezanne/agesa_acpi.c +++ b/src/soc/amd/cezanne/agesa_acpi.c @@ -3,11 +3,15 @@ #include <acpi/acpi.h> #include <amdblocks/acpi.h> #include <device/device.h> +#include <FspGuids.h> #include <soc/acpi.h> #include <types.h> uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp) { + /* add ALIB SSDT from HOB */ + current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); + return current; } -- To view, visit https://review.coreboot.org/c/coreboot/+/52904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 Gerrit-Change-Number: 52904 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt Papageorge, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52904 to look at the new patch set (#3). Change subject: soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call ...................................................................... soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call this adds the ALIB SSDT that gets passed from the FSP to coreboot via a HOB. BUG=b:185481298 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 --- M src/soc/amd/cezanne/agesa_acpi.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/52904/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 Gerrit-Change-Number: 52904 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52911 ) Change subject: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: only did half of a review on this one File src/soc/amd/common/fsp/pci/pci_routing_info.c: https://review.coreboot.org/c/coreboot/+/52911/comment/b2e27d67_94055f4f PS2, Line 24: static const struct pci_routing_info *routing_table; : static size_t routing_table_entries; move those inside get_pci_routing_tablen so they won't be visible outside of that function, since that function should always be used as the accessor -- To view, visit https://review.coreboot.org/c/coreboot/+/52911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id03d0b74ca12e7bcee11f8d13b0e802861c13923 Gerrit-Change-Number: 52911 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 05 May 2021 21:42:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: security/tpm/crtm: Measure FMAP into TPM
by Julius Werner (Code Review) 05 May '21

05 May '21

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52753 ) Change subject: security/tpm/crtm: Measure FMAP into TPM ...................................................................... Patch Set 4: (1 comment) File src/security/tpm/tspi/crtm.c: https://review.coreboot.org/c/coreboot/+/52753/comment/0f4dd72b_40bd9bb3 PS2, Line 64: TPM_CRTM_PCR > Done So why is it runtime? (Sorry, I expected someone else would answer this and it wouldn't go in so quickly...) Isn't "runtime" for data that is somewhat variable and can change between units or boots or something, whereas "CRTM" is for the core code and data components that are fundamental to the security of the system? If so I would definitely expect the FMAP layout to count to CRTM just like all the code stages in CBFS. CBFS is anchored in the FMAP, after all. -- To view, visit https://review.coreboot.org/c/coreboot/+/52753 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic424a094e7f790cce45c5a98b8bc6d46a8dcca1b Gerrit-Change-Number: 52753 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 05 May 2021 21:35:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Switch eSPI ALERT# to in-band
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Raul Rangel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52955 ) Change subject: mb/google/guybrush: Switch eSPI ALERT# to in-band ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: ouch. goood catch -- To view, visit https://review.coreboot.org/c/coreboot/+/52955 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6de771aeda8feca062652f0ea9eb57d31cb68562 Gerrit-Change-Number: 52955 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Wed, 05 May 2021 21:33:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/espi: Don't set alert pin in espi_set_initial_config
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52953 ) Change subject: soc/amd/common/espi: Don't set alert pin in espi_set_initial_config ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > did you verify that this won't cause breakage on picasso? ah, the next patch in the patch train reworks this all and sort-of adds that back -- To view, visit https://review.coreboot.org/c/coreboot/+/52953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib43e190d08d77ecfcd22ead2bf42e5de2202b555 Gerrit-Change-Number: 52953 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Wed, 05 May 2021 21:33:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit May 2021