coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3
by Cliff Huang (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59855 ) Change subject: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3 ...................................................................... Patch Set 4: Code-Review+1 (1 comment) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/59855/comment/d88e4ca2_fed34400 PS2, Line 238: static bool mutex_created; > Why we need to initialize to `false` ? Default value itself is false. Isn't it? […] This shows that the memory locations used for static variables and space from the stack were '0' at the time. I don't think compiler will add code to initialize with '0's to ensure not getting leftover value from previous use (such as mem test) for the locations that it uses or acquires from the system. -- To view, visit https://review.coreboot.org/c/coreboot/+/59855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19cb05a74acfa3ded7867b1cac32c161a83b4f7d Gerrit-Change-Number: 59855 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 09 Dec 2021 00:24:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib: Add a mutex
by Julius Werner (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: Raul Rangel, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59320 ) Change subject: lib: Add a mutex ...................................................................... Patch Set 11: Code-Review+1 (3 comments) Patchset: PS11: FWIW this pretty much looks good to me now, but let's way for Kyösti to have another chance to comment as well. File src/include/mutex.h: https://review.coreboot.org/c/coreboot/+/59320/comment/474f2f96_ecd463f5 PS11, Line 12: static inline void mutex_lock(struct mutex *mutex); nit: a few lines of documentation would be nice. File src/lib/mutex.c: https://review.coreboot.org/c/coreboot/+/59320/comment/0d13877b_5ef78514 PS11, Line 43: __atomic_load_1(&mutex->locked, __ATOMIC_RELAXED) _mutex_is_locked_smp()? -- To view, visit https://review.coreboot.org/c/coreboot/+/59320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 Gerrit-Change-Number: 59320 Gerrit-PatchSet: 11 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 08 Dec 2021 23:53:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: lib/cbfs: Disable cbfs_preload in romstage when VBOOT_STARTS_IN_ROMSTAGE
by Julius Werner (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: Raul Rangel. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59876 ) Change subject: lib/cbfs: Disable cbfs_preload in romstage when VBOOT_STARTS_IN_ROMSTAGE ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59876 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7698b481a73fb24eecf4c810ff8be8b6826528ca Gerrit-Change-Number: 59876 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Wed, 08 Dec 2021 23:45:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Fix PLD group order(WR)
by Tim Wawrzynczak (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: Kevin Chang, YH Lin. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59973 ) Change subject: mb/google/brya/var/taeko: Fix PLD group order(WR) ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59973/comment/1f622dfe_5daf4407 PS2, Line 7: (WR) sorry, I don't understand what `(WR)` means ? https://review.coreboot.org/c/coreboot/+/59973/comment/de6e4eee_6a019c53 PS2, Line 9: In ec/google/chromeec: Add PLD to EC conn in ACPI : table(667471b8d807da5a5a9277db47e069ad3b1351c7), : PLD is added to ACPI table. It causes the DUT to : not boot into the OS. So fix the USB3/USB2 Type-C : Port C2 PLD group order from 3 to 2 to solve this : issue. commit messages are 72 characters wide -- To view, visit https://review.coreboot.org/c/coreboot/+/59973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia4cf2d735de524ae721800600536923d1d47f04b Gerrit-Change-Number: 59973 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Wed, 08 Dec 2021 23:00:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS
by Sean Rhodes (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: Felix Singer. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59705 ) Change subject: mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59705/comment/954add8c_487f2b49 PS3, Line 7: Enable/disable > How about: […] Done https://review.coreboot.org/c/coreboot/+/59705/comment/334bf026_84015912 PS3, Line 9: Enable or disable > Same here Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibadc7464831242ae51982610b410ccf0a6811edd Gerrit-Change-Number: 59705 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Wed, 08 Dec 2021 22:45:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS
by Sean Rhodes (Code Review) 08 Dec '21

08 Dec '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59705 to look at the new patch set (#5). Change subject: mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS ...................................................................... mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS Hook up Thunderbolt and related settings to CMOS value of `thunderbolt`. Changes TcssD3ColdDisable, TcssXhciEn, and UsbTcPortEn. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ibadc7464831242ae51982610b410ccf0a6811edd --- M src/mainboard/starlabs/labtop/cmos.default M src/mainboard/starlabs/labtop/cmos.layout M src/mainboard/starlabs/labtop/variants/tgl/devtree.c 3 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/59705/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibadc7464831242ae51982610b410ccf0a6811edd Gerrit-Change-Number: 59705 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: brya: keep the same TPM I2C for 4ES variants
by Tim Wawrzynczak (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: YH Lin, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59849 ) Change subject: brya: keep the same TPM I2C for 4ES variants ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddd6d8c22a181aba596b836f20392f76539b8549 Gerrit-Change-Number: 59849 Gerrit-PatchSet: 4 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 08 Dec 2021 22:33:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/redrix4es: sync change from redrix (CB:59731)
by Tim Wawrzynczak (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: YH Lin, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59987 ) Change subject: mb/google/redrix4es: sync change from redrix (CB:59731) ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ac90c249273bf4e75cccb5889844a7f196f56fc Gerrit-Change-Number: 59987 Gerrit-PatchSet: 2 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 08 Dec 2021 22:33:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/starlabs/labtop: Enable/disable Thunderbolt based on CMOS
by Felix Singer (Code Review) 08 Dec '21

08 Dec '21

Attention is currently required from: Sean Rhodes. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59705 ) Change subject: mainboard/starlabs/labtop: Enable/disable Thunderbolt based on CMOS ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59705/comment/252fb38a_e77c4f3f PS3, Line 7: Enable/disable How about: Hook up https://review.coreboot.org/c/coreboot/+/59705/comment/db5bb7a9_5434f3db PS3, Line 9: Enable or disable Same here -- To view, visit https://review.coreboot.org/c/coreboot/+/59705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibadc7464831242ae51982610b410ccf0a6811edd Gerrit-Change-Number: 59705 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Comment-Date: Wed, 08 Dec 2021 22:31:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCK...
by Felix Singer (Code Review) 08 Dec '21

08 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59857 ) Change subject: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCKDOWN ...................................................................... soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCKDOWN Fixed according to the declaration in soc/intel/common/block/include/intelblocks/cfg.h. Change-Id: I50dbc00806fefda8f4dac8bfa21dc714a9504566 Signed-off-by: Jingle Hsu <jingle_hsu(a)wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59857 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Johnny Lin <Johnny_Lin(a)wiwynn.com> Reviewed-by: Jonathan Zhang <jonzhang(a)fb.com> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M src/soc/intel/common/pch/include/intelpch/lockdown.h M src/soc/intel/common/pch/lockdown/lockdown.c 2 files changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Felix Singer: Looks good to me, approved Jonathan Zhang: Looks good to me, approved Johnny Lin: Looks good to me, but someone else must approve diff --git a/src/soc/intel/common/pch/include/intelpch/lockdown.h b/src/soc/intel/common/pch/include/intelpch/lockdown.h index 22d7147..b5aba06 100644 --- a/src/soc/intel/common/pch/include/intelpch/lockdown.h +++ b/src/soc/intel/common/pch/include/intelpch/lockdown.h @@ -7,8 +7,8 @@ * This function will get lockdown config specific to soc. * * Return values: - * 0 = CHIPSET_LOCKDOWN_FSP = use FSP's lockdown functionality to lockdown IPs - * 1 = CHIPSET_LOCKDOWN_COREBOOT = Use coreboot to lockdown IPs + * 0 = CHIPSET_LOCKDOWN_COREBOOT = Use coreboot to lockdown IPs + * 1 = CHIPSET_LOCKDOWN_FSP = use FSP's lockdown functionality to lockdown IPs */ int get_lockdown_config(void); diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index 374e3e6..5ab0611 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -14,8 +14,8 @@ * This function will get lockdown config specific to soc. * * Return values: - * 0 = CHIPSET_LOCKDOWN_FSP = use FSP's lockdown functionality to lockdown IPs - * 1 = CHIPSET_LOCKDOWN_COREBOOT = Use coreboot to lockdown IPs + * 0 = CHIPSET_LOCKDOWN_COREBOOT = Use coreboot to lockdown IPs + * 1 = CHIPSET_LOCKDOWN_FSP = use FSP's lockdown functionality to lockdown IPs */ int get_lockdown_config(void) { -- To view, visit https://review.coreboot.org/c/coreboot/+/59857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50dbc00806fefda8f4dac8bfa21dc714a9504566 Gerrit-Change-Number: 59857 Gerrit-PatchSet: 5 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit December 2021