coreboot-gerrit November 2021

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Change in coreboot[master]: soc/mediatek/mt8195: Add APU device apc driver
by flora.fu＠mediatek.com (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58969 to look at the new patch set (#5). Change subject: soc/mediatek/mt8195: Add APU device apc driver ...................................................................... soc/mediatek/mt8195: Add APU device apc driver Add APU device apc driver and set up permissions. APU has its own device apc for control access by domains. For Domain 0, the access to the following slave are restricted to security read and write: apusys_ao-2, apusys_ao-4, apusys_ao-5, apu_sctrl_reviser, apu_iommu0_r1 apu_iommu0_r2, apu_iommu0_r3, apu_iommu0_r4 apu_iommu1_r1, apu_iommu1_r2, apu_iommu1_r3,apu_iommu1_r4 For VPU, D0/D5 are set as no protection, other domains are forbidden. For other slaves, the D0 is no protection, others domains are forbidden. BUG=b:203145462 BRANCH=cherry TEST=boot cherry, check dump log and test permission setup Signed-off-by: Flora Fu <flora.fu(a)mediatek.com> Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/apusys_devapc.c M src/soc/mediatek/mt8195/devapc.c M src/soc/mediatek/mt8195/include/soc/addressmap.h A src/soc/mediatek/mt8195/include/soc/apusys_devapc.h 5 files changed, 358 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/58969/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/58969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 Gerrit-Change-Number: 58969 Gerrit-PatchSet: 5 Gerrit-Owner: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: Add APU device apc driver
by flora.fu＠mediatek.com (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58969 to look at the new patch set (#4). Change subject: soc/mediatek/mt8195: Add APU device apc driver ...................................................................... soc/mediatek/mt8195: Add APU device apc driver Add APU device apc driver and set up permissions. APU has its own device apc for control access by domains. For Domain 0, the access to the following slave are restricted to security read and write: apusys_ao-2, apusys_ao-4, apusys_ao-5, apu_sctrl_reviser, apu_iommu0_r1 apu_iommu0_r2, apu_iommu0_r3, apu_iommu0_r4 apu_iommu1_r1, apu_iommu1_r2, apu_iommu1_r3,apu_iommu1_r4 For VPU, D0/D5 are set as no protection, other domains are forbidden. For other slaves, the D0 is no protection, others domains are forbidden. BUG=b:203145462 BRANCH=cherry TEST=boot cherry correctly Signed-off-by: Flora Fu <flora.fu(a)mediatek.com> Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/apusys_devapc.c M src/soc/mediatek/mt8195/devapc.c M src/soc/mediatek/mt8195/include/soc/addressmap.h A src/soc/mediatek/mt8195/include/soc/apusys_devapc.h 5 files changed, 358 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/58969/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 Gerrit-Change-Number: 58969 Gerrit-PatchSet: 4 Gerrit-Owner: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Documentation/RFC: Generalize PCI support in coreboot
by Yu-Ping Wu (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Shelley Chen, Felix Singer, Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Paul Menzel, Julius Werner, Angel Pons, Kyösti Mälkki. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57861 ) Change subject: Documentation/RFC: Generalize PCI support in coreboot ...................................................................... Patch Set 11: (1 comment) File Documentation/RFC/pci_config_access.md: https://review.coreboot.org/c/coreboot/+/57861/comment/45d93f2c_94ebf356 PS11, Line 17: Mechnaism Mechanism -- To view, visit https://review.coreboot.org/c/coreboot/+/57861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a56d932f6e047087c38a7687564065cc1562363 Gerrit-Change-Number: 57861 Gerrit-PatchSet: 11 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 09:30:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]cezanne: Add a case for UDIMM in fw.cfg
by Bao Zheng (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57752 ) Change subject: [WIP]cezanne: Add a case for UDIMM in fw.cfg ...................................................................... Patch Set 21: (1 comment) Patchset: PS21: It is hard to give a general flag to decide which FWs are loaded. We can use a mainboard's own fw.cfg. Abandon. -- To view, visit https://review.coreboot.org/c/coreboot/+/57752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0d5318a033a3325450ccdc641701ea3e69f3dde Gerrit-Change-Number: 57752 Gerrit-PatchSet: 21 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 09 Nov 2021 09:25:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: add apusys init flow
by flora.fu＠mediatek.com (Code Review) 09 Nov '21

09 Nov '21

flora.fu(a)mediatek.com has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58794 ) Change subject: soc/mediatek/mt8195: add apusys init flow ...................................................................... Patch Set 3: (4 comments) File src/soc/mediatek/mt8195/apusys.c: https://review.coreboot.org/c/coreboot/+/58794/comment/ee3a1596_8f14ae48 PS2, Line 13: int i; > `unsigned int` or `size_t` Ack https://review.coreboot.org/c/coreboot/+/58794/comment/1e0c03a6_460673cb PS2, Line 16: printk(BIOS_INFO, "APU_MBOX %p = %#x\n", > Why is this level info? The level can be reduce to DEBUG. The next patch will fix it. https://review.coreboot.org/c/coreboot/+/58794/comment/9445fbf7_f726d52e PS2, Line 24: int i; > Ditto. Ack https://review.coreboot.org/c/coreboot/+/58794/comment/2883e706_e0d2423d PS2, Line 26: Setup > Set up Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/58794 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5053d5e1f1c2286c9dce280ff83e8b8611b573b9 Gerrit-Change-Number: 58794 Gerrit-PatchSet: 3 Gerrit-Owner: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 09 Nov 2021 09:24:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: fix apusys coding defects
by flora.fu＠mediatek.com (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Hung-Te Lin. flora.fu(a)mediatek.com has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59038 ) Change subject: soc/mediatek/mt8195: fix apusys coding defects ...................................................................... soc/mediatek/mt8195: fix apusys coding defects Use size_t for count variables. Reducing debug log level and fix typo. Fix commit: https://review.coreboot.org/c/coreboot/+/58794 BUG=b:203145462 BRANCH=cherry TEST=boot cherry correctly Signed-off-by: Flora Fu <flora.fu(a)mediatek.com> Change-Id: Ic03f71b7a9038edb5877ebd9b6aed5e9bd63c918 --- M src/soc/mediatek/mt8195/apusys.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/59038/1 diff --git a/src/soc/mediatek/mt8195/apusys.c b/src/soc/mediatek/mt8195/apusys.c index bc3c4ab..fc95cab 100644 --- a/src/soc/mediatek/mt8195/apusys.c +++ b/src/soc/mediatek/mt8195/apusys.c @@ -10,10 +10,10 @@ static void dump_apusys_reg(void) { - int i; + size_t i; for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++) { - printk(BIOS_INFO, "APU_MBOX %p = %#x\n", + printk(BIOS_DEBUG, "APU_MBOX %p = %#x\n", (void *)&mt8195_apu_mbox[i]->mbox_func_cfg, read32(&mt8195_apu_mbox[i]->mbox_func_cfg)); } @@ -21,9 +21,9 @@ void apusys_init(void) { - int i; + size_t i; - /* Setup MBOX MPU for non secure access */ + /* Set up MBOX MPU for non secure access */ for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++) SET32_BITFIELDS(&mt8195_apu_mbox[i]->mbox_func_cfg, NO_MPU, 1, LOCK, 1); -- To view, visit https://review.coreboot.org/c/coreboot/+/59038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic03f71b7a9038edb5877ebd9b6aed5e9bd63c918 Gerrit-Change-Number: 59038 Gerrit-PatchSet: 1 Gerrit-Owner: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8195: Add APU device apc driver
by flora.fu＠mediatek.com (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Hung-Te Lin, flora.fu(a)mediatek.com. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58969 to look at the new patch set (#3). Change subject: soc/mediatek/mt8195: Add APU device apc driver ...................................................................... soc/mediatek/mt8195: Add APU device apc driver Add APU device apc driver and setup permissions. APU has its own device apc for control access by domains. For Domain 0, the access to the following slave are restricted to security read and write: apusys_ao-2, apusys_ao-4, apusys_ao-5, apu_sctrl_reviser, apu_iommu0_r1 apu_iommu0_r2, apu_iommu0_r3, apu_iommu0_r4 apu_iommu1_r1, apu_iommu1_r2, apu_iommu1_r3,apu_iommu1_r4 For VPU, D0/D5 are set as no protection, other domains are forbidden. For other slaves, the D0 is no protection, others domains are forbidden. BUG=b:203145462 BRANCH=cherry TEST=boot cherry correctly Signed-off-by: Flora Fu <flora.fu(a)mediatek.com> Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/apusys_devapc.c M src/soc/mediatek/mt8195/devapc.c M src/soc/mediatek/mt8195/include/soc/addressmap.h A src/soc/mediatek/mt8195/include/soc/apusys_devapc.h 5 files changed, 358 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/58969/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92d3b02ac4966332315b85d68e0f48c6a9fce85 Gerrit-Change-Number: 58969 Gerrit-PatchSet: 3 Gerrit-Owner: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: flora.fu(a)mediatek.com <flora.fu(a)mediatek.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Angel Pons (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Bill XIE, Nico Huber, Patrick Rudolph, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51671 ) Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... Patch Set 24: (1 comment) File src/arch/x86/bootblock.ld: https://review.coreboot.org/c/coreboot/+/51671/comment/179eaa35_dc73767f PS22, Line 57: _ID_SECTION_END - _ECFW_PTR > > It can only happen when someone messes up the code. […] Would the `range` Kconfig keyword work to restrict the value of ECFW_PTR_ADDR? -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 24 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Tue, 09 Nov 2021 08:52:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Bill XIE (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Bill XIE, Patrick Rudolph, Angel Pons, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Patrick Rudolph, Angel Pons, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin, Iru Cai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51671 to look at the new patch set (#24). Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time According to util/kbc1126/README.md, for these ECs to work, the address and size of their two firmware should be written to $s-0x100` (`$s` means the image size, done with kbc1126_ec_insert), which means that every existing section (especially those used to store code) should not overlap this address, otherwise the bootblock will get damaged when inserting firmwares of the EC. In this commit, ecfw_ptr is a structure initialized at build time according to CONFIG_KBC1126_FW1_OFFSET and CONFIG_KBC1126_FW2_OFFSET (to do so, they should be redefined as hex), and linked to CONFIG_ECFW_PTR_ADDR within bootblock, so kbc1126_ec_insert is not needed at build time any more. Test passed on Elitebook Folio 9470m. Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e --- M src/arch/x86/Kconfig M src/arch/x86/bootblock.ld M src/ec/hp/kbc1126/Kconfig M src/ec/hp/kbc1126/Makefile.inc A src/ec/hp/kbc1126/ecfw_ptr.c A src/ec/hp/kbc1126/ecfw_ptr.h 6 files changed, 78 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/51671/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 24 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Add support for AMD's BIOS A/B recovery feature
by Bao Zheng (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56773 ) Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature ...................................................................... Patch Set 30: (1 comment) File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/c/coreboot/+/56773/comment/bbf2979c_c1dad2d6 PS30, Line 146: usage( Add help information for new option. -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 30 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 09 Nov 2021 08:24:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021