coreboot-gerrit November 2021

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Change in coreboot[master]: ChromeOS: Add DECLARE_x_CROS_GPIOS()
by build bot (Jenkins) (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Tim Wawrzynczak, Nick Vaccaro, Karthik Ramasubramanian, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58899 ) Change subject: ChromeOS: Add DECLARE_x_CROS_GPIOS() ...................................................................... Patch Set 8: (7 comments) File src/mainboard/google/jecht/chromeos.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/b7e0ea48_105def37 PS8, Line 75: <<<<<<< HEAD spaces required around that '<' (ctx:OxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/ea41a250_73a1f70d PS8, Line 88: ======= spaces required around that '==' (ctx:ExO) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/ee58d508_b6194607 PS8, Line 88: ======= spaces required around that '==' (ctx:OxO) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/bd4c2910_ab0d5dcf PS8, Line 88: ======= spaces required around that '==' (ctx:OxO) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/26502a48_ce265721 PS8, Line 88: ======= spaces required around that '=' (ctx:OxE) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/cd0aaa1d_21467584 PS8, Line 90: >>>>>>> ChromeOS: Add DECLARE_x_CROS_GPIOS() spaces required around that '>' (ctx:OxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133435): https://review.coreboot.org/c/coreboot/+/58899/comment/ea9da97b_70fe31d8 PS8, Line 90: >>>>>>> ChromeOS: Add DECLARE_x_CROS_GPIOS() spaces required around that ':' (ctx:VxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/58899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6 Gerrit-Change-Number: 58899 Gerrit-PatchSet: 8 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 16 Nov 2021 09:32:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/../thermal: Add support for thermal config behind PMC device
by Subrata Banik (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59209 ) Change subject: soc/intel/../thermal: Add support for thermal config behind PMC device ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/common/block/thermal/thermal.c: https://review.coreboot.org/c/coreboot/+/59209/comment/916e02d7_4b901fbd PS8, Line 112: struct pmc_thermal_config { : void (*func)(uintptr_t addr, uint32_t data); : uint16_t offset; : uint32_t value; : } config[] = { : { : .func = thermal_or32, : .offset = PMC_PWRM_THERMAL_CTEN, : .value = PMC_PWRM_THERMAL_CTEN_CPDEN | PMC_PWRM_THERMAL_CTEN_CTENLOCK, : }, : { : .func = thermal_or32, : .offset = PMC_PWRM_THERMAL_ECRPTEN, : .value = PMC_PWRM_THERMAL_ECRPTEN_EN_RPT : | PMC_PWRM_THERMAL_ECRPTEN_ECRPTENLOCK, : }, : { : .func = write32p, : .offset = PMC_PWRM_THERMAL_TL, : .value = pch_get_ltt_value(dev) | PMC_PWRM_THERMAL_TL_TTEN : | PMC_PWRM_THERMAL_TL_TLLOCK, : }, : { : .func = thermal_or32, : .offset = PMC_PWRM_THERMAL_PHLC, : .value = PMC_PWRM_THERMAL_PHLC_PHLCLOCK, : }, : { : .func = thermal_or32, : .offset = PMC_PWRM_THERMAL_TLEN, : .value = PMC_PWRM_THERMAL_TLEN_TLENLOCK, : }, : }; > I kind like this structure, like we do the thermal config. […] almost same reason @Eric. Will wait for Tim to also share his thoughts on this. before that I will changes thermal_or32 -> setbits32 as highlighted -- To view, visit https://review.coreboot.org/c/coreboot/+/59209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c6ae72610da39fc18ff252c440d006e83c570a0 Gerrit-Change-Number: 59209 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Nov 2021 09:18:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Bao Zheng (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao. Hello build bot (Jenkins), Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57747 to look at the new patch set (#26). Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... amdfwtool: Add ISH header support for A/B recovery layout ISH is newly for Mendocino. The rom layout for A/B recovery with ISH: EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A 0x4A -> ISH B -> PSP L2 B -> BIOS L2 B Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/Makefile M util/amdfwtool/Makefile.inc M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 4 files changed, 76 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57747/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 26 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Add support for AMD's BIOS A/B recovery feature
by Bao Zheng (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56773 to look at the new patch set (#34). Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature ...................................................................... amdfwtool: Add support for AMD's BIOS A/B recovery feature The rom layout for A/B recovery: EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A 0x4A -> PSP L2 B -> BIOS L2 B The coreboot doesn't implement the AMD's A/B recovery. This is only for the ROM layout. To save some flash space, the entire B section can be eliminated. To enable A/B recovery in PSP layout, add "--recovery-ab" to amdfwtool. Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 197 insertions(+), 59 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/34 -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 34 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Use address mode
by Bao Zheng (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Zheng Bao. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59308 to look at the new patch set (#2). Change subject: amdfwtool: Use address mode ...................................................................... amdfwtool: Use address mode It is the expanding mode for simple relative address mode, for which address_mode equals 1. Change-Id: I29a03f4381cd0507e2b2e3b359111e3375a73de1 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 2 files changed, 75 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/59308/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29a03f4381cd0507e2b2e3b359111e3375a73de1 Gerrit-Change-Number: 59308 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/corsola: Initialize SPM
by Rex-BC Chen (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59342 ) Change subject: mb/google/corsola: Initialize SPM ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59342/comment/322603c2_4cb770f7 PS2, Line 9: This patch adds support for SPM. This adds 55ms to the boot time. > Initialize SPM (XXX XXX XXX) in RAM stage. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I822417f7a679107760b202dd43fb79d1934940bd Gerrit-Change-Number: 59342 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 16 Nov 2021 08:55:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: DO-NOT-SUBMIT: MT8186 Corsola review ToT
by Rex-BC Chen (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Rex-BC Chen. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58639 to look at the new patch set (#30). Change subject: DO-NOT-SUBMIT: MT8186 Corsola review ToT ...................................................................... DO-NOT-SUBMIT: MT8186 Corsola review ToT Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I53f304822c426417bb58037daa536bfb8dda1db3 --- M README.md 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/58639/30 -- To view, visit https://review.coreboot.org/c/coreboot/+/58639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53f304822c426417bb58037daa536bfb8dda1db3 Gerrit-Change-Number: 58639 Gerrit-PatchSet: 30 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: Add RTC and clkbuf drivers
by Rex-BC Chen (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yuchen Huang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59344 to look at the new patch set (#4). Change subject: soc/mediatek/mt8186: Add RTC and clkbuf drivers ...................................................................... soc/mediatek/mt8186: Add RTC and clkbuf drivers Add support for RTC and clkbuf. TEST=boot to kernel and check log ok BUG=b:202871018 Signed-off-by: Yuchen Huang <yuchen.huang(a)mediatek.corp-partner.google.com> Change-Id: Ia02a74f685feb2466c113a77cbfa3a7d8fedb595 --- M src/mainboard/google/corsola/romstage.c M src/soc/mediatek/mt8186/Makefile.inc A src/soc/mediatek/mt8186/include/soc/rtc.h A src/soc/mediatek/mt8186/rtc.c 4 files changed, 605 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/59344/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59344 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia02a74f685feb2466c113a77cbfa3a7d8fedb595 Gerrit-Change-Number: 59344 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yuchen Huang <yuchen.huang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: Add mtcmos init support
by Rex-BC Chen (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59343 to look at the new patch set (#4). Change subject: soc/mediatek/mt8186: Add mtcmos init support ...................................................................... soc/mediatek/mt8186: Add mtcmos init support Add mtcmos to support display and audio. TEST=build pass BUG=b:202871018 Signed-off-by: Chun-Jie Chen <chun-jie.chen(a)mediatek.com> Change-Id: Ib9d41d47f235376f524c3ff78f1fcc069cbc60cd --- M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8186/include/soc/spm.h A src/soc/mediatek/mt8186/mtcmos.c M src/soc/mediatek/mt8186/spm.c 4 files changed, 42 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/59343/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9d41d47f235376f524c3ff78f1fcc069cbc60cd Gerrit-Change-Number: 59343 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chun-Jie Chen <chun-jie.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/corsola: Initialize SPM
by Rex-BC Chen (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59342 to look at the new patch set (#4). Change subject: mb/google/corsola: Initialize SPM ...................................................................... mb/google/corsola: Initialize SPM Initialize SPM (System Power Management) in RAM stage. This adds 55ms to the boot time. TEST=program counter of SPM is correct value(0x250) after booting up BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I822417f7a679107760b202dd43fb79d1934940bd --- M src/mainboard/google/corsola/mainboard.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/59342/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I822417f7a679107760b202dd43fb79d1934940bd Gerrit-Change-Number: 59342 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021