coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/../thermal: Drop unused `dev` parameter in pch_get_ltt_value()
by EricR Lai (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Subrata Banik, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59390 ) Change subject: soc/intel/../thermal: Drop unused `dev` parameter in pch_get_ltt_value() ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59390/comment/dba89724_d7ac7184 PS3, Line 7: /../ > Maybe `soc/intel/cmn/thermal`, but I'm not sure if it's an improvement. […] I suggest leave it along, we can see the full path from the diff. -- To view, visit https://review.coreboot.org/c/coreboot/+/59390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecdf6f6c3023f896a27e212d7c59b2030a3fd116 Gerrit-Change-Number: 59390 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 19 Nov 2021 13:25:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: device/pci_device.c: Improve pci_bridge_route() readability
by Angel Pons (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Arthur Heymans, Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59131 ) Change subject: device/pci_device.c: Improve pci_bridge_route() readability ...................................................................... Patch Set 3: Code-Review+1 (2 comments) File src/device/pci_device.c: https://review.coreboot.org/c/coreboot/+/59131/comment/7d4ae1b0_eccc0026 PS1, Line 1337: u32 raw; : struct { : u8 primary; : u8 secondary; : u8 subordinate; : u8 _latency; : } __packed; > > Depends on the implementation of pci_write_config32(). IMHO, it should be […] Thanks! File src/device/pci_device.c: https://review.coreboot.org/c/coreboot/+/59131/comment/778640c8_81100ade PS3, Line 1347: secondary subordinate -- To view, visit https://review.coreboot.org/c/coreboot/+/59131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3bafd6a2e1d3a0b8d1d43997868a787ce3940ca9 Gerrit-Change-Number: 59131 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 19 Nov 2021 13:25:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in blobs[master]: soc/mediatek/mt8186: Add MT8186 basic files
by Hung-Te Lin (Code Review) 19 Nov '21

19 Nov '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/blobs/+/59335 ) Change subject: soc/mediatek/mt8186: Add MT8186 basic files ...................................................................... soc/mediatek/mt8186: Add MT8186 basic files Add README.md and license.txt. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ic6198353b1f7cca683875339a5fc4378a783d7a2 --- A soc/mediatek/mt8186/README.md A soc/mediatek/mt8186/license.txt 2 files changed, 12 insertions(+), 0 deletions(-) Approvals: Rex-BC Chen: Looks good to me, but someone else must approve Yu-Ping Wu: Verified; Looks good to me, approved diff --git a/soc/mediatek/mt8186/README.md b/soc/mediatek/mt8186/README.md new file mode 100644 index 0000000..6582718 --- /dev/null +++ b/soc/mediatek/mt8186/README.md @@ -0,0 +1,3 @@ +# Firmware list + +-------------------------------------------------------------------------------- diff --git a/soc/mediatek/mt8186/license.txt b/soc/mediatek/mt8186/license.txt new file mode 100644 index 0000000..6886c61 --- /dev/null +++ b/soc/mediatek/mt8186/license.txt @@ -0,0 +1,9 @@ +MediaTek Inc. grants permission to use and redistribute aforementioned firmware +files for the use with devices containing MediaTek chipsets, but not as part of +the Linux kernel or in any other form which would require these files themselves +to be covered by the terms of the GNU General Public License or the GNU Lesser +General Public License. + +These firmware files are distributed in the hope that they will be useful, but +are provided WITHOUT ANY WARRANTY, INCLUDING BUT NOT LIMITED TO IMPLIED WARRANTY +OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. -- To view, visit https://review.coreboot.org/c/blobs/+/59335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: Ic6198353b1f7cca683875339a5fc4378a783d7a2 Gerrit-Change-Number: 59335 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: ec/starlabs: Add standardised ITE EC support
by Sean Rhodes (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Andy Pont, Paul Menzel, Angel Pons, Felix Held. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58343 ) Change subject: ec/starlabs: Add standardised ITE EC support ...................................................................... Patch Set 53: (1 comment) File src/ec/starlabs/merlin/Makefile.inc: https://review.coreboot.org/c/coreboot/+/58343/comment/43ba5ac8_2b3f2cc2 PS51, Line 14: ifeq ($(CONFIG_EC_STARLABS_NEED_ITE_BIN),y) : ifeq ($(CONFIG_EC_STARLABS_ADD_ITE_BIN),y) : ifeq ($(CONFIG_EC_STARLABS_IT_BIN_PATH),) : files_added:: warn_no_ite_fw : : PHONY+=warn_no_ite_fw : warn_no_ite_fw: : printf "\n\t** WARNING **\n" : printf "coreboot has been built without the ITE EC Firmware.\n" : printf "Do not flash this image. Your laptop's power button\n" : printf "may not respond when you press it.\n\n" : : else : add_ite_fw: $(obj)/coreboot.pre : $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_EC_STARLABS_IT_BIN_PATH) -u : : endif : endif : endif > Looks like Gerrit shows two empty lines before the indented blocks. […] Sorted. -- To view, visit https://review.coreboot.org/c/coreboot/+/58343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Gerrit-Change-Number: 58343 Gerrit-PatchSet: 53 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 19 Nov 2021 13:22:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/../thermal: Drop unused `dev` parameter in pch_get_ltt_value()
by Angel Pons (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59390 ) Change subject: soc/intel/../thermal: Drop unused `dev` parameter in pch_get_ltt_value() ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59390/comment/00dbbc56_d06e9449 PS3, Line 7: /../ > soc/intel/common/block/thermal: […] Maybe `soc/intel/cmn/thermal`, but I'm not sure if it's an improvement. Felix, any suggestions? Or can we leave this as-is? -- To view, visit https://review.coreboot.org/c/coreboot/+/59390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecdf6f6c3023f896a27e212d7c59b2030a3fd116 Gerrit-Change-Number: 59390 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 19 Nov 2021 13:21:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/RFC: Generalize PCI support in coreboot
by Angel Pons (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Shelley Chen, Felix Singer, Nico Huber, Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Paul Menzel, Julius Werner, Kyösti Mälkki, Yu-Ping Wu, Jianjun Wang. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57861 ) Change subject: Documentation/RFC: Generalize PCI support in coreboot ...................................................................... Patch Set 12: (2 comments) File Documentation/RFC/pci_config_access.md: https://review.coreboot.org/c/coreboot/+/57861/comment/ec0ce5b8_e949faaf PS12, Line 129: MMONCF typo: MMCONF https://review.coreboot.org/c/coreboot/+/57861/comment/89598e77_f3b387ee PS12, Line 125: ### Specifying MMIO support for PCI devices that don't support ECAM : : We’ll need to be able to distinguish between a platform using the ECAM access : method and any other MMIO access mechanism. For devices that support ECAM, they : would have to select the `ECAM_MMONCF_SUPPORT` config. For devices that don't : support ECAM and would still need MMIO support, they would need to explictly : select the `NO_ECAM_MMCONF_SUPPORT` config and include the `pci_mmio_cfg.h' : header file in their platform-specific source. > The "example" linked below around get_pci_mmio_cfgbase() looks […] +1 to what Nico said. To me, the `NO_ECAM_MMCONF_SUPPORT` option is about the coreboot code, not the hardware. Only implementing method 1 with `pci_map_bus()` and selecting `NO_ECAM_MMCONF_SUPPORT` is completely fine, even if the hardware supports MMCONF. -- To view, visit https://review.coreboot.org/c/coreboot/+/57861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a56d932f6e047087c38a7687564065cc1562363 Gerrit-Change-Number: 57861 Gerrit-PatchSet: 12 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 13:18:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/elkhartlake: Disable Intel PSE by default
by Werner Zeh (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Lean Sheng Tan, Michael Niewöhner, Patrick Rudolph. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59484 ) Change subject: soc/intel/elkhartlake: Disable Intel PSE by default ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59484 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccc0ab1c2e4ebb53013795933eb88262f70f456f Gerrit-Change-Number: 59484 Gerrit-PatchSet: 2 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 19 Nov 2021 12:14:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/elkhartlake: Add PSE TSN support
by Werner Zeh (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Mario Scheithauer, Angel Pons, Lean Sheng Tan, Patrick Rudolph. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56633 ) Change subject: soc/intel/elkhartlake: Add PSE TSN support ...................................................................... Patch Set 25: (9 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56633/comment/49702fdf_699855d0 PS25, Line 13: PSSE PSE? File src/soc/intel/elkhartlake/chip.h: https://review.coreboot.org/c/coreboot/+/56633/comment/4e2fa44b_cf3c634d PS25, Line 26: Extra TAB not needed. https://review.coreboot.org/c/coreboot/+/56633/comment/8f4b6cc3_632d7f33 PS25, Line 476: 2 Use MAX_PSE_TSN_PORTS here instead? https://review.coreboot.org/c/coreboot/+/56633/comment/9e0bb5ea_548c827c PS25, Line 479: 2 MAX_PSE_TSN_PORTS as well? https://review.coreboot.org/c/coreboot/+/56633/comment/597a39a4_160b6549 PS25, Line 482: 2 And here MAX_PSE_TSN_PORTS, too? https://review.coreboot.org/c/coreboot/+/56633/comment/71f427ab_758e2c23 PS25, Line 484: 2 Same here? https://review.coreboot.org/c/coreboot/+/56633/comment/500ae282_04cb1174 PS25, Line 510: 2 Would MAX_PSE_TSN_PORTS make sense here? File src/soc/intel/elkhartlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/56633/comment/8775f9eb_40b9b12a PS25, Line 89: configs setup config values https://review.coreboot.org/c/coreboot/+/56633/comment/192b9b80_f529c2eb PS25, Line 89: 'in' or 'from' -- To view, visit https://review.coreboot.org/c/coreboot/+/56633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3807ff5a4578be7b2c67064525fa5099950986a Gerrit-Change-Number: 56633 Gerrit-PatchSet: 25 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 19 Nov 2021 12:13:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ec/starlabs: Add standardised ITE EC support
by Angel Pons (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Sean Rhodes, Andy Pont, Paul Menzel, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58343 ) Change subject: ec/starlabs: Add standardised ITE EC support ...................................................................... Patch Set 52: Code-Review+2 (1 comment) File src/ec/starlabs/merlin/Makefile.inc: https://review.coreboot.org/c/coreboot/+/58343/comment/2d1fa938_3a41517b PS51, Line 14: ifeq ($(CONFIG_EC_STARLABS_NEED_ITE_BIN),y) : ifeq ($(CONFIG_EC_STARLABS_ADD_ITE_BIN),y) : ifeq ($(CONFIG_EC_STARLABS_IT_BIN_PATH),) : files_added:: warn_no_ite_fw : : PHONY+=warn_no_ite_fw : warn_no_ite_fw: : printf "\n\t** WARNING **\n" : printf "coreboot has been built without the ITE EC Firmware.\n" : printf "Do not flash this image. Your laptop's power button\n" : printf "may not respond when you press it.\n\n" : : else : add_ite_fw: $(obj)/coreboot.pre : $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_EC_STARLABS_IT_BIN_PATH) -u : : endif : endif : endif > Done Looks like Gerrit shows two empty lines before the indented blocks. They're not actually empty lines. These would be lines 17 and 24 on patchset 52. -- To view, visit https://review.coreboot.org/c/coreboot/+/58343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Gerrit-Change-Number: 58343 Gerrit-PatchSet: 52 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 19 Nov 2021 12:09:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/elkhartlake: Introduce Intel PSE
by Werner Zeh (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Arthur Heymans, Maulik V Vaghela, Paul Menzel, Angel Pons, Subrata Banik, Michael Niewöhner, Patrick Rudolph, Nico Huber, Martin Roth, Mario Scheithauer, Lean Sheng Tan, Felix Held. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 ) Change subject: soc/intel/elkhartlake: Introduce Intel PSE ...................................................................... Patch Set 55: Code-Review+1 (2 comments) File src/soc/intel/elkhartlake/Makefile.inc: https://review.coreboot.org/c/coreboot/+/55367/comment/edb74086_37fb0d44 PS52, Line 52: CONFIG_ADD_PSE_IMAGE_TO_CBFS > We usually show a warning at the end of the build if a file is missing, cf. CB:57368. I will provide a follow-up patch to handle this warning. File src/soc/intel/elkhartlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/55367/comment/ad221e17_c0bf28fd PS55, Line 94: printk(BIOS_DEBUG, "PSE base: %08x size: %08zx\n", : pse_fw_base, psefwsize); This do fit on one line now. -- To view, visit https://review.coreboot.org/c/coreboot/+/55367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifea08fb82fea18ef66bab04b3ce378e79a0afbf7 Gerrit-Change-Number: 55367 Gerrit-PatchSet: 55 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 19 Nov 2021 11:59:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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coreboot-gerrit November 2021