coreboot-gerrit October 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/caroline: Update _HID for digitizer
by Michael Niewöhner (Code Review) 12 Oct '21

12 Oct '21

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58186 ) Change subject: mb/google/caroline: Update _HID for digitizer ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > ACPI0C50 is (one of) the _HID for i2c-hid in linux. […] What about these? https://github.com/torvalds/linux/blob/master/drivers/hid/i2c-hid/i2c-hid-a… https://github.com/torvalds/linux/blob/master/drivers/input/touchscreen/ela… -- To view, visit https://review.coreboot.org/c/coreboot/+/58186 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I732b09001dc41a91a32a5f9260abdab435b28b8a Gerrit-Change-Number: 58186 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 11 Oct 2021 18:51:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Fix for LDDR5
by Cliff Huang (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Paul Menzel, Sridhar Siricilla, Bernardo Perez Priego. Hello Bora Guvendik, Anil Kumar K, build bot (Jenkins), Selma Bensaid, Tim Wawrzynczak, Sridhar Siricilla, Bernardo Perez Priego, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58101 to look at the new patch set (#6). Change subject: lib/spd_bin: Fix for LDDR5 ...................................................................... lib/spd_bin: Fix for LDDR5 Add LDDR5 for the param Fix SPD name for LDDR5 This addresses the warning message: Defaulting to using DDR4 params. Please add dram_type check for 19 to use_ddr4_params Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 --- M src/lib/spd_bin.c 1 file changed, 10 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/58101/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/poppy: set SMBIOS enclosure type for all poppy variants
by Matt DeVillier (Code Review) 12 Oct '21

12 Oct '21

Matt DeVillier has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/58229 ) Change subject: mb/google/poppy: set SMBIOS enclosure type for all poppy variants ...................................................................... mb/google/poppy: set SMBIOS enclosure type for all poppy variants Some poppy variants did not select a system type, which led to the default desktop type being set. Select the best fit enclosure type for each variant. Alphabetize the variants specific options for improved readability/clarity. Change-Id: I7c23f8fa3ae1de67f7a68b8a4e9ec16c4e8044df Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/poppy/Kconfig 1 file changed, 11 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/58229/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c23f8fa3ae1de67f7a68b8a4e9ec16c4e8044df Gerrit-Change-Number: 58229 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/poppy: set SMBIOS enclosure type for all poppy variants
by Matt DeVillier (Code Review) 12 Oct '21

12 Oct '21

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58229 ) Change subject: mb/google/poppy: set SMBIOS enclosure type for all poppy variants ...................................................................... mb/google/poppy: set SMBIOS enclosure type for all poppy variants Some poppy variants did not select a system type, which led to the default desktop type being set. Select the best fit enclosure type for each variant. Alphabetize the variants specific options for improved readability/clarity. Change-Id: I7c23f8fa3ae1de67f7a68b8a4e9ec16c4e8044df Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/poppy/Kconfig 1 file changed, 8 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/58229/1 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index f4be0c5..7314181 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -135,10 +135,11 @@ select DRIVERS_SPI_ACPI select DRIVERS_USB_ACPI select EXCLUDE_NATIVE_SD_INTERFACE + select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_HAS_SPI_TPM_CR50 + select SYSTEM_TYPE_LAPTOP select VARIANT_HAS_CAMERA_ACPI - select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR config VARIANT_SPECIFIC_OPTIONS_POPPY def_bool n @@ -155,14 +156,16 @@ select DRIVERS_SPI_ACPI select EXCLUDE_NATIVE_SD_INTERFACE select MAINBOARD_HAS_SPI_TPM_CR50 + select SYSTEM_TYPE_LAPTOP config VARIANT_SPECIFIC_OPTIONS_NAUTILUS def_bool n select CHROMEOS_WIFI_SAR if CHROMEOS select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 - select VARIANT_HAS_CAMERA_ACPI select MAINBOARD_HAS_I2C_TPM_CR50 + select SYSTEM_TYPE_CONVERTIBLE + select VARIANT_HAS_CAMERA_ACPI config VARIANT_SPECIFIC_OPTIONS_NOCTURNE def_bool n @@ -173,11 +176,11 @@ select DRIVERS_SPI_ACPI select DRIVERS_USB_ACPI select EXCLUDE_NATIVE_SD_INTERFACE + select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR select MAINBOARD_HAS_SPI_TPM_CR50 select NO_FADT_8042 select SYSTEM_TYPE_DETACHABLE select VARIANT_HAS_CAMERA_ACPI - select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR config VARIANT_SPECIFIC_OPTIONS_RAMMUS def_bool n @@ -188,14 +191,15 @@ select DRIVERS_USB_ACPI select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_HAS_SPI_TPM_CR50 + select SYSTEM_TYPE_LAPTOP config VARIANT_SPECIFIC_OPTIONS_SORAKA def_bool n select DRIVERS_I2C_MAX98927 + select MAINBOARD_HAS_I2C_TPM_CR50 select NO_FADT_8042 select SYSTEM_TYPE_DETACHABLE select VARIANT_HAS_CAMERA_ACPI - select MAINBOARD_HAS_I2C_TPM_CR50 config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES -- To view, visit https://review.coreboot.org/c/coreboot/+/58229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c23f8fa3ae1de67f7a68b8a4e9ec16c4e8044df Gerrit-Change-Number: 58229 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: lib/spd_bin: Fix for LDDR5
by Cliff Huang (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Paul Menzel, Sridhar Siricilla, Bernardo Perez Priego. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Fix for LDDR5 ...................................................................... Patch Set 5: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58101/comment/aff75976_68290273 PS5, Line 9: Added LDDR5 for the param : Fixed SPD name for LDDR5 > Please format it as a list, and use imperative mood (Add, Fix). Done https://review.coreboot.org/c/coreboot/+/58101/comment/91231e90_5006ebec PS5, Line 11: with > With Done https://review.coreboot.org/c/coreboot/+/58101/comment/df57cc57_ddce9f60 PS5, Line 11: with this change, we won't get this warning message: > Please add a blank line above, and maybe just write: […] Done File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/38eb4d53_df4291a7 PS5, Line 27: use_ddr4_params > This name should be updated, if DDR5 is also handled. Done https://review.coreboot.org/c/coreboot/+/58101/comment/2753aedd_ca4a1cf7 PS5, Line 37: case SPD_DRAM_LPDDR5: > Please order it one line below. Done https://review.coreboot.org/c/coreboot/+/58101/comment/8bb3d786_4591ac4a PS5, Line 169: case SPD_DRAM_LPDDR5: > Please order it below. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 5 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 11 Oct 2021 18:33:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: switch to common ACPI code
by Matt DeVillier (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Felix Singer, Furquan Shaikh, Benjamin Doron, Paul Menzel, Mimoja, Subrata Banik, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Matthew Garrett, Patrick Rudolph, Aaron Durbin, Tim Crawford, Nico Huber, Tim Wawrzynczak, Maxim Polyakov, Michal Zygowski, Wim Vervoorn. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44138 ) Change subject: soc/intel/skylake: switch to common ACPI code ...................................................................... Patch Set 22: (1 comment) File src/soc/intel/skylake/Kconfig: https://review.coreboot.org/c/coreboot/+/44138/comment/c3c35966_0e384f29 PS22, Line 54: select SOC_INTEL_COMMON_BLOCK_ACPI needs `SOC_INTEL_COMMON_BLOCK_ACPI_CPPC` too -- To view, visit https://review.coreboot.org/c/coreboot/+/44138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ec804ae4006a2d9b69c0d93a658eb3b84d60b40 Gerrit-Change-Number: 44138 Gerrit-PatchSet: 22 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matthew Garrett <mjg59(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mimoja <coreboot(a)mimoja.de> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Matthew Garrett <mjg59(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Mon, 11 Oct 2021 18:25:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: southbridge/intel/common: Add an option to allow stitching of CSE binary
by Tim Wawrzynczak (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Cliff Huang, Furquan Shaikh, Sridhar Siricilla, Bernardo Perez Priego, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58083 ) Change subject: southbridge/intel/common: Add an option to allow stitching of CSE binary ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ab377e110610f9ef4d86a2b6eeb4113897df85 Gerrit-Change-Number: 58083 Gerrit-PatchSet: 15 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 11 Oct 2021 17:48:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/cse*: Add cse_helpers.{c,h}
by Tim Wawrzynczak (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Furquan Shaikh. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58201 ) Change subject: util/cse*: Add cse_helpers.{c,h} ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58201 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b646b29c9058d892bb0fc9824ef1b4340d2510c Gerrit-Change-Number: 58201 Gerrit-PatchSet: 3 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Mon, 11 Oct 2021 17:45:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/cse_serger: Add a new tool for stitching CSE components
by Tim Wawrzynczak (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Cliff Huang, Furquan Shaikh, Martin Roth, Rizwan Qureshi, Sridhar Siricilla, Bernardo Perez Priego, Andrew McRae. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55503 ) Change subject: util/cse_serger: Add a new tool for stitching CSE components ...................................................................... Patch Set 24: Code-Review+1 (3 comments) File util/cbfstool/bpdt_formats/bpdt_1_6.c: https://review.coreboot.org/c/coreboot/+/55503/comment/970c1329_587f2603 PS22, Line 63: /* TODO(furquan): Need to calculate checksum */ > Raised b/202549343 to ensure this gets addressed. I will update the TODO with bug#. Ack File util/cbfstool/bpdt_formats/bpdt_1_7.c: https://review.coreboot.org/c/coreboot/+/55503/comment/7e2a970e_e11ddf03 PS22, Line 210: l->checksum = calculate_layout_checksum(l); > `calculate_layout_checksum()` stashes what is in l->checksum to curr_checksum, sets it to 0 to perfo […] or a comment? https://review.coreboot.org/c/coreboot/+/55503/comment/166f3e0b_2fd2a8b9 PS22, Line 317: crc32(0xffff > It is on line 326 below once the checksum is calculated on header and all the entries. Ah yes ok. caught my eye first time around. -- To view, visit https://review.coreboot.org/c/coreboot/+/55503 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90dd809b47fd16afdc80e66431312721082496aa Gerrit-Change-Number: 55503 Gerrit-PatchSet: 24 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Andrew McRae <amcrae(a)google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Attention: Andrew McRae <amcrae(a)google.com> Gerrit-Comment-Date: Mon, 11 Oct 2021 17:44:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cse_fpt: Add a new tool for managing Intel CSE FPT binaries
by Tim Wawrzynczak (Code Review) 12 Oct '21

12 Oct '21

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coreboot-gerrit October 2021