Hello Marco Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/33661
to review the following change.
Change subject: vendorcode/google: load sar config from CBFS first then VPD
......................................................................
vendorcode/google: load sar config from CBFS first then VPD
SAR config provisioned in RO VPD can be done in the factory only. Once
it is wrong, we can override the SAR config by updating FW RW which can
carry new SAR config in CBFS. As a result, we should check CBFS first
then VPD.
Change-Id: I5aa6235fb7a6d0b2ed52893a42f7bd57806af6c1
Signed-off-by: Marco Chen <marcochen(a)chromium.org>
---
M src/vendorcode/google/chromeos/sar.c
1 file changed, 23 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/33661/1
diff --git a/src/vendorcode/google/chromeos/sar.c b/src/vendorcode/google/chromeos/sar.c
index bbcb211..a5a2c3b 100644
--- a/src/vendorcode/google/chromeos/sar.c
+++ b/src/vendorcode/google/chromeos/sar.c
@@ -82,36 +82,37 @@
sizeof(struct wifi_sar_delta_table);
}
- /* Try to read the SAR limit entry from VPD */
- if (!vpd_gets(wifi_sar_limit_key, wifi_sar_limit_str,
- buffer_size, VPD_ANY)) {
- printk(BIOS_ERR, "Error: Could not locate '%s' in VPD.\n",
- wifi_sar_limit_key);
-
- if (!CONFIG(WIFI_SAR_CBFS))
- return -1;
-
+ if (CONFIG(WIFI_SAR_CBFS)) {
printk(BIOS_DEBUG, "Checking CBFS for default SAR values\n");
sar_cbfs_len = load_sar_file_from_cbfs(
(void *) wifi_sar_limit_str,
sar_expected_len);
- if (sar_cbfs_len != sar_expected_len) {
- printk(BIOS_ERR, "%s has bad len in CBFS\n",
- WIFI_SAR_CBFS_FILENAME);
- return -1;
- }
- } else {
- /* VPD key "wifi_sar" found. strlen is checked with addition of
- * 1 as we have created buffer size 1 char larger for the reason
- * mentioned at start of this function itself */
- if (strlen(wifi_sar_limit_str) + 1 != sar_expected_len) {
- printk(BIOS_ERR, "WIFI SAR key has bad len in VPD\n");
- return -1;
- }
+ if (sar_cbfs_len == sar_expected_len)
+ goto done;
+
+ printk(BIOS_ERR, "%s has bad len in CBFS\n",
+ WIFI_SAR_CBFS_FILENAME);
}
+ /* Try to read the SAR limit entry from VPD */
+ if (!vpd_gets(wifi_sar_limit_key, wifi_sar_limit_str,
+ buffer_size, VPD_ANY)) {
+ printk(BIOS_ERR, "Error: Could not locate '%s' in VPD.\n",
+ wifi_sar_limit_key);
+ return -1;
+ }
+
+ /* VPD key "wifi_sar" found. strlen is checked with addition of
+ * 1 as we have created buffer size 1 char larger for the reason
+ * mentioned at start of this function itself */
+ if (strlen(wifi_sar_limit_str) + 1 != sar_expected_len) {
+ printk(BIOS_ERR, "WIFI SAR key has bad len in VPD\n");
+ return -1;
+ }
+
+done:
/* Decode the heximal encoded string to binary values */
if (hexstrtobin(wifi_sar_limit_str, bin_buffer, bin_buff_adjusted_size)
< bin_buff_adjusted_size) {
--
To view, visit https://review.coreboot.org/c/coreboot/+/33661
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5aa6235fb7a6d0b2ed52893a42f7bd57806af6c1
Gerrit-Change-Number: 33661
Gerrit-PatchSet: 1
Gerrit-Owner: Marco Chen <marcochen(a)google.com>
Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org>
Gerrit-MessageType: newchange
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41290 )
Change subject: Documentation: Add GbE and test results disabling it
......................................................................
Documentation: Add GbE and test results disabling it
The GbE region should not be disabled without further IFD modifications.
Change-Id: Ie7e3104bcf9cf28b32f15ec4268d8a3fa35c0d9f
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
A Documentation/soc/intel/gbe.md
M Documentation/soc/intel/index.md
2 files changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/41290/1
diff --git a/Documentation/soc/intel/gbe.md b/Documentation/soc/intel/gbe.md
new file mode 100644
index 0000000..19094c6
--- /dev/null
+++ b/Documentation/soc/intel/gbe.md
@@ -0,0 +1,21 @@
+# Intel Flash descriptor GbE region
+
+The gigabit ethernet (GbE) region is an 8 KiB reserved area of the x86 boot
+NOR SPI flash. The position withing the flash is specified by the IFD.
+
+The GbE regiong stores configuration data, for e.g. the MAC address
+of the Intel onboard network interface card. Thus if the Intel onboard
+network card isn't used by the mainboard, there's no GbE region present.
+
+The GbE region is named `gbe` in flashrom and ifdtool.
+
+# Removing the GbE
+
+Removing the GbE (marking the region as unused in the IFD) on a platform
+that has the onboard NIC enabled in fuses results in a no boot.
+
+# Clearing the GbE region
+
+Overwriting the GbE region allows to boot and the GbE PCI device shows
+up on GNU/Linux. The e1000e fails to load with 'error -3'.
+
diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md
index f30ff9a..2df1fe6 100644
--- a/Documentation/soc/intel/index.md
+++ b/Documentation/soc/intel/index.md
@@ -10,3 +10,7 @@
- [MP Initialization](mp_init/mp_init.md)
- [Firmware Interface Table](fit.md)
- [Apollolake](apollolake/index.md)
+
+## IFD
+
+- [GbE region](gbe.md)
--
To view, visit https://review.coreboot.org/c/coreboot/+/41290
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie7e3104bcf9cf28b32f15ec4268d8a3fa35c0d9f
Gerrit-Change-Number: 41290
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-MessageType: newchange