Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37277 )
Change subject: soc/intel/fsp-car: Clear the whole usable CAR region
......................................................................
soc/intel/fsp-car: Clear the whole usable CAR region
Other symbols in car.ld likely expect to be zero initialized.
Change-Id: I44a0d3947eb6dd67dfd2d7f03e5c0766b043f61b
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
1 file changed, 6 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37277/1
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index 091fc4a..ec43311 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -89,13 +89,14 @@
/* Setup bootblock stack */
mov %edx, %esp
- /* clear .bss section as it is not shared */
+ /* coreboot assumes CAR region will be zero */
cld
- xor %eax, %eax
- movl $(_ebss), %ecx
- movl $(_bss), %edi
- sub %edi, %ecx
+ movl %ecx, %edi
+ neg %ecx
+ /* Clear up to Temp Ram top. */
+ add %edx, %ecx
shrl $2, %ecx
+ xorl %eax, %eax
rep stosl
/* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I44a0d3947eb6dd67dfd2d7f03e5c0766b043f61b
Gerrit-Change-Number: 37277
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37276 )
Change subject: drivers/intel/fsp1.1: Use the coreboot symbols for the stack
......................................................................
drivers/intel/fsp1.1: Use the coreboot symbols for the stack
We want to know where the stack is, to make sure that it does not
override other CAR symbols.
Change-Id: I9edf615bff11aa38fc307b4e2e2c97f1757a05a1
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/drivers/intel/fsp1_1/cache_as_ram.S
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/37276/1
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.S b/src/drivers/intel/fsp1_1/cache_as_ram.S
index fea7acb..fb39884 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.S
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.S
@@ -143,8 +143,8 @@
cmp $0, %eax
jne halt2
- /* Setup bootloader stack */
- movl %edx, %esp
+ /* Setup BSP stack */
+ movl _ecar_stack, %esp
/*
* ebp: FSP_INFO_HEADER address
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9edf615bff11aa38fc307b4e2e2c97f1757a05a1
Gerrit-Change-Number: 37276
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35873 )
Change subject: soc/intel/broadwell/acpi: Use the correct last PCI BUS
......................................................................
soc/intel/broadwell/acpi: Use the correct last PCI BUS
Use the correct last PCI BUS number. The MMCONF_BASE is 0xf000000 so
256 busses is most certainly wrong. The bootblock programs it to 64
busses, so the assumption is that the mrc.bin does not modify that.
Change-Id: Id8a8d10e069f2ab6dd5c87d2df462d00c6fad11e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/broadwell/acpi.c
2 files changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/35873/1
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 5856ef1..13fdd55 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -85,6 +85,10 @@
hex
default 0xf0000000
+config MMCONF_BUS_NUMBER
+ int
+ default 64
+
config SMM_TSEG_SIZE
hex
default 0x800000
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 7acde68..b5b7f0b 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -219,7 +219,8 @@
unsigned long acpi_fill_mcfg(unsigned long current)
{
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
- MCFG_BASE_ADDRESS, 0, 0, 255);
+ MCFG_BASE_ADDRESS, 0, 0,
+ CONFIG_MMCONF_BUS_NUMBER - 1);
return current;
}
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Id8a8d10e069f2ab6dd5c87d2df462d00c6fad11e
Gerrit-Change-Number: 35873
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newchange