coreboot-gerrit March 2020

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Change in coreboot[master]: mainboard/[a-f]*: Remove copyright notices
by Patrick Georgi (Code Review) 18 Mar '20

18 Mar '20

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39606 ) Change subject: mainboard/[a-f]*: Remove copyright notices ...................................................................... mainboard/[a-f]*: Remove copyright notices They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/mainboard/amd/gardenia/BiosCallOuts.c M src/mainboard/amd/gardenia/Kconfig M src/mainboard/amd/gardenia/Makefile.inc M src/mainboard/amd/gardenia/OemCustomize.c M src/mainboard/amd/gardenia/acpi/gpe.asl M src/mainboard/amd/gardenia/acpi/mainboard.asl M src/mainboard/amd/gardenia/acpi/routing.asl M src/mainboard/amd/gardenia/acpi/sleep.asl M src/mainboard/amd/gardenia/acpi/usb_oc.asl M src/mainboard/amd/gardenia/bootblock/OemCustomize.c M src/mainboard/amd/gardenia/bootblock/bootblock.c M src/mainboard/amd/gardenia/devicetree.cb M src/mainboard/amd/gardenia/dsdt.asl M src/mainboard/amd/gardenia/gpio.c M src/mainboard/amd/gardenia/gpio.h M src/mainboard/amd/gardenia/irq_tables.c M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/gardenia/mptable.c M src/mainboard/amd/gardenia/romstage.c M src/mainboard/amd/inagua/BiosCallOuts.c M src/mainboard/amd/inagua/Kconfig M src/mainboard/amd/inagua/Makefile.inc M src/mainboard/amd/inagua/OemCustomize.c M src/mainboard/amd/inagua/OptionsIds.h M src/mainboard/amd/inagua/acpi/gpe.asl M src/mainboard/amd/inagua/acpi/ide.asl M src/mainboard/amd/inagua/acpi/mainboard.asl M src/mainboard/amd/inagua/acpi/routing.asl M src/mainboard/amd/inagua/acpi/sata.asl M src/mainboard/amd/inagua/acpi/sleep.asl M src/mainboard/amd/inagua/acpi/usb_oc.asl M src/mainboard/amd/inagua/acpi_tables.c M src/mainboard/amd/inagua/bootblock.c M src/mainboard/amd/inagua/buildOpts.c M src/mainboard/amd/inagua/cmos.layout M src/mainboard/amd/inagua/devicetree.cb M src/mainboard/amd/inagua/dsdt.asl M src/mainboard/amd/inagua/irq_tables.c M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/inagua/mptable.c M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/olivehill/BiosCallOuts.c M src/mainboard/amd/olivehill/Kconfig M src/mainboard/amd/olivehill/Makefile.inc M src/mainboard/amd/olivehill/OemCustomize.c M src/mainboard/amd/olivehill/OptionsIds.h M src/mainboard/amd/olivehill/acpi/gpe.asl M src/mainboard/amd/olivehill/acpi/ide.asl M src/mainboard/amd/olivehill/acpi/mainboard.asl M src/mainboard/amd/olivehill/acpi/routing.asl M src/mainboard/amd/olivehill/acpi/sata.asl M src/mainboard/amd/olivehill/acpi/si.asl M src/mainboard/amd/olivehill/acpi/sleep.asl M src/mainboard/amd/olivehill/acpi/usb_oc.asl M src/mainboard/amd/olivehill/acpi_tables.c M src/mainboard/amd/olivehill/buildOpts.c M src/mainboard/amd/olivehill/cmos.layout M src/mainboard/amd/olivehill/devicetree.cb M src/mainboard/amd/olivehill/dsdt.asl M src/mainboard/amd/olivehill/irq_tables.c M src/mainboard/amd/olivehill/mainboard.c M src/mainboard/amd/olivehill/mptable.c M src/mainboard/amd/padmelon/BiosCallOuts.c M src/mainboard/amd/padmelon/BiosCallOuts.h M src/mainboard/amd/padmelon/Kconfig M src/mainboard/amd/padmelon/Makefile.inc M src/mainboard/amd/padmelon/OemCustomize.c M src/mainboard/amd/padmelon/acpi/gpe.asl M src/mainboard/amd/padmelon/acpi/mainboard.asl M src/mainboard/amd/padmelon/acpi/routing.asl M src/mainboard/amd/padmelon/acpi/sleep.asl M src/mainboard/amd/padmelon/acpi/usb_oc.asl M src/mainboard/amd/padmelon/bootblock/OemCustomize.c M src/mainboard/amd/padmelon/bootblock/bootblock.c M src/mainboard/amd/padmelon/devicetree.cb M src/mainboard/amd/padmelon/dsdt.asl M src/mainboard/amd/padmelon/fan_init.c M src/mainboard/amd/padmelon/gpio.c M src/mainboard/amd/padmelon/gpio.h M src/mainboard/amd/padmelon/hda_verb.c M src/mainboard/amd/padmelon/mainboard.c M src/mainboard/amd/parmer/BiosCallOuts.c M src/mainboard/amd/parmer/Kconfig M src/mainboard/amd/parmer/Makefile.inc M src/mainboard/amd/parmer/OemCustomize.c M src/mainboard/amd/parmer/OptionsIds.h M src/mainboard/amd/parmer/acpi/gpe.asl M src/mainboard/amd/parmer/acpi/mainboard.asl M src/mainboard/amd/parmer/acpi/routing.asl M src/mainboard/amd/parmer/acpi/si.asl M src/mainboard/amd/parmer/acpi/sleep.asl M src/mainboard/amd/parmer/acpi/usb_oc.asl M src/mainboard/amd/parmer/acpi_tables.c M src/mainboard/amd/parmer/bootblock.c M src/mainboard/amd/parmer/buildOpts.c M src/mainboard/amd/parmer/cmos.layout M src/mainboard/amd/parmer/devicetree.cb M src/mainboard/amd/parmer/dsdt.asl M src/mainboard/amd/parmer/irq_tables.c M src/mainboard/amd/parmer/mainboard.c M src/mainboard/amd/parmer/mptable.c M src/mainboard/amd/persimmon/BiosCallOuts.c M src/mainboard/amd/persimmon/Kconfig M src/mainboard/amd/persimmon/Makefile.inc M src/mainboard/amd/persimmon/OemCustomize.c M src/mainboard/amd/persimmon/OptionsIds.h M src/mainboard/amd/persimmon/acpi/gpe.asl M src/mainboard/amd/persimmon/acpi/ide.asl M src/mainboard/amd/persimmon/acpi/mainboard.asl M src/mainboard/amd/persimmon/acpi/routing.asl M src/mainboard/amd/persimmon/acpi/sata.asl M src/mainboard/amd/persimmon/acpi/sleep.asl M src/mainboard/amd/persimmon/acpi/usb_oc.asl M src/mainboard/amd/persimmon/acpi_tables.c M src/mainboard/amd/persimmon/bootblock.c M src/mainboard/amd/persimmon/buildOpts.c M src/mainboard/amd/persimmon/cmos.layout M src/mainboard/amd/persimmon/devicetree.cb M src/mainboard/amd/persimmon/dsdt.asl M src/mainboard/amd/persimmon/irq_tables.c M src/mainboard/amd/persimmon/mainboard.c M src/mainboard/amd/persimmon/mptable.c M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/BiosCallOuts.c M src/mainboard/amd/south_station/Kconfig M src/mainboard/amd/south_station/Makefile.inc M src/mainboard/amd/south_station/OemCustomize.c M src/mainboard/amd/south_station/OptionsIds.h M src/mainboard/amd/south_station/acpi/gpe.asl M src/mainboard/amd/south_station/acpi/ide.asl M src/mainboard/amd/south_station/acpi/mainboard.asl M src/mainboard/amd/south_station/acpi/routing.asl M src/mainboard/amd/south_station/acpi/sata.asl M src/mainboard/amd/south_station/acpi/sleep.asl M src/mainboard/amd/south_station/acpi/usb_oc.asl M src/mainboard/amd/south_station/acpi_tables.c M src/mainboard/amd/south_station/bootblock.c M src/mainboard/amd/south_station/buildOpts.c M src/mainboard/amd/south_station/cmos.layout M src/mainboard/amd/south_station/devicetree.cb M src/mainboard/amd/south_station/dsdt.asl M src/mainboard/amd/south_station/irq_tables.c M src/mainboard/amd/south_station/mainboard.c M src/mainboard/amd/south_station/mptable.c M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/thatcher/BiosCallOuts.c M src/mainboard/amd/thatcher/Kconfig M src/mainboard/amd/thatcher/Makefile.inc M src/mainboard/amd/thatcher/OemCustomize.c M src/mainboard/amd/thatcher/OptionsIds.h M src/mainboard/amd/thatcher/acpi/cpstate.asl M src/mainboard/amd/thatcher/acpi/gpe.asl M src/mainboard/amd/thatcher/acpi/mainboard.asl M src/mainboard/amd/thatcher/acpi/routing.asl M src/mainboard/amd/thatcher/acpi/si.asl M src/mainboard/amd/thatcher/acpi/sleep.asl M src/mainboard/amd/thatcher/acpi/usb_oc.asl M src/mainboard/amd/thatcher/acpi_tables.c M src/mainboard/amd/thatcher/buildOpts.c M src/mainboard/amd/thatcher/cmos.layout M src/mainboard/amd/thatcher/devicetree.cb M src/mainboard/amd/thatcher/dsdt.asl M src/mainboard/amd/thatcher/irq_tables.c M src/mainboard/amd/thatcher/mainboard.c M src/mainboard/amd/thatcher/mptable.c M src/mainboard/amd/union_station/BiosCallOuts.c M src/mainboard/amd/union_station/Kconfig M src/mainboard/amd/union_station/Makefile.inc M src/mainboard/amd/union_station/OemCustomize.c M src/mainboard/amd/union_station/OptionsIds.h M src/mainboard/amd/union_station/acpi/gpe.asl M src/mainboard/amd/union_station/acpi/ide.asl M src/mainboard/amd/union_station/acpi/mainboard.asl M src/mainboard/amd/union_station/acpi/routing.asl M src/mainboard/amd/union_station/acpi/sata.asl M src/mainboard/amd/union_station/acpi/sleep.asl M src/mainboard/amd/union_station/acpi/usb_oc.asl M src/mainboard/amd/union_station/acpi_tables.c M src/mainboard/amd/union_station/bootblock.c M src/mainboard/amd/union_station/buildOpts.c M src/mainboard/amd/union_station/cmos.layout M src/mainboard/amd/union_station/devicetree.cb M src/mainboard/amd/union_station/dsdt.asl M src/mainboard/amd/union_station/irq_tables.c M src/mainboard/amd/union_station/mainboard.c M src/mainboard/amd/union_station/mptable.c M src/mainboard/amd/union_station/platform_cfg.h M src/mainboard/aopen/dxplplusu/acpi/e7505_pri.asl M src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl M src/mainboard/aopen/dxplplusu/acpi/i82801db.asl M src/mainboard/aopen/dxplplusu/acpi/p64h2.asl M src/mainboard/aopen/dxplplusu/acpi/power.asl M src/mainboard/aopen/dxplplusu/acpi/scsi.asl M src/mainboard/aopen/dxplplusu/acpi/superio.asl M src/mainboard/aopen/dxplplusu/acpi_tables.c M src/mainboard/aopen/dxplplusu/bootblock.c M src/mainboard/aopen/dxplplusu/devicetree.cb M src/mainboard/aopen/dxplplusu/dsdt.asl M src/mainboard/aopen/dxplplusu/fadt.c M src/mainboard/apple/macbook21/acpi/ich7_pci_irqs.asl M src/mainboard/apple/macbook21/acpi/platform.asl M src/mainboard/apple/macbook21/acpi_tables.c M src/mainboard/apple/macbook21/cmos.layout M src/mainboard/apple/macbook21/devicetree.cb M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/apple/macbook21/early_init.c M src/mainboard/apple/macbook21/gpio.c M src/mainboard/apple/macbook21/hda_verb.c M src/mainboard/apple/macbook21/mainboard.c M src/mainboard/apple/macbook21/mptable.c M src/mainboard/apple/macbook21/smihandler.c M src/mainboard/asrock/Kconfig M src/mainboard/asrock/b75pro3-m/Kconfig M src/mainboard/asrock/b75pro3-m/Makefile.inc M src/mainboard/asrock/b75pro3-m/acpi/pci.asl M src/mainboard/asrock/b75pro3-m/acpi/platform.asl M src/mainboard/asrock/b75pro3-m/acpi/superio.asl M src/mainboard/asrock/b75pro3-m/acpi_tables.c M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asrock/b75pro3-m/dsdt.asl M src/mainboard/asrock/b75pro3-m/early_init.c M src/mainboard/asrock/b75pro3-m/gpio.c M src/mainboard/asrock/b75pro3-m/hda_verb.c M src/mainboard/asrock/b75pro3-m/mainboard.c M src/mainboard/asrock/e350m1/BiosCallOuts.c M src/mainboard/asrock/e350m1/Kconfig M src/mainboard/asrock/e350m1/Makefile.inc M src/mainboard/asrock/e350m1/OemCustomize.c M src/mainboard/asrock/e350m1/OptionsIds.h M src/mainboard/asrock/e350m1/acpi/gpe.asl M src/mainboard/asrock/e350m1/acpi/mainboard.asl M src/mainboard/asrock/e350m1/acpi/routing.asl M src/mainboard/asrock/e350m1/acpi/sata.asl M src/mainboard/asrock/e350m1/acpi/sleep.asl M src/mainboard/asrock/e350m1/acpi/usb_oc.asl M src/mainboard/asrock/e350m1/acpi_tables.c M src/mainboard/asrock/e350m1/bootblock.c M src/mainboard/asrock/e350m1/buildOpts.c M src/mainboard/asrock/e350m1/cmos.layout M src/mainboard/asrock/e350m1/devicetree.cb M src/mainboard/asrock/e350m1/dsdt.asl M src/mainboard/asrock/e350m1/irq_tables.c M src/mainboard/asrock/e350m1/mainboard.c M src/mainboard/asrock/e350m1/mptable.c M src/mainboard/asrock/e350m1/platform_cfg.h M src/mainboard/asrock/g41c-gs/Kconfig M src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl M src/mainboard/asrock/g41c-gs/acpi_tables.c M src/mainboard/asrock/g41c-gs/cmos.layout M src/mainboard/asrock/g41c-gs/cstates.c M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asrock/g41c-gs/early_init.c M src/mainboard/asrock/g41c-gs/hda_verb.c M src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/gpio.c M src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs/gpio.c M src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-gs/gpio.c M src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-s3/gpio.c M src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c M src/mainboard/asrock/h110m/Makefile.inc M src/mainboard/asrock/h110m/acpi/dptf.asl M src/mainboard/asrock/h110m/bootblock.c M src/mainboard/asrock/h110m/cmos.layout M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/asrock/h110m/dsdt.asl M src/mainboard/asrock/h110m/gma-mainboard.ads M src/mainboard/asrock/h110m/hda_verb.c M src/mainboard/asrock/h110m/include/gpio.h M src/mainboard/asrock/h110m/mainboard.c M src/mainboard/asrock/h110m/ramstage.c M src/mainboard/asrock/h110m/romstage.c M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/asrock/h81m-hds/Makefile.inc M src/mainboard/asrock/h81m-hds/acpi/platform.asl M src/mainboard/asrock/h81m-hds/acpi/superio.asl M src/mainboard/asrock/h81m-hds/acpi_tables.c M src/mainboard/asrock/h81m-hds/bootblock.c M src/mainboard/asrock/h81m-hds/cmos.layout M src/mainboard/asrock/h81m-hds/devicetree.cb M src/mainboard/asrock/h81m-hds/dsdt.asl M src/mainboard/asrock/h81m-hds/gma-mainboard.ads M src/mainboard/asrock/h81m-hds/gpio.c M src/mainboard/asrock/h81m-hds/hda_verb.c M src/mainboard/asrock/h81m-hds/mainboard.c M src/mainboard/asrock/h81m-hds/romstage.c M src/mainboard/asrock/imb-a180/BiosCallOuts.c M src/mainboard/asrock/imb-a180/Kconfig M src/mainboard/asrock/imb-a180/Makefile.inc M src/mainboard/asrock/imb-a180/OemCustomize.c M src/mainboard/asrock/imb-a180/OptionsIds.h M src/mainboard/asrock/imb-a180/acpi/gpe.asl M src/mainboard/asrock/imb-a180/acpi/ide.asl M src/mainboard/asrock/imb-a180/acpi/mainboard.asl M src/mainboard/asrock/imb-a180/acpi/routing.asl M src/mainboard/asrock/imb-a180/acpi/sata.asl M src/mainboard/asrock/imb-a180/acpi/si.asl M src/mainboard/asrock/imb-a180/acpi/sleep.asl M src/mainboard/asrock/imb-a180/acpi/usb_oc.asl M src/mainboard/asrock/imb-a180/acpi_tables.c M src/mainboard/asrock/imb-a180/buildOpts.c M src/mainboard/asrock/imb-a180/cmos.layout M src/mainboard/asrock/imb-a180/devicetree.cb M src/mainboard/asrock/imb-a180/dsdt.asl M src/mainboard/asrock/imb-a180/irq_tables.c M src/mainboard/asrock/imb-a180/mainboard.c M src/mainboard/asrock/imb-a180/mptable.c M src/mainboard/asus/Kconfig M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/am1i-a/Makefile.inc M src/mainboard/asus/am1i-a/OemCustomize.c M src/mainboard/asus/am1i-a/OptionsIds.h M src/mainboard/asus/am1i-a/acpi/mainboard.asl M src/mainboard/asus/am1i-a/acpi/routing.asl M src/mainboard/asus/am1i-a/acpi/sata.asl M src/mainboard/asus/am1i-a/acpi/si.asl M src/mainboard/asus/am1i-a/acpi/sleep.asl M src/mainboard/asus/am1i-a/acpi/superio.asl M src/mainboard/asus/am1i-a/acpi_tables.c M src/mainboard/asus/am1i-a/buildOpts.c M src/mainboard/asus/am1i-a/cmos.layout M src/mainboard/asus/am1i-a/devicetree.cb M src/mainboard/asus/am1i-a/dsdt.asl M src/mainboard/asus/am1i-a/irq_tables.c M src/mainboard/asus/am1i-a/mainboard.c M src/mainboard/asus/am1i-a/mptable.c M src/mainboard/asus/f2a85-m/BiosCallOuts.c M src/mainboard/asus/f2a85-m/Kconfig M src/mainboard/asus/f2a85-m/Makefile.inc M src/mainboard/asus/f2a85-m/OemCustomize.c M src/mainboard/asus/f2a85-m/OptionsIds.h M src/mainboard/asus/f2a85-m/acpi/cpstate.asl M src/mainboard/asus/f2a85-m/acpi/gpe.asl M src/mainboard/asus/f2a85-m/acpi/mainboard.asl M src/mainboard/asus/f2a85-m/acpi/routing.asl M src/mainboard/asus/f2a85-m/acpi/si.asl M src/mainboard/asus/f2a85-m/acpi/sleep.asl M src/mainboard/asus/f2a85-m/acpi/usb_oc.asl M src/mainboard/asus/f2a85-m/acpi_tables.c M src/mainboard/asus/f2a85-m/bootblock.c M src/mainboard/asus/f2a85-m/buildOpts.c M src/mainboard/asus/f2a85-m/cmos.layout M src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb M src/mainboard/asus/f2a85-m/dsdt.asl M src/mainboard/asus/f2a85-m/irq_tables.c M src/mainboard/asus/f2a85-m/mainboard.c M src/mainboard/asus/f2a85-m/mptable.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/h61m-cs/acpi/platform.asl M src/mainboard/asus/h61m-cs/acpi_tables.c M src/mainboard/asus/h61m-cs/cmos.layout M src/mainboard/asus/h61m-cs/devicetree.cb M src/mainboard/asus/h61m-cs/dsdt.asl M src/mainboard/asus/h61m-cs/early_init.c M src/mainboard/asus/h61m-cs/gma-mainboard.ads M src/mainboard/asus/h61m-cs/gpio.c M src/mainboard/asus/h61m-cs/hda_verb.c M src/mainboard/asus/h61m-cs/mainboard.c M src/mainboard/asus/maximus_iv_gene-z/Kconfig M src/mainboard/asus/maximus_iv_gene-z/Makefile.inc M src/mainboard/asus/maximus_iv_gene-z/acpi/platform.asl M src/mainboard/asus/maximus_iv_gene-z/acpi/superio.asl M src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c M src/mainboard/asus/maximus_iv_gene-z/cmos.layout M src/mainboard/asus/maximus_iv_gene-z/devicetree.cb M src/mainboard/asus/maximus_iv_gene-z/dsdt.asl M src/mainboard/asus/maximus_iv_gene-z/early_init.c M src/mainboard/asus/maximus_iv_gene-z/gma-mainboard.ads M src/mainboard/asus/maximus_iv_gene-z/gpio.c M src/mainboard/asus/maximus_iv_gene-z/hda_verb.c M src/mainboard/asus/maximus_iv_gene-z/mainboard.c M src/mainboard/asus/p2b-d/Kconfig M src/mainboard/asus/p2b-d/irq_tables.c M src/mainboard/asus/p2b-d/mptable.c M src/mainboard/asus/p2b-d/romstage.c M src/mainboard/asus/p2b-ds/Kconfig M src/mainboard/asus/p2b-ds/irq_tables.c M src/mainboard/asus/p2b-ds/mptable.c M src/mainboard/asus/p2b-ds/romstage.c M src/mainboard/asus/p2b-f/Kconfig M src/mainboard/asus/p2b-f/irq_tables.c M src/mainboard/asus/p2b-f/romstage.c M src/mainboard/asus/p2b-ls/Kconfig M src/mainboard/asus/p2b-ls/acpi_tables.c M src/mainboard/asus/p2b-ls/dsdt.asl M src/mainboard/asus/p2b-ls/irq_tables.c M src/mainboard/asus/p2b-ls/romstage.c M src/mainboard/asus/p2b/Kconfig M src/mainboard/asus/p2b/acpi_tables.c M src/mainboard/asus/p2b/dsdt.asl M src/mainboard/asus/p2b/irq_tables.c M src/mainboard/asus/p2b/romstage.c M src/mainboard/asus/p3b-f/Kconfig M src/mainboard/asus/p3b-f/irq_tables.c M src/mainboard/asus/p3b-f/romstage.c M src/mainboard/asus/p5gc-mx/Kconfig M src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl M src/mainboard/asus/p5gc-mx/acpi/mainboard.asl M src/mainboard/asus/p5gc-mx/acpi_tables.c M src/mainboard/asus/p5gc-mx/cmos.layout M src/mainboard/asus/p5gc-mx/devicetree.cb M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5gc-mx/early_init.c M src/mainboard/asus/p5gc-mx/gpio.c M src/mainboard/asus/p5gc-mx/hda_verb.c M src/mainboard/asus/p5qc/Kconfig M src/mainboard/asus/p5qc/acpi/ich10_pci_irqs.asl M src/mainboard/asus/p5qc/acpi_tables.c M src/mainboard/asus/p5qc/cmos.layout M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p5qc/early_init.c M src/mainboard/asus/p5qc/gpio.c M src/mainboard/asus/p5qc/hda_verb.c M src/mainboard/asus/p5qc/variants/p5q/devicetree.cb M src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb M src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb M src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb M src/mainboard/asus/p5qc/variants/p5ql_pro/gpio.c M src/mainboard/asus/p5qpl-am/Kconfig M src/mainboard/asus/p5qpl-am/acpi/ich7_pci_irqs.asl M src/mainboard/asus/p5qpl-am/acpi_tables.c M src/mainboard/asus/p5qpl-am/cmos.layout M src/mainboard/asus/p5qpl-am/cstates.c M src/mainboard/asus/p5qpl-am/devicetree.cb M src/mainboard/asus/p5qpl-am/dsdt.asl M src/mainboard/asus/p5qpl-am/early_init.c M src/mainboard/asus/p5qpl-am/hda_verb.c M src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/gpio.c M src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb M src/mainboard/asus/p5qpl-am/variants/p5qpl-am/gpio.c M src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb M src/mainboard/asus/p8h61-m_lx/Kconfig M src/mainboard/asus/p8h61-m_lx/Makefile.inc M src/mainboard/asus/p8h61-m_lx/acpi/platform.asl M src/mainboard/asus/p8h61-m_lx/acpi/superio.asl M src/mainboard/asus/p8h61-m_lx/acpi_tables.c M src/mainboard/asus/p8h61-m_lx/cmos.layout M src/mainboard/asus/p8h61-m_lx/devicetree.cb M src/mainboard/asus/p8h61-m_lx/dsdt.asl M src/mainboard/asus/p8h61-m_lx/early_init.c M src/mainboard/asus/p8h61-m_lx/gma-mainboard.ads M src/mainboard/asus/p8h61-m_lx/gpio.c M src/mainboard/asus/p8h61-m_lx/hda_verb.c M src/mainboard/asus/p8h61-m_lx/mainboard.c M src/mainboard/asus/p8h61-m_pro/Kconfig M src/mainboard/asus/p8h61-m_pro/acpi/platform.asl M src/mainboard/asus/p8h61-m_pro/acpi/superio.asl M src/mainboard/asus/p8h61-m_pro/acpi_tables.c M src/mainboard/asus/p8h61-m_pro/cmos.layout M src/mainboard/asus/p8h61-m_pro/devicetree.cb M src/mainboard/asus/p8h61-m_pro/dsdt.asl M src/mainboard/asus/p8h61-m_pro/early_init.c M src/mainboard/asus/p8h61-m_pro/gma-mainboard.ads M src/mainboard/asus/p8h61-m_pro/gpio.c M src/mainboard/asus/p8h61-m_pro/hda_verb.c M src/mainboard/asus/p8z77-m_pro/Kconfig M src/mainboard/asus/p8z77-m_pro/Kconfig.name M src/mainboard/asus/p8z77-m_pro/Makefile.inc M src/mainboard/asus/p8z77-m_pro/acpi/platform.asl M src/mainboard/asus/p8z77-m_pro/acpi/superio.asl M src/mainboard/asus/p8z77-m_pro/acpi_tables.c M src/mainboard/asus/p8z77-m_pro/cmos.default M src/mainboard/asus/p8z77-m_pro/cmos.layout M src/mainboard/asus/p8z77-m_pro/devicetree.cb M src/mainboard/asus/p8z77-m_pro/dsdt.asl M src/mainboard/asus/p8z77-m_pro/early_init.c M src/mainboard/asus/p8z77-m_pro/gma-mainboard.ads M src/mainboard/asus/p8z77-m_pro/gpio.c M src/mainboard/asus/p8z77-m_pro/hda_verb.c M src/mainboard/asus/p8z77-m_pro/mainboard.c M src/mainboard/asus/p8z77-v_lx2/Kconfig M src/mainboard/asus/p8z77-v_lx2/devicetree.cb M src/mainboard/asus/p8z77-v_lx2/dsdt.asl M src/mainboard/bap/Kconfig M src/mainboard/bap/ode_e20XX/BAP_Q7_1066.spd.hex M src/mainboard/bap/ode_e20XX/BAP_Q7_800.spd.hex M src/mainboard/bap/ode_e20XX/BiosCallOuts.c M src/mainboard/bap/ode_e20XX/Kconfig M src/mainboard/bap/ode_e20XX/Makefile.inc M src/mainboard/bap/ode_e20XX/OemCustomize.c M src/mainboard/bap/ode_e20XX/OptionsIds.h M src/mainboard/bap/ode_e20XX/acpi/gpe.asl M src/mainboard/bap/ode_e20XX/acpi/ide.asl M src/mainboard/bap/ode_e20XX/acpi/mainboard.asl M src/mainboard/bap/ode_e20XX/acpi/routing.asl M src/mainboard/bap/ode_e20XX/acpi/si.asl M src/mainboard/bap/ode_e20XX/acpi/sleep.asl M src/mainboard/bap/ode_e20XX/acpi/superio.asl M src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl M src/mainboard/bap/ode_e20XX/acpi_tables.c M src/mainboard/bap/ode_e20XX/buildOpts.c M src/mainboard/bap/ode_e20XX/cmos.layout M src/mainboard/bap/ode_e20XX/devicetree.cb M src/mainboard/bap/ode_e20XX/dsdt.asl M src/mainboard/bap/ode_e20XX/irq_tables.c M src/mainboard/bap/ode_e20XX/mainboard.c M src/mainboard/bap/ode_e20XX/mptable.c M src/mainboard/bap/ode_e21XX/BAP_Q7_1066.spd.hex M src/mainboard/bap/ode_e21XX/BAP_Q7_1333.spd.hex M src/mainboard/bap/ode_e21XX/BAP_Q7_800.spd.hex M src/mainboard/bap/ode_e21XX/BiosCallOuts.c M src/mainboard/bap/ode_e21XX/Kconfig M src/mainboard/bap/ode_e21XX/Makefile.inc M src/mainboard/bap/ode_e21XX/OemCustomize.c M src/mainboard/bap/ode_e21XX/acpi/gpe.asl M src/mainboard/bap/ode_e21XX/acpi/mainboard.asl M src/mainboard/bap/ode_e21XX/acpi/routing.asl M src/mainboard/bap/ode_e21XX/acpi/si.asl M src/mainboard/bap/ode_e21XX/acpi/sleep.asl M src/mainboard/bap/ode_e21XX/acpi/superio.asl M src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl M src/mainboard/bap/ode_e21XX/acpi_tables.c M src/mainboard/bap/ode_e21XX/cmos.layout M src/mainboard/bap/ode_e21XX/devicetree.cb M src/mainboard/bap/ode_e21XX/dsdt.asl M src/mainboard/bap/ode_e21XX/irq_tables.c M src/mainboard/bap/ode_e21XX/mainboard.c M src/mainboard/bap/ode_e21XX/mptable.c M src/mainboard/bap/ode_e21XX/romstage.c M src/mainboard/biostar/Kconfig M src/mainboard/biostar/a68n_5200/BiosCallOuts.c M src/mainboard/biostar/a68n_5200/Kconfig M src/mainboard/biostar/a68n_5200/Makefile.inc M src/mainboard/biostar/a68n_5200/OemCustomize.c M src/mainboard/biostar/a68n_5200/OptionsIds.h M src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl M src/mainboard/biostar/a68n_5200/acpi/gpe.asl M src/mainboard/biostar/a68n_5200/acpi/ide.asl M src/mainboard/biostar/a68n_5200/acpi/mainboard.asl M src/mainboard/biostar/a68n_5200/acpi/routing.asl M src/mainboard/biostar/a68n_5200/acpi/sata.asl M src/mainboard/biostar/a68n_5200/acpi/si.asl M src/mainboard/biostar/a68n_5200/acpi/sleep.asl M src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl M src/mainboard/biostar/a68n_5200/acpi_tables.c M src/mainboard/biostar/a68n_5200/bootblock.c M src/mainboard/biostar/a68n_5200/buildOpts.c M src/mainboard/biostar/a68n_5200/cmos.layout M src/mainboard/biostar/a68n_5200/devicetree.cb M src/mainboard/biostar/a68n_5200/dsdt.asl M src/mainboard/biostar/a68n_5200/irq_tables.c M src/mainboard/biostar/a68n_5200/mainboard.c M src/mainboard/biostar/a68n_5200/mptable.c M src/mainboard/biostar/am1ml/BiosCallOuts.c M src/mainboard/biostar/am1ml/Kconfig M src/mainboard/biostar/am1ml/Makefile.inc M src/mainboard/biostar/am1ml/OemCustomize.c M src/mainboard/biostar/am1ml/OptionsIds.h M src/mainboard/biostar/am1ml/acpi/flag0.asl M src/mainboard/biostar/am1ml/acpi/gpe.asl M src/mainboard/biostar/am1ml/acpi/ide.asl M src/mainboard/biostar/am1ml/acpi/mainboard.asl M src/mainboard/biostar/am1ml/acpi/routing.asl M src/mainboard/biostar/am1ml/acpi/sata.asl M src/mainboard/biostar/am1ml/acpi/si.asl M src/mainboard/biostar/am1ml/acpi/sio.asl M src/mainboard/biostar/am1ml/acpi/sleep.asl M src/mainboard/biostar/am1ml/acpi/superio.asl M src/mainboard/biostar/am1ml/acpi/usb_oc.asl M src/mainboard/biostar/am1ml/acpi_tables.c M src/mainboard/biostar/am1ml/buildOpts.c M src/mainboard/biostar/am1ml/cmos.layout M src/mainboard/biostar/am1ml/devicetree.cb M src/mainboard/biostar/am1ml/dsdt.asl M src/mainboard/biostar/am1ml/irq_tables.c M src/mainboard/biostar/am1ml/mainboard.c M src/mainboard/biostar/am1ml/mptable.c M src/mainboard/cavium/Kconfig M src/mainboard/cavium/cn8100_sff_evb/Kconfig M src/mainboard/cavium/cn8100_sff_evb/Makefile.inc M src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c M src/mainboard/cavium/cn8100_sff_evb/bootblock.c M src/mainboard/cavium/cn8100_sff_evb/devicetree.cb M src/mainboard/cavium/cn8100_sff_evb/mainboard.c M src/mainboard/cavium/cn8100_sff_evb/romstage.c M src/mainboard/compulab/intense_pc/acpi/ec.asl M src/mainboard/compulab/intense_pc/acpi/platform.asl M src/mainboard/compulab/intense_pc/acpi/superio.asl M src/mainboard/compulab/intense_pc/acpi_tables.c M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/compulab/intense_pc/dsdt.asl M src/mainboard/compulab/intense_pc/early_init.c M src/mainboard/compulab/intense_pc/gpio.c M src/mainboard/compulab/intense_pc/hda_verb.c M src/mainboard/compulab/intense_pc/mainboard.c M src/mainboard/elmex/pcm205400/BiosCallOuts.c M src/mainboard/elmex/pcm205400/Kconfig M src/mainboard/elmex/pcm205400/Makefile.inc M src/mainboard/elmex/pcm205400/OemCustomize.c M src/mainboard/elmex/pcm205400/OptionsIds.h M src/mainboard/elmex/pcm205400/acpi/gpe.asl M src/mainboard/elmex/pcm205400/acpi/ide.asl M src/mainboard/elmex/pcm205400/acpi/mainboard.asl M src/mainboard/elmex/pcm205400/acpi/routing.asl M src/mainboard/elmex/pcm205400/acpi/sata.asl M src/mainboard/elmex/pcm205400/acpi/sleep.asl M src/mainboard/elmex/pcm205400/acpi/usb_oc.asl M src/mainboard/elmex/pcm205400/acpi_tables.c M src/mainboard/elmex/pcm205400/bootblock.c M src/mainboard/elmex/pcm205400/buildOpts.c M src/mainboard/elmex/pcm205400/cmos.layout M src/mainboard/elmex/pcm205400/devicetree.cb M src/mainboard/elmex/pcm205400/dsdt.asl M src/mainboard/elmex/pcm205400/irq_tables.c M src/mainboard/elmex/pcm205400/mainboard.c M src/mainboard/elmex/pcm205400/mptable.c M src/mainboard/elmex/pcm205400/platform_cfg.h M src/mainboard/elmex/pcm205401/Kconfig M src/mainboard/emulation/qemu-aarch64/Kconfig M src/mainboard/emulation/qemu-aarch64/Makefile.inc M src/mainboard/emulation/qemu-aarch64/bootblock_custom.S M src/mainboard/emulation/qemu-aarch64/cbmem.c M src/mainboard/emulation/qemu-aarch64/devicetree.cb M src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h M src/mainboard/emulation/qemu-aarch64/mainboard.c M src/mainboard/emulation/qemu-aarch64/media.c M src/mainboard/emulation/qemu-aarch64/memlayout.ld M src/mainboard/emulation/qemu-aarch64/mmio.c M src/mainboard/emulation/qemu-armv7/Kconfig M src/mainboard/emulation/qemu-armv7/Makefile.inc M src/mainboard/emulation/qemu-armv7/devicetree.cb M src/mainboard/emulation/qemu-armv7/mainboard.c M src/mainboard/emulation/qemu-armv7/media.c M src/mainboard/emulation/qemu-armv7/memlayout.ld M src/mainboard/emulation/qemu-armv7/romstage.c M src/mainboard/emulation/qemu-armv7/timer.c M src/mainboard/emulation/qemu-i440fx/acpi_tables.c M src/mainboard/emulation/qemu-i440fx/mainboard.c M src/mainboard/emulation/qemu-i440fx/memmap.c M src/mainboard/emulation/qemu-i440fx/memory.h M src/mainboard/emulation/qemu-i440fx/romstage.c M src/mainboard/emulation/qemu-power8/Kconfig M src/mainboard/emulation/qemu-power8/Makefile.inc M src/mainboard/emulation/qemu-power8/bootblock.c M src/mainboard/emulation/qemu-power8/cbmem.c M src/mainboard/emulation/qemu-power8/devicetree.cb M src/mainboard/emulation/qemu-power8/mainboard.c M src/mainboard/emulation/qemu-power8/memlayout.ld M src/mainboard/emulation/qemu-power8/romstage.c M src/mainboard/emulation/qemu-power8/uart.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/emulation/qemu-q35/mainboard.c M src/mainboard/emulation/qemu-q35/romstage.c M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/Makefile.inc M src/mainboard/emulation/qemu-riscv/clint.c M src/mainboard/emulation/qemu-riscv/devicetree.cb M src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h M src/mainboard/emulation/qemu-riscv/mainboard.c M src/mainboard/emulation/qemu-riscv/memlayout.ld M src/mainboard/emulation/qemu-riscv/rom_media.c M src/mainboard/emulation/qemu-riscv/romstage.c M src/mainboard/emulation/qemu-riscv/uart.c M src/mainboard/emulation/spike-riscv/Kconfig M src/mainboard/emulation/spike-riscv/Makefile.inc M src/mainboard/emulation/spike-riscv/clint.c M src/mainboard/emulation/spike-riscv/devicetree.cb M src/mainboard/emulation/spike-riscv/mainboard.c M src/mainboard/emulation/spike-riscv/memlayout.ld M src/mainboard/emulation/spike-riscv/rom_media.c M src/mainboard/emulation/spike-riscv/romstage.c M src/mainboard/emulation/spike-riscv/uart.c M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/facebook/fbg1701/Makefile.inc M src/mainboard/facebook/fbg1701/acpi/mainboard.asl M src/mainboard/facebook/fbg1701/acpi/superio.asl M src/mainboard/facebook/fbg1701/acpi_tables.c M src/mainboard/facebook/fbg1701/board_mboot.h M src/mainboard/facebook/fbg1701/board_verified_boot.c M src/mainboard/facebook/fbg1701/board_verified_boot.h M src/mainboard/facebook/fbg1701/cmos.layout M src/mainboard/facebook/fbg1701/com_init.c M src/mainboard/facebook/fbg1701/cpld.c M src/mainboard/facebook/fbg1701/cpld.h M src/mainboard/facebook/fbg1701/dsdt.asl M src/mainboard/facebook/fbg1701/fadt.c M src/mainboard/facebook/fbg1701/gpio.c M src/mainboard/facebook/fbg1701/hda_verb.c M src/mainboard/facebook/fbg1701/irqroute.c M src/mainboard/facebook/fbg1701/irqroute.h M src/mainboard/facebook/fbg1701/mainboard.c M src/mainboard/facebook/fbg1701/manifest.h M src/mainboard/facebook/fbg1701/ramstage.c M src/mainboard/facebook/fbg1701/romstage.c M src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex M src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex M src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex M src/mainboard/facebook/fbg1701/w25q64.c M src/mainboard/facebook/monolith/Makefile.inc M src/mainboard/facebook/monolith/acpi/dptf.asl M src/mainboard/facebook/monolith/acpi/ec.asl M src/mainboard/facebook/monolith/acpi/mainboard.asl M src/mainboard/facebook/monolith/acpi/superio.asl M src/mainboard/facebook/monolith/cmos.layout M src/mainboard/facebook/monolith/com_init.c M src/mainboard/facebook/monolith/dsdt.asl M src/mainboard/facebook/monolith/gpio.h M src/mainboard/facebook/monolith/mainboard.c M src/mainboard/facebook/monolith/onboard.h M src/mainboard/facebook/monolith/ramstage.c M src/mainboard/facebook/monolith/romstage.c M src/mainboard/facebook/monolith/spd/Makefile.inc M src/mainboard/facebook/monolith/spd/spd.h M src/mainboard/facebook/monolith/spd/spd_util.c M src/mainboard/foxconn/Kconfig M src/mainboard/foxconn/d41s/Kconfig M src/mainboard/foxconn/d41s/acpi/ich7_pci_irqs.asl M src/mainboard/foxconn/d41s/acpi/superio.asl M src/mainboard/foxconn/d41s/acpi_tables.c M src/mainboard/foxconn/d41s/cmos.layout M src/mainboard/foxconn/d41s/cstates.c M src/mainboard/foxconn/d41s/devicetree.cb M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/d41s/early_init.c M src/mainboard/foxconn/d41s/gpio.c M src/mainboard/foxconn/d41s/hda_verb.c M src/mainboard/foxconn/d41s/mainboard.c M src/mainboard/foxconn/g41s-k/Kconfig M src/mainboard/foxconn/g41s-k/acpi/superio.asl M src/mainboard/foxconn/g41s-k/acpi_tables.c M src/mainboard/foxconn/g41s-k/cmos.layout M src/mainboard/foxconn/g41s-k/cstates.c M src/mainboard/foxconn/g41s-k/devicetree.cb M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/foxconn/g41s-k/early_init.c M src/mainboard/foxconn/g41s-k/gpio.c M src/mainboard/foxconn/g41s-k/hda_verb.c M src/mainboard/foxconn/g41s-k/variants/g41m/acpi/ich7_pci_irqs.asl M src/mainboard/foxconn/g41s-k/variants/g41s-k/acpi/ich7_pci_irqs.asl 734 files changed, 0 insertions(+), 987 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/39606/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39606 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743 Gerrit-Change-Number: 39606 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/inteltool: add code for dumping IO registers
by Michael Niewöhner (Code Review) 18 Mar '20

18 Mar '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39524 ) Change subject: util/inteltool: add code for dumping IO registers ...................................................................... Patch Set 11: (1 comment) https://review.coreboot.org/c/coreboot/+/39524/10/util/inteltool/inteltool.c File util/inteltool/inteltool.c: https://review.coreboot.org/c/coreboot/+/39524/10/util/inteltool/inteltool.… PS10, Line 680: case 'a' > dump_io is not safe to be added inhere ? simply missed it, thx! -- To view, visit https://review.coreboot.org/c/coreboot/+/39524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I200e7a8fb85184fc954d6ae3cd71c6b5bdcb664a Gerrit-Change-Number: 39524 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 18 Mar 2020 09:12:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mb/intel/tglrvp: Use the MCON and MCOF methods for clock control
by Rizwan Qureshi (Code Review) 18 Mar '20

18 Mar '20

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39500 ) Change subject: src/mb/intel/tglrvp: Use the MCON and MCOF methods for clock control ...................................................................... src/mb/intel/tglrvp: Use the MCON and MCOF methods for clock control Use the MCON and MCOF methods for camera clock control BUG=None BRANCH=None TEST=Yet to test Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Change-Id: Ie136cd4497e2368c586640dc5afc5051f4483c50 --- M src/mainboard/intel/tglrvp/acpi/mipi_camera.asl 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/39500/1 diff --git a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl index c830ea1..5d42a29 100644 --- a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl +++ b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl @@ -177,7 +177,7 @@ If ((STA == Zero)) { /* Enable CLK0 with 19.2MHz */ - MCCT(0,1,1) + MCON(0,1) /* Pull PWREN(GPIO B23) high */ STXS(GPP_B23) Sleep(5) @@ -200,7 +200,7 @@ /* Pull PWREN low */ CTXS(GPP_B23) /* Disable CLK0 */ - MCCT(0,0,1) + MCOF(0) Store(0,STA) } } @@ -380,7 +380,7 @@ If ((STA == Zero)) { /* Enable CLK1 with 19.2MHz */ - MCCT(1,1,1) + MCON(1,1) /* Pull PWREN(GPIO R6) high */ STXS(GPP_R6) Sleep(5) @@ -403,7 +403,7 @@ /* Pull PWREN low */ CTXS(GPP_R6) /* Disable CLK1 */ - MCCT(1,0,1) + MCOF(1) Store(0,STA) } } -- To view, visit https://review.coreboot.org/c/coreboot/+/39500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie136cd4497e2368c586640dc5afc5051f4483c50 Gerrit-Change-Number: 39500 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: add support to read SPD data from SMBus
by Subrata Banik (Code Review) 18 Mar '20

18 Mar '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read SPD data from SMBus ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/8/src/soc/intel/tigerlake/me… File src/soc/intel/tigerlake/meminit_jsl.c: https://review.coreboot.org/c/coreboot/+/39401/8/src/soc/intel/tigerlake/me… PS8, Line 121: meminit_channels(mem_cfg, board_cfg, spd_data_ptr, half_populated); can't u just call meminit_dq_dqs_map(mem_cfg, board_cfg, half_populated); from first if case? in that way u might not need to fill 0 into MemorySpdPtrxx UPDs which is default 0 by FSP? -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 07:39:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: add support to read SPD data from SMBus
by Aamir Bohra (Code Review) 18 Mar '20

18 Mar '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read SPD data from SMBus ...................................................................... Patch Set 8: Code-Review+2 (2 comments) https://review.coreboot.org/c/coreboot/+/39401/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39401/8//COMMIT_MSG@9 PS8, Line 9: JSLRVP Jasper Lake RVP https://review.coreboot.org/c/coreboot/+/39401/8//COMMIT_MSG@12 PS8, Line 12: jslrvp Jasper Lake RVP -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 07:35:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: add support to read SPD data from SMBus
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read SPD data from SMBus ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… File src/soc/intel/tigerlake/meminit_jsl.c: https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… PS5, Line 118: meminit_channels > or call […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 06:40:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: add support to read SPD data from SMBus
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has uploaded a new patch set (#8) to the change originally created by Ronak Kanabar. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read SPD data from SMBus ...................................................................... soc/intel/tigerlake: add support to read SPD data from SMBus JSLRVP has DDR4 variant which uses SMBus address to read SPD data. So, add support to read SPD data from SMBUS. TEST=Check compilation for jslrvp and check memory training passes. Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/tigerlake/include/soc/meminit_jsl.h M src/soc/intel/tigerlake/meminit_jsl.c 2 files changed, 21 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/39401/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Franklin (Yanjin) He (Code Review) 17 Mar '20

17 Mar '20

Franklin (Yanjin) He has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/c/coreboot/+/39579/1/src/soc/intel/apollolake/c… File src/soc/intel/apollolake/chip.c: https://review.coreboot.org/c/coreboot/+/39579/1/src/soc/intel/apollolake/c… PS1, Line 637: silconfig->Gmm = dev ? dev->enabled : 0; > I disagree with Paul, this should be precisely the same as was done in commit 03ddd190fd6a2e91b16e6f […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 4 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 05:50:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Franklin (Yanjin) He <franklinh(a)google.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Furquan Shaikh (Code Review) 17 Mar '20

17 Mar '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 4 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 05:47:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Franklin (Yanjin) He (Code Review) 17 Mar '20

17 Mar '20

Franklin (Yanjin) He has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/c/coreboot/+/39579/3/src/soc/intel/apollolake/i… File src/soc/intel/apollolake/include/soc/pci_devs.h: https://review.coreboot.org/c/coreboot/+/39579/3/src/soc/intel/apollolake/i… PS3, Line 49: #define SA_DEV_SLOT_GMM 0x08 > Done Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 4 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 18 Mar 2020 04:08:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Franklin (Yanjin) He <franklinh(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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