Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39520 )
Change subject: util/inteltool: add code for dumping GSPI registers
......................................................................
Patch Set 14: Code-Review+2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39519 )
Change subject: util/inteltool: add code for dumping SMBus registers
......................................................................
Patch Set 14: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/39519/14/util/inteltool/smbus.c
File util/inteltool/smbus.c:
https://review.coreboot.org/c/coreboot/+/39519/14/util/inteltool/smbus.c@125
PS14, Line 125: smbus
SMBus?
https://review.coreboot.org/c/coreboot/+/39519/14/util/inteltool/smbus.c@132
PS14, Line 132:
is it intended that here are less spaces than in the same print statements below?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39518 )
Change subject: util/inteltool: add code to dump I2C registers
......................................................................
Patch Set 12:
(1 comment)
The code assumes PCI devices anyway, so why not make the `switch` on
their DID instead of the PCH's? Or maybe `libpci` can even filter the
devices, idk.
https://review.coreboot.org/c/coreboot/+/39518/12/util/inteltool/i2c.c
File util/inteltool/i2c.c:
https://review.coreboot.org/c/coreboot/+/39518/12/util/inteltool/i2c.c@210
PS12, Line 210: if (i2c)
The block above already presumes that `i2c` is set. Generally, the if/for
depth goes way too far here. Adding some functions might help, e.g. one
to print the MMIO regs, one that prints the PCI config (and calls the
former). That would allow us to stay flexible enough in case somebody
wants to add support for hidden (ACPI mode) controllers.
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39518 )
Change subject: util/inteltool: add code to dump I2C registers
......................................................................
Patch Set 12: Code-Review+2
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39565 )
Change subject: util/inteltool: spi: add code for dumping config registers
......................................................................
Patch Set 6:
(1 comment)
Maybe call it `pci` or `pci_cfg`? Took me a moment to realize what `cfg` is about.
https://review.coreboot.org/c/coreboot/+/39565/6/util/inteltool/spi.c
File util/inteltool/spi.c:
https://review.coreboot.org/c/coreboot/+/39565/6/util/inteltool/spi.c@439
PS6, Line 439: pci_free_dev(spi);
I suppose this was missing in the previous patch?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39564 )
Change subject: util/inteltool: spi: make Sunrise Point dumping work
......................................................................
Patch Set 5: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/39564/5/util/inteltool/spi.c
File util/inteltool/spi.c:
https://review.coreboot.org/c/coreboot/+/39564/5/util/inteltool/spi.c@94
PS5, Line 94: { 0xd4, 4, "BIOS_SBRS - SPI Bus Requester Status" },
Do we have to prefix everything with BIOS_? I know the datasheets do...
https://review.coreboot.org/c/coreboot/+/39564/5/util/inteltool/spi.c@406
PS5, Line 406: ;
one ; should be enough :)
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39512 )
Change subject: util/inteltool: gpio: add Sunrise Point GPIO Community config registers
......................................................................
Patch Set 11:
(3 comments)
The numbers seem correct, but why does everything look red know? ^^
https://review.coreboot.org/c/coreboot/+/39512/8/util/inteltool/gpio_names/…
File util/inteltool/gpio_names/sunrise.h:
https://review.coreboot.org/c/coreboot/+/39512/8/util/inteltool/gpio_names/…
PS8, Line 8: C
please keep the lower-case hex style.
https://review.coreboot.org/c/coreboot/+/39512/8/util/inteltool/gpio_names/…
PS8, Line 34: };
also applies to LP version
https://review.coreboot.org/c/coreboot/+/39512/8/util/inteltool/gpio_names/…
PS8, Line 581: .community_cfg_registers_size = ARRAY_SIZE(sunrise_community_ab_cfg_registers),
Please maintain alignment of the =
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39566 )
Change subject: util/inteltool: spi: add Sunrise Point config registers
......................................................................
Uploaded patch set 6: Patch Set 5 was rebased.
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