coreboot-gerrit February 2019

coreboot-gerrit@coreboot.org

1 participants
1233 discussions

Change in ...coreboot[master]: soc/intel/cannonlake: Add SOC_INTEL_WHISKEYLAKE kconfig
by Subrata Banik (Code Review) 01 Feb '19

01 Feb '19

Hello Patrick Rudolph, PraveenX Hodagatta Pranesh, Angel Pons, Aamir Bohra, Duncan Laurie, Rizwan Qureshi, build bot (Jenkins), Lijian Zhao, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31133 to look at the new patch set (#5). Change subject: soc/intel/cannonlake: Add SOC_INTEL_WHISKEYLAKE kconfig ...................................................................... soc/intel/cannonlake: Add SOC_INTEL_WHISKEYLAKE kconfig This patch selects correct SoC support for hatch, sarien, cflrvps and whlrvp. * Hatch is WHL SoC based board * Sarien is WHL SoC based board * CFLRVP U/8/11 are CFL SoC based board * WHLRVP is based on WHL SoC Also add correct FSP blobs path for WHL SoC based designs. Change-Id: I66b63361841f5a16615ddce4225c4f6182eabdb3 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/fsp_params.c 7 files changed, 20 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/31133/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/31133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66b63361841f5a16615ddce4225c4f6182eabdb3 Gerrit-Change-Number: 31133 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: mb/lenovo/{x200,t400}: Set SMBUS mux using common SB functions
by Patrick Rudolph (Code Review) 01 Feb '19

01 Feb '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31189 ) Change subject: mb/lenovo/{x200,t400}: Set SMBUS mux using common SB functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e9a165b722006557557058a14e9f5dac78d4538 Gerrit-Change-Number: 31189 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Feb 2019 05:35:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix
by Subrata Banik (Code Review) 01 Feb '19

01 Feb '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31153 Change subject: soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix ...................................................................... soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix TEST=Dump SSDT entries to verify _CST between S0ix enable and disable. Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/icelake/acpi.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/31153/1 diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 39ec58a..0e13d034 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -119,13 +119,13 @@ }, }; -static int cstate_set_s0ix[] = { +static int cstate_set_non_s0ix[] = { C_STATE_C1E, C_STATE_C6_LONG_LAT, C_STATE_C7S_LONG_LAT }; -static int cstate_set_non_s0ix[] = { +static int cstate_set_s0ix[] = { C_STATE_C1E, C_STATE_C7S_LONG_LAT, C_STATE_C10 -- To view, visit https://review.coreboot.org/c/coreboot/+/31153 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052 Gerrit-Change-Number: 31153 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

4 6

Jump to page:

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2019