coreboot-gerrit February 2019

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Change in ...coreboot[master]: mb/lenovo/{x200,t400}: Set SMBUS mux using common SB functions

by Patrick Rudolph (Code Review)

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31189 ) Change subject: mb/lenovo/{x200,t400}: Set SMBUS mux using common SB functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e9a165b722006557557058a14e9f5dac78d4538 Gerrit-Change-Number: 31189 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Feb 2019 05:35:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

2 years, 7 months

Change in ...coreboot[master]: soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix

by Subrata Banik (Code Review)

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31153 Change subject: soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix ...................................................................... soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix TEST=Dump SSDT entries to verify _CST between S0ix enable and disable. Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/icelake/acpi.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/31153/1 diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 39ec58a..0e13d034 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -119,13 +119,13 @@ }, }; -static int cstate_set_s0ix[] = { +static int cstate_set_non_s0ix[] = { C_STATE_C1E, C_STATE_C6_LONG_LAT, C_STATE_C7S_LONG_LAT }; -static int cstate_set_non_s0ix[] = { +static int cstate_set_s0ix[] = { C_STATE_C1E, C_STATE_C7S_LONG_LAT, C_STATE_C10 -- To view, visit https://review.coreboot.org/c/coreboot/+/31153 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052 Gerrit-Change-Number: 31153 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

2 years, 7 months

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coreboot-gerrit February 2019