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Change in coreboot[master]: sb/intel/lynxpoint: Get rid of device_t
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

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Change in coreboot[master]: [RFC] Revert recent bootmem changes
by Martin Roth (Code Review) 09 Jun '18

09 Jun '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/26975 ) Change subject: [RFC] Revert recent bootmem changes ...................................................................... Patch Set 2: Code-Review+1 I'm in favor of reverting them, at least until things are working better. I'd probably also revert them from the 4.8 branch. -- To view, visit https://review.coreboot.org/26975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Gerrit-Change-Number: 26975 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 15:43:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [RFC] Revert recent bootmem changes
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26975 ) Change subject: [RFC] Revert recent bootmem changes ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74637/ : SUCCESS -- To view, visit https://review.coreboot.org/26975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Gerrit-Change-Number: 26975 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 15:39:15 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [RFC] Revert recent bootmem changes
by Nico Huber (Code Review) 09 Jun '18

09 Jun '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/26975 to look at the new patch set (#2). Change subject: [RFC] Revert recent bootmem changes ...................................................................... [RFC] Revert recent bootmem changes It wasn't thought through and we might want to revert instead of working on the third serious fixup. Revert "bootmem: Keep OS memory map separate from the start" This reverts commit ae05d095b36ac835a6b1a221e6858065e5486888. Revert "lib/bootmem: ensure ramstage memory isn't given to OS" This reverts commit 1ecec5f979b903f7f789f7e05132061d633f65ea. Revert "lib/bootmem: Add method to walk OS POV memory tables" This reverts commit 64049be508671bbd98e2c69bbe32a2434bc17b9d. Revert "lib/bootmem: Add method to walk memory tables" This reverts commit c653623d59bc207d035078b63d4bfe1c45e6f58d. Revert "lib/bootmem: Add more bootmem tags" This reverts commit 23d62dd15c39b3628b102cf6417d476e78ffcdaf. Revert "lib/bootmem: Introduce custom bootmem tags" This reverts commit 9ab9db0bc5a1bf8bb35980068a840691d54aa5dd. Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/arch/arm/tables.c M src/arch/arm64/tables.c M src/arch/x86/tables.c M src/include/bootmem.h M src/lib/bootmem.c M src/lib/imd_cbmem.c M src/lib/selfboot.c 7 files changed, 28 insertions(+), 184 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/26975/2 -- To view, visit https://review.coreboot.org/26975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Gerrit-Change-Number: 26975 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: sb/intel/lynxpoint: Get rid of device_t
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

1 0

Change in coreboot[master]: sb/intel/lynxpoint: Get rid of device_t
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

1 0

Change in coreboot[master]: sb/intel/lynxpoint: Get rid of device_t
by Elyes HAOUAS (Code Review) 09 Jun '18

09 Jun '18

Elyes HAOUAS has uploaded a new patch set (#2). ( https://review.coreboot.org/26974 ) Change subject: sb/intel/lynxpoint: Get rid of device_t ...................................................................... sb/intel/lynxpoint: Get rid of device_t Use of device_t has been abandoned in ramstage. Change-Id: I064ff5e76dd95c1770cd24139195b2a5fff2d382 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/pci.c M src/southbridge/intel/lynxpoint/pcie.c M src/southbridge/intel/lynxpoint/sata.c M src/southbridge/intel/lynxpoint/watchdog.c 5 files changed, 35 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/26974/2 -- To view, visit https://review.coreboot.org/26974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I064ff5e76dd95c1770cd24139195b2a5fff2d382 Gerrit-Change-Number: 26974 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: [RFC] Revert recent bootmem changes
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26975 ) Change subject: [RFC] Revert recent bootmem changes ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/74635/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/28745/ : SUCCESS -- To view, visit https://review.coreboot.org/26975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Gerrit-Change-Number: 26975 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 15:29:56 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [RFC] Revert recent bootmem changes
by Nico Huber (Code Review) 09 Jun '18

09 Jun '18

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/26975 Change subject: [RFC] Revert recent bootmem changes ...................................................................... [RFC] Revert recent bootmem changes It wasn't thought through and we might want to revert instead of working on the third serious fixup. Revert "bootmem: Keep OS memory map separate from the start" This reverts commit ae05d095b36ac835a6b1a221e6858065e5486888. Revert "lib/bootmem: ensure ramstage memory isn't given to OS" This reverts commit 1ecec5f979b903f7f789f7e05132061d633f65ea. Revert "lib/bootmem: Add method to walk OS POV memory tables" This reverts commit 64049be508671bbd98e2c69bbe32a2434bc17b9d. Revert "lib/bootmem: Add method to walk memory tables" This reverts commit c653623d59bc207d035078b63d4bfe1c45e6f58d. Revert "lib/bootmem: Add more bootmem tags" This reverts commit 23d62dd15c39b3628b102cf6417d476e78ffcdaf. Revert "lib/bootmem: Introduce custom bootmem tags" This reverts commit 9ab9db0bc5a1bf8bb35980068a840691d54aa5dd. Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 --- M src/arch/arm/tables.c M src/arch/arm64/tables.c M src/arch/x86/tables.c M src/include/bootmem.h M src/lib/bootmem.c M src/lib/imd_cbmem.c M src/lib/selfboot.c 7 files changed, 28 insertions(+), 184 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/26975/1 diff --git a/src/arch/arm/tables.c b/src/arch/arm/tables.c index 682c2bc..eef6bf2 100644 --- a/src/arch/arm/tables.c +++ b/src/arch/arm/tables.c @@ -18,7 +18,6 @@ #include <bootmem.h> #include <boot/tables.h> #include <boot/coreboot_tables.h> -#include <symbols.h> void arch_write_tables(uintptr_t coreboot_table) { @@ -26,16 +25,6 @@ void bootmem_arch_add_ranges(void) { - DECLARE_OPTIONAL_REGION(ttb_subtables); - - bootmem_add_range((uintptr_t)_ttb, _ttb_size, BM_MEM_RAMSTAGE); - bootmem_add_range((uintptr_t)_ttb_subtables, _ttb_subtables_size, - BM_MEM_RAMSTAGE); - - if (!IS_ENABLED(CONFIG_COMMON_CBFS_SPI_WRAPPER)) - return; - bootmem_add_range((uintptr_t)_postram_cbfs_cache, - _postram_cbfs_cache_size, BM_MEM_RAMSTAGE); } void lb_arch_add_records(struct lb_header *header) diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c index f36679e..eef6bf2 100644 --- a/src/arch/arm64/tables.c +++ b/src/arch/arm64/tables.c @@ -18,7 +18,6 @@ #include <bootmem.h> #include <boot/tables.h> #include <boot/coreboot_tables.h> -#include <symbols.h> void arch_write_tables(uintptr_t coreboot_table) { @@ -26,12 +25,6 @@ void bootmem_arch_add_ranges(void) { - bootmem_add_range((uintptr_t)_ttb, _ttb_size, BM_MEM_RAMSTAGE); - - if (!IS_ENABLED(CONFIG_COMMON_CBFS_SPI_WRAPPER)) - return; - bootmem_add_range((uintptr_t)_postram_cbfs_cache, - _postram_cbfs_cache_size, BM_MEM_RAMSTAGE); } void lb_arch_add_records(struct lb_header *header) diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index 0a9a3d5..057f665 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -266,5 +266,5 @@ /* Memory from 0 through the forwarding_table is reserved. */ const uintptr_t base = 0; - bootmem_add_range(base, forwarding_table - base, BM_MEM_TABLE); + bootmem_add_range(base, forwarding_table - base, LB_MEM_TABLE); } diff --git a/src/include/bootmem.h b/src/include/bootmem.h index 0a960c9..6e7d127 100644 --- a/src/include/bootmem.h +++ b/src/include/bootmem.h @@ -20,80 +20,21 @@ #include <stdint.h> #include <boot/coreboot_tables.h> -/** - * Bootmem types match to LB_MEM tags, except for the following: - * BM_MEM_RAMSTAGE : Memory where any kind of boot firmware resides and that - * should not be touched by bootmem (by example: stack, - * TTB, program, ...). - * BM_MEM_PAYLOAD : Memory where any kind of payload resides and that should - * not be touched by bootmem. - * Start at 0x10000 to make sure that the caller doesn't provide LB_MEM tags. - */ -enum bootmem_type { - BM_MEM_FIRST = 0x10000, /* First entry in this list */ - BM_MEM_RAM, /* Memory anyone can use */ - BM_MEM_RESERVED, /* Don't use this memory region */ - BM_MEM_ACPI, /* ACPI Tables */ - BM_MEM_NVS, /* ACPI NVS Memory */ - BM_MEM_UNUSABLE, /* Unusable address space */ - BM_MEM_VENDOR_RSVD, /* Vendor Reserved */ - BM_MEM_TABLE, /* Ram configuration tables are kept in */ - /* Tags below this point are ignored for the OS table. */ - BM_MEM_OS_CUTOFF = BM_MEM_TABLE, - BM_MEM_RAMSTAGE, - BM_MEM_PAYLOAD, - BM_MEM_LAST, /* Last entry in this list */ -}; - -/** - * Write memory coreboot table. Current resource map is serialized into +/* Write memory coreboot table. Current resource map is serialized into * memtable (LB_MEM_* types). bootmem library is unusable until this function - * is called first in the write tables path before payload is loaded. - * - * Bootmem types match to LB_MEM tags, except for the following: - * BM_MEM_RAMSTAGE : Translates to LB_MEM_RAM. - * BM_MEM_PAYLOAD : Translates to LB_MEM_RAM. - */ + * is called first in the write tables path before payload is loaded. */ void bootmem_write_memory_table(struct lb_memory *mem); /* Architecture hook to add bootmem areas the architecture controls when * bootmem_write_memory_table() is called. */ void bootmem_arch_add_ranges(void); -/* Platform hook to add bootmem areas the platform / board controls. */ -void bootmem_platform_add_ranges(void); - /* Add a range of a given type to the bootmem address space. */ -void bootmem_add_range(uint64_t start, uint64_t size, - const enum bootmem_type tag); +void bootmem_add_range(uint64_t start, uint64_t size, uint32_t type); /* Print current range map of boot memory. */ void bootmem_dump_ranges(void); -typedef bool (*range_action_t)(const struct range_entry *r, void *arg); - -/** - * Walk memory tables from OS point of view and call the provided function, - * for every region. The caller has to return false to break out of the loop any - * time, or return true to continue. - * - * @param action The function to call for each memory range. - * @param arg Pointer passed to function @action. Set to NULL if unused. - * @return true if the function 'action' returned false. - */ -bool bootmem_walk_os_mem(range_action_t action, void *arg); - -/** - * Walk memory tables and call the provided function, for every region. - * The caller has to return false to break out of the loop any time, or - * return true to continue. - * - * @param action The function to call for each memory range. - * @param arg Pointer passed to function @action. Set to NULL if unused. - * @return true if the function 'action' returned false. - */ -bool bootmem_walk(range_action_t action, void *arg); - /* Return 1 if region targets usable RAM, 0 otherwise. */ int bootmem_region_targets_usable_ram(uint64_t start, uint64_t size); diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c index 90f4970..07391a5 100644 --- a/src/lib/bootmem.c +++ b/src/lib/bootmem.c @@ -20,53 +20,15 @@ #include <cbmem.h> #include <device/resource.h> #include <stdlib.h> -#include <symbols.h> -#include <assert.h> static int initialized; -static int table_written; static struct memranges bootmem; -static struct memranges bootmem_os; static int bootmem_is_initialized(void) { return initialized; } -static int bootmem_memory_table_written(void) -{ - return table_written; -} - -/* Platform hook to add bootmem areas the platform / board controls. */ -void __attribute__((weak)) bootmem_platform_add_ranges(void) -{ -} - -/* Convert bootmem tag to LB_MEM tag */ -static uint32_t bootmem_to_lb_tag(const enum bootmem_type tag) -{ - switch (tag) { - case BM_MEM_RAM: - return LB_MEM_RAM; - case BM_MEM_RESERVED: - return LB_MEM_RESERVED; - case BM_MEM_ACPI: - return LB_MEM_ACPI; - case BM_MEM_NVS: - return LB_MEM_NVS; - case BM_MEM_UNUSABLE: - return LB_MEM_UNUSABLE; - case BM_MEM_VENDOR_RSVD: - return LB_MEM_VENDOR_RSVD; - case BM_MEM_TABLE: - return LB_MEM_TABLE; - default: - printk(BIOS_ERR, "ERROR: Unsupported tag %u\n", tag); - return LB_MEM_RESERVED; - } -} - static void bootmem_init(void) { const unsigned long cacheable = IORESOURCE_CACHEABLE; @@ -80,32 +42,23 @@ * that each overlapping range will take over the next. Therefore, * add cacheable resources as RAM then add the reserved resources. */ - memranges_init(bm, cacheable, cacheable, BM_MEM_RAM); - memranges_add_resources(bm, reserved, reserved, BM_MEM_RESERVED); - memranges_clone(&bootmem_os, bm); + memranges_init(bm, cacheable, cacheable, LB_MEM_RAM); + memranges_add_resources(bm, reserved, reserved, LB_MEM_RESERVED); /* Add memory used by CBMEM. */ cbmem_add_bootmem(); - bootmem_add_range((uintptr_t)_stack, _stack_size, BM_MEM_RAMSTAGE); - bootmem_add_range((uintptr_t)_program, _program_size, BM_MEM_RAMSTAGE); - bootmem_arch_add_ranges(); - bootmem_platform_add_ranges(); } -void bootmem_add_range(uint64_t start, uint64_t size, - const enum bootmem_type tag) +void bootmem_add_range(uint64_t start, uint64_t size, uint32_t type) { - assert(tag > BM_MEM_FIRST && tag < BM_MEM_LAST); - assert(bootmem_is_initialized()); + if (!bootmem_is_initialized()) { + printk(BIOS_ERR, "%s: lib unitialized!\n", __func__); + return; + } - memranges_insert(&bootmem, start, size, tag); - if (tag <= BM_MEM_OS_CUTOFF) { - /* Can't change OS tables anymore after they are written out. */ - assert(!bootmem_memory_table_written()); - memranges_insert(&bootmem_os, start, size, tag); - }; + memranges_insert(&bootmem, start, size, type); } void bootmem_write_memory_table(struct lb_memory *mem) @@ -118,36 +71,32 @@ bootmem_init(); bootmem_dump_ranges(); - memranges_each_entry(r, &bootmem_os) { + memranges_each_entry(r, &bootmem) { lb_r->start = pack_lb64(range_entry_base(r)); lb_r->size = pack_lb64(range_entry_size(r)); - lb_r->type = bootmem_to_lb_tag(range_entry_tag(r)); + lb_r->type = range_entry_tag(r); lb_r++; mem->size += sizeof(struct lb_memory_range); } - - table_written = 1; } struct range_strings { - enum bootmem_type tag; + unsigned long tag; const char *str; }; static const struct range_strings type_strings[] = { - { BM_MEM_RAM, "RAM" }, - { BM_MEM_RESERVED, "RESERVED" }, - { BM_MEM_ACPI, "ACPI" }, - { BM_MEM_NVS, "NVS" }, - { BM_MEM_UNUSABLE, "UNUSABLE" }, - { BM_MEM_VENDOR_RSVD, "VENDOR RESERVED" }, - { BM_MEM_TABLE, "CONFIGURATION TABLES" }, - { BM_MEM_RAMSTAGE, "RAMSTAGE" }, - { BM_MEM_PAYLOAD, "PAYLOAD" }, + { LB_MEM_RAM, "RAM" }, + { LB_MEM_RESERVED, "RESERVED" }, + { LB_MEM_ACPI, "ACPI" }, + { LB_MEM_NVS, "NVS" }, + { LB_MEM_UNUSABLE, "UNUSABLE" }, + { LB_MEM_VENDOR_RSVD, "VENDOR RESERVED" }, + { LB_MEM_TABLE, "CONFIGURATION TABLES" }, }; -static const char *bootmem_range_string(const enum bootmem_type tag) +static const char *bootmem_range_string(unsigned long tag) { int i; @@ -173,34 +122,6 @@ } } -bool bootmem_walk_os_mem(range_action_t action, void *arg) -{ - const struct range_entry *r; - - assert(bootmem_is_initialized()); - - memranges_each_entry(r, &bootmem_os) { - if (!action(r, arg)) - return true; - } - - return false; -} - -bool bootmem_walk(range_action_t action, void *arg) -{ - const struct range_entry *r; - - assert(bootmem_is_initialized()); - - memranges_each_entry(r, &bootmem) { - if (!action(r, arg)) - return true; - } - - return false; -} - int bootmem_region_targets_usable_ram(uint64_t start, uint64_t size) { const struct range_entry *r; @@ -212,7 +133,7 @@ break; if (start >= range_entry_base(r) && end <= range_entry_end(r)) { - if (range_entry_tag(r) == BM_MEM_RAM) + if (range_entry_tag(r) == LB_MEM_RAM) return 1; } } @@ -240,7 +161,7 @@ if (range_entry_size(r) < size) continue; - if (range_entry_tag(r) != BM_MEM_RAM) + if (range_entry_tag(r) != LB_MEM_RAM) continue; if (range_entry_base(r) >= max_addr) @@ -267,7 +188,7 @@ begin = end - size; /* Mark buffer as unusuable for future buffer use. */ - bootmem_add_range(begin, size, BM_MEM_PAYLOAD); + bootmem_add_range(begin, size, LB_MEM_UNUSABLE); return (void *)(uintptr_t)begin; } diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c index 177d2ac..cc1294f 100644 --- a/src/lib/imd_cbmem.c +++ b/src/lib/imd_cbmem.c @@ -300,7 +300,7 @@ size_t size = 0; imd_region_used(cbmem_get_imd(), &baseptr, &size); - bootmem_add_range((uintptr_t)baseptr, size, BM_MEM_TABLE); + bootmem_add_range((uintptr_t)baseptr, size, LB_MEM_TABLE); } #if ENV_RAMSTAGE || (IS_ENABLED(CONFIG_EARLY_CBMEM_LIST) \ diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 1cf32e5..160e8f5 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -381,7 +381,7 @@ */ if (check_regions) { bootmem_add_range(ptr->s_dstaddr, ptr->s_memsz, - BM_MEM_PAYLOAD); + LB_MEM_UNUSABLE); } if (!overlaps_coreboot(ptr)) -- To view, visit https://review.coreboot.org/26975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If9b28ee50d94fe443a6e2b6e9d337f0c784b18c4 Gerrit-Change-Number: 26975 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: sb/intel/lynxpoint: Get rid of device_t
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26974 ) Change subject: sb/intel/lynxpoint: Get rid of device_t ...................................................................... Patch Set 1: (14 comments) https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/lpc… File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/lpc… PS1, Line 660: static void pch_lpc_add_io_resource(struct device *dev, u16 base, u16 size, int index) line over 80 characters https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/lpc… PS1, Line 673: static void pch_lpc_add_gen_io_resources(struct device *dev, int reg_value, int index) line over 80 characters https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/lpc… PS1, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/lpc… PS1, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… File src/southbridge/intel/lynxpoint/pci.c: https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… PS1, Line 107: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… PS1, Line 107: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… File src/southbridge/intel/lynxpoint/pcie.c: https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… PS1, Line 718: static void pcie_set_subsystem(struct device *dev, unsigned vendor, unsigned device) line over 80 characters https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… PS1, Line 718: static void pcie_set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/pci… PS1, Line 718: static void pcie_set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/sat… File src/southbridge/intel/lynxpoint/sata.c: https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/sat… PS1, Line 304: static void sata_enable(struct *dev) need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/sat… PS1, Line 325: static void sata_set_subsystem(struct device *dev, unsigned vendor, unsigned device) line over 80 characters https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/sat… PS1, Line 325: static void sata_set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/sat… PS1, Line 325: static void sata_set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/wat… File src/southbridge/intel/lynxpoint/watchdog.c: https://review.coreboot.org/#/c/26974/1/src/southbridge/intel/lynxpoint/wat… PS1, Line 31: struct *dev; need consistent spacing around '*' (ctx:WxV) -- To view, visit https://review.coreboot.org/26974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I064ff5e76dd95c1770cd24139195b2a5fff2d382 Gerrit-Change-Number: 26974 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 15:23:04 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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coreboot-gerrit June 2018