Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/25559 )
Change subject: Documentation: Convert abi-data-consumption.txt to Markdown
......................................................................
Patch Set 1: Code-Review+2
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Id186db140503f3c2759d579b18476fff021988c8
Gerrit-Change-Number: 25559
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Mon, 09 Apr 2018 08:17:22 +0000
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Amanda Hwang has uploaded this change for review. ( https://review.coreboot.org/25563
Change subject: mb/google/poppy: Disable rear camera for all vayne sku.
......................................................................
mb/google/poppy: Disable rear camera for all vayne sku.
BUG=b:75073617
BRANCH=master
TEST=Verify if only front camera shown on Vayne.
Change-Id: I6e7c1e8791462f00ad8336372954ee0a9465d9b8
Signed-off-by: amanda_hwang <amanda_hwang(a)compal.corp-partner.google.com>
---
M src/mainboard/google/poppy/variants/nami/mainboard.c
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/25563/1
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index 4fc3d88..11d4060 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -46,6 +46,7 @@
config_t *cfg = root->chip_info;
switch (sku_id) {
case SKU_1_VAYNE:
+ case SKU_2_VAYNE:
cfg->usb2_ports[5].enable = 0;//rear camera
break;
default:
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Subrata Banik has uploaded a new patch set (#2). ( https://review.coreboot.org/25562 )
Change subject: soc/intel/common: Configure all possible GFX DSM memory reserve range
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soc/intel/common: Configure all possible GFX DSM memory reserve range
Intel internal graphics preallocated memory size should be selected from
below lists as per Intel FSP UPD header:
0x00:0MB, 0x01:32MB, 0x02:64MB, 0x03:96MB, 0x04:128MB, 0x05:160MB,
0xF0:4MB, 0xF1:8MB, 0xF2:12MB, 0xF3:16MB, 0xF4:20MB, 0xF5:24MB,
0xF6:28MB, 0xF7:32MB, 0xF8:36MB, 0xF9:40MB, 0xFA:44MB, 0xFB:48MB,
0xFC:52MB, 0xFD:56MB, 0xFE:60MB
This patch ensures that coreboot can report the same preallocated
memory range for intel grapics during memory layout calculation.
TEST=Set IgdDvmt50PreAlloc UPD with different ranges between 4MB-60MB
and coreboot could able to calculate GFX DSM range accordingly.
Change-Id: I99735e9a2ee57626bd9d7258e700f7f39ef02e58
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/systemagent/systemagent_early.c
1 file changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/25562/2
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