the following patch was just integrated into master:
commit a99c64e1297b904369e2d4af97f21982de2c2ff2
Author: Damien Zammit <damien(a)zamaudio.com>
Date: Mon Sep 5 02:36:02 2016 +1000
nb/intel/x4x: Turn on PEG graphics in device enable
Change-Id: I389c4630362af1c1bf6d281c9d2b7fc81bea2d5d
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
Reviewed-on: https://review.coreboot.org/16495
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/16495 for details.
-gerrit
the following patch was just integrated into master:
commit 523e90f9c7b749b6a6131557df88e8e645f98aa8
Author: Damien Zammit <damien(a)zamaudio.com>
Date: Mon Sep 5 02:32:40 2016 +1000
nb/intel/x4x: Increase MMIO PCI space to 2GiB
This is necessary for PCI express graphics card add-ons,
otherwise the pci allocator cannot fit the mmio for the
add on card into the space it has available and the OS
turns off the card. Old value was 1GiB.
Change-Id: I606994501b15e636fe209d1ed4b3d3f73b42bf5c
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
Reviewed-on: https://review.coreboot.org/16494
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16494 for details.
-gerrit
the following patch was just integrated into master:
commit 57321db3ca6de23e9b33738bb232d587b1b38ac1
Author: Damien Zammit <damien(a)zamaudio.com>
Date: Sun Sep 4 23:49:10 2016 +1000
nb/intel/x4x: Fix DMI init
No more hang on DMI init when wait for DMI is re-enabled.
Previously the virtual channel arbitration table was not being
set up in the south/north bridges causing invalid DMI state.
This has been tested on GA-G41M-ES2L with patches following.
An NVIDIA GT218 card was detected by the OS and displayed using
the nouveau driver with no blobs.
Change-Id: I35e03c40f5f7aa4915afd5d26db7ab053abcf0cd
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
Reviewed-on: https://review.coreboot.org/16491
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/16491 for details.
-gerrit
the following patch was just integrated into master:
commit d4aa2c434869edffc7d49b9e52ba8c182b8ef69a
Author: Martin Roth <martinroth(a)google.com>
Date: Tue Sep 6 10:28:22 2016 -0600
include/arch/acpi.h: change IVRS efr field to iommu_feature_info
The field that was previously named 'efr' is actually the iommu feature
info field. The efr field is a 64-bit field that is only present in
type 11h or type 40h headers that follows the iommu feature info field.
Change-Id: I62c158a258d43bf1912fedd63cc31b80321a27c6
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/16508
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See https://review.coreboot.org/16508 for details.
-gerrit
the following patch was just integrated into master:
commit a66df49e158472c706a9685c6d4644f193999ec9
Author: Martin Roth <martinroth(a)google.com>
Date: Tue Sep 6 10:22:34 2016 -0600
x86/acpi.c: use #define for IVRS revision field
The revision field was correct, but the comment was wrong. The revision
1 means that the IVRS table only uses fixed length device entries.
Update the field to use the IVRS revision #define.
Change-Id: I4c030b31e3e3f0a402dac36ab69f43d99e131c22
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/16507
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See https://review.coreboot.org/16507 for details.
-gerrit
Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16526
-gerrit
commit dc4b6120182d959208379f027da15cb218f88fac
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Sep 7 11:43:50 2016 -0500
Revert "mainboard/google/reef: Enable audio clock and power gate"
This reverts commit e52592078e8e5b24b45197ab510236193656f68e.
It breaks the build because its dependency patch wasn't commited.
Change-Id: I1f135ca3fc8e8e45a79ce4437fb7ef1a140f2347
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/mainboard/google/reef/devicetree.cb | 5 -----
1 file changed, 5 deletions(-)
diff --git a/src/mainboard/google/reef/devicetree.cb b/src/mainboard/google/reef/devicetree.cb
index 2ac20de..9a7c2d1 100644
--- a/src/mainboard/google/reef/devicetree.cb
+++ b/src/mainboard/google/reef/devicetree.cb
@@ -38,11 +38,6 @@ chip soc/intel/apollolake
# Enable DPTF
register "dptf_enable" = "1"
- # Enable Audio Clock and Power gating
- register "hdaudio_clk_gate_enable" = "1"
- register "hdaudio_pwr_gate_enable" = "1"
- register "hdaudio_bios_config_lockdown" = "1"
-
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route, i.e., if this route changes then the affected GPE
the following patch was just integrated into master:
commit 8ba2010d126ce7a6d32504bcb2a0e1b231732c0f
Author: Arthur Heymans <arthur(a)aheymans.xyz>
Date: Mon Aug 15 00:04:34 2016 +0200
gm45/gma.c: clean up some registers
According to "G45: Volume 3: Display Register
Intel ® 965G Express Chipset Family and Intel ®
G35 Express Chipset Graphics Controller" some registries
are set incorrectly in gm45/gma.c.
Some values are changed after comparing them with the values
the i915 linux kernel (3.13 was used) module sets while modesetting.
The values were obtained using 'intel_reg' from intel-gpu-tools,
during a normal boot and with 'nomodeset' as a kernel argument.
Some registers that don't exist on gm45 are set in gma.c, which is
probably the result of copying code from a more recent intel
northbridge.
The result is that that gm45 laptops with wxga displays still work as
before. gm45 laptops with wxga+ or higher resolution now just work,
where previously a black screen was shown.
TEST: build with native graphic init and flash on a gm45 target, like
lenovo x200.
Change-Id: If66b60c7189997c558270f9e474851fe7e2219f1
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16217
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
See https://review.coreboot.org/16217 for details.
-gerrit