Sumeet R Pawnikar (sumeet.r.pawnikar(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16596
-gerrit
commit e9b42b75bb15bff4b7c8849aeb585fe4a9bf6e3b
Author: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
Date: Tue Sep 13 11:54:03 2016 +0530
mainboards/apollolake: Set RAPL power limit PL1 value to 12W.
This patch sets tuned RAPL power limit PL1 value to
12W in acpi/dptf.asl for RAPL MSR register. With PL1
as 12W for WebGL and stream case, we measured SoC power
reaching upto 6W. Above 12W PL1 value, we observed that
Soc power going above 6W. With PL1 as 12W, system is
able to leverage full TDP capacity.
BUG=chrome-os-partner:56524
TEST=Built, booted on reef and verifed the package
power with heavy workload.
Change-Id: I8185ce890f27e29bc138ea568af536bc274fe7b8
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
src/mainboard/google/reef/acpi/dptf.asl | 2 +-
src/mainboard/intel/amenia/acpi/dptf.asl | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/reef/acpi/dptf.asl b/src/mainboard/google/reef/acpi/dptf.asl
index 33d9b4d..1f9bfb2 100644
--- a/src/mainboard/google/reef/acpi/dptf.asl
+++ b/src/mainboard/google/reef/acpi/dptf.asl
@@ -73,7 +73,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
1600, /* PowerLimitMinimum */
- 15000, /* PowerLimitMaximum */
+ 12000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */
diff --git a/src/mainboard/intel/amenia/acpi/dptf.asl b/src/mainboard/intel/amenia/acpi/dptf.asl
index 35bbecb..a75d668 100644
--- a/src/mainboard/intel/amenia/acpi/dptf.asl
+++ b/src/mainboard/intel/amenia/acpi/dptf.asl
@@ -73,7 +73,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
1600, /* PowerLimitMinimum */
- 15000, /* PowerLimitMaximum */
+ 12000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */
Sumeet R Pawnikar (sumeet.r.pawnikar(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16596
-gerrit
commit ae52d5c671fe092eaa977b126a4cc7eb7e66fc2b
Author: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
Date: Tue Sep 13 11:54:03 2016 +0530
apollolake: Set RAPL power limit PL1 value to 12W.
This patch sets tuned RAPL power limit PL1 value to
12W in acpi/dptf.asl for RAPL MSR register. With PL1
as 12W for WebGL and stream case, we measured SoC power
reaching upto 6W. Above 12W PL1 value, we observed that
Soc power going above 6W. With PL1 as 12W, system is
able to leverage full TDP capacity.
BUG=chrome-os-partner:56524
TEST=Built, booted on reef and verifed the package
power with heavy workload.
Change-Id: I8185ce890f27e29bc138ea568af536bc274fe7b8
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
src/mainboard/google/reef/acpi/dptf.asl | 2 +-
src/mainboard/intel/amenia/acpi/dptf.asl | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/reef/acpi/dptf.asl b/src/mainboard/google/reef/acpi/dptf.asl
index 33d9b4d..1f9bfb2 100644
--- a/src/mainboard/google/reef/acpi/dptf.asl
+++ b/src/mainboard/google/reef/acpi/dptf.asl
@@ -73,7 +73,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
1600, /* PowerLimitMinimum */
- 15000, /* PowerLimitMaximum */
+ 12000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */
diff --git a/src/mainboard/intel/amenia/acpi/dptf.asl b/src/mainboard/intel/amenia/acpi/dptf.asl
index 35bbecb..a75d668 100644
--- a/src/mainboard/intel/amenia/acpi/dptf.asl
+++ b/src/mainboard/intel/amenia/acpi/dptf.asl
@@ -73,7 +73,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
1600, /* PowerLimitMinimum */
- 15000, /* PowerLimitMaximum */
+ 12000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */