coreboot-gerrit June 2015

coreboot-gerrit@coreboot.org

1 participants
1226 discussions

New patch to review for coreboot: mainboard/msi/ms7135: DSDT: fix PCI and AGR interrupts
by Jonathan A. Kollasch 23 Jun '15

23 Jun '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10644 -gerrit commit 71ee63c64663b80de85a9c034c200e7e5e2ffc78 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jun 23 10:00:41 2015 -0500 mainboard/msi/ms7135: DSDT: fix PCI and AGR interrupts Change-Id: I0f8aeba90890a76a7cf9cbee9be7bcf919d1e39a Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/msi/ms7135/dsdt.asl | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/src/mainboard/msi/ms7135/dsdt.asl b/src/mainboard/msi/ms7135/dsdt.asl index 4dbbd3d..eba0ffd 100644 --- a/src/mainboard/msi/ms7135/dsdt.asl +++ b/src/mainboard/msi/ms7135/dsdt.asl @@ -102,11 +102,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LSA0, 0x00 }, Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LSA1, 0x00 }, - Package (0x04) { 0x0009FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0009FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0009FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0009FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x000AFFFF, 0x00, \_SB.PCI0.LEMA, 0x00 }, Package (0x04) { 0x000BFFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, @@ -135,11 +130,30 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) Name (_ADR, 0x00090000) Name (_UID, 0x00) Name (_PRT, Package () { - /* AGR slot */ - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x10 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 }, - Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 }, + /* AGR slot "AGP1" */ + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, + + /* PCI slot "PCI1" */ + Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0007FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0007FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + /* Not sure INTD is right, but this is what the OEM BIOS does. */ + Package (0x04) { 0x0007FFFF, 0x03, \_SB.PCI0.LNKE, 0x00 }, + + /* PCI slot "PCI2" */ + Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0008FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0008FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0008FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, + + /* PCI slot "PCI3" */ + Package (0x04) { 0x0009FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0009FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0009FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0009FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, }) }

1 0

New patch to review for coreboot: msi/ms7135: move power_on_after_fail out of RTC century byte
by Jonathan A. Kollasch 23 Jun '15

23 Jun '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10643 -gerrit commit d56efba53bf7a6e1bd28f6e74a0c0e0e5432ee14 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jun 23 09:51:22 2015 -0500 msi/ms7135: move power_on_after_fail out of RTC century byte Change-Id: I0796b6e7adad0151c5aa6271d62a2cf4abeedb1e Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/msi/ms7135/cmos.layout | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/msi/ms7135/cmos.layout b/src/mainboard/msi/ms7135/cmos.layout index 8520347..c2d0a33 100644 --- a/src/mainboard/msi/ms7135/cmos.layout +++ b/src/mainboard/msi/ms7135/cmos.layout @@ -9,7 +9,8 @@ entries 396 1 e 1 interleave_chip_selects 397 2 e 8 max_mem_clock 399 1 e 2 multi_core -400 1 e 1 power_on_after_fail +400 8 h 0 century +408 1 e 1 power_on_after_fail 412 4 e 6 debug_level 440 4 e 9 slow_cpu 444 1 e 1 nmi

1 0

New patch to review for coreboot: mainboard/msi/ms7135: remove bogus MADT IRQ override for timer
by Jonathan A. Kollasch 23 Jun '15

23 Jun '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10642 -gerrit commit 1577953b59cf57dc827ada85732df10635786b8e Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jun 23 09:43:46 2015 -0500 mainboard/msi/ms7135: remove bogus MADT IRQ override for timer Stops Linux from complaining: [0.097286] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0 [0.100005] ..MP-BIOS bug: 8254 timer not connected to IO-APIC [0.100005] ...trying to set up timer (IRQ0) through the 8259A ... [0.100005] ..... (found apic 0 pin 0) ... [0.143507] ....... works. Change-Id: Ic09a6940f80e3da2c1f3c0ef04fb50a4096b7943 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/msi/ms7135/acpi_tables.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mainboard/msi/ms7135/acpi_tables.c b/src/mainboard/msi/ms7135/acpi_tables.c index f5ddec3..5581ada 100644 --- a/src/mainboard/msi/ms7135/acpi_tables.c +++ b/src/mainboard/msi/ms7135/acpi_tables.c @@ -47,9 +47,6 @@ unsigned long acpi_fill_madt(unsigned long current) pci_write_config32(dev, 0x84, 0x0000007d); #endif - /* IRQ of timer */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0); /* IRQ9 */ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);

1 0

New patch to review for coreboot: mainboard/msi/ms7135: only #include necessary headers in acpi_tables.c
by Jonathan A. Kollasch 23 Jun '15

23 Jun '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10641 -gerrit commit 69f4bc331d33617c684de5c7c48ae2aca53ec536 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jun 23 09:15:08 2015 -0500 mainboard/msi/ms7135: only #include necessary headers in acpi_tables.c Change-Id: I0837a2d1e0d8e233f6ef7d7212ce76f2223d19b9 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/msi/ms7135/acpi_tables.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/mainboard/msi/ms7135/acpi_tables.c b/src/mainboard/msi/ms7135/acpi_tables.c index f5ddec3..5ff6fb3 100644 --- a/src/mainboard/msi/ms7135/acpi_tables.c +++ b/src/mainboard/msi/ms7135/acpi_tables.c @@ -8,17 +8,10 @@ * 2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB */ -#include <console/console.h> -#include <string.h> #include <arch/acpi.h> -#include <arch/io.h> #include <arch/smp/mpspec.h> #include <device/pci.h> -#include <device/pci_ids.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/acpi.h" +#include <assert.h> /* APIC */ unsigned long acpi_fill_madt(unsigned long current)

1 0

New patch to review for coreboot: Remove address from GPLv2 headers
by Patrick Georgi 23 Jun '15

23 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10640 -gerrit commit 24a171b9fce858596f12a2eb7415cf6efdd75786 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Thu Mar 26 15:17:45 2015 +0100 Remove address from GPLv2 headers Follow up for commit b890a12, some contributions brought back a number of FSF addresses, so get rid of them again. Change-Id: Icf83d5e2a3daea385af3572e9eac6b2431652c28 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/mainboard/google/auron/acpi/video.asl | 2 +- src/mainboard/google/auron/hda_verb.h | 2 +- src/mainboard/google/auron/pei_data.c | 2 +- src/mainboard/lenovo/t400/acpi/graphics.asl | 2 +- src/soc/imgtec/pistachio/ddr3_init.c | 3 +-- 5 files changed, 5 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/auron/acpi/video.asl b/src/mainboard/google/auron/acpi/video.asl index 3ececa9..b0a637a 100644 --- a/src/mainboard/google/auron/acpi/video.asl +++ b/src/mainboard/google/auron/acpi/video.asl @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ // Brightness write diff --git a/src/mainboard/google/auron/hda_verb.h b/src/mainboard/google/auron/hda_verb.h index 2fd3090..275ee3a 100644 --- a/src/mainboard/google/auron/hda_verb.h +++ b/src/mainboard/google/auron/hda_verb.h @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ static const u32 mainboard_cim_verb_data[] = { diff --git a/src/mainboard/google/auron/pei_data.c b/src/mainboard/google/auron/pei_data.c index 779a62b..162ae9c 100644 --- a/src/mainboard/google/auron/pei_data.c +++ b/src/mainboard/google/auron/pei_data.c @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ #include <stdint.h> diff --git a/src/mainboard/lenovo/t400/acpi/graphics.asl b/src/mainboard/lenovo/t400/acpi/graphics.asl index e928d77..8edf582 100644 --- a/src/mainboard/lenovo/t400/acpi/graphics.asl +++ b/src/mainboard/lenovo/t400/acpi/graphics.asl @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ /* WARNING diff --git a/src/soc/imgtec/pistachio/ddr3_init.c b/src/soc/imgtec/pistachio/ddr3_init.c index a8758f7..3570c11 100644 --- a/src/soc/imgtec/pistachio/ddr3_init.c +++ b/src/soc/imgtec/pistachio/ddr3_init.c @@ -15,8 +15,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Foundation, Inc. */ #include <stdint.h>

1 0

Patch merged into coreboot/master: Kconfig: Move CBFS_SIZE into Mainboard menu
by gerrit＠coreboot.org 23 Jun '15

23 Jun '15

the following patch was just integrated into master: commit 026e4dc3ffb909c2cbf98dffb8156929e4b1e7a3 Author: Martin Roth <gaumless(a)gmail.com> Date: Fri Jun 19 23:17:15 2015 -0600 Kconfig: Move CBFS_SIZE into Mainboard menu The CBFS size is really mainboard specific, since it really depends on size of the chip on the mainboard, so it makes sense to have it in the mainboard menu along with the ROM-chip size. - Move the CBFS_SIZE definition up in src/kconfig - Move the Mainboard Menu markers out of src/mainboard/kconfig into src/Kconfig so CBFS_SIZE can live in the mainboard menu. - Add a long list setting default values to do what the chipset directories were previously defaulting the values to. This will be trimmed down in a following patch that creates a common set of IFD routines. (Who knew that kconfig supported line wrapping?) - Update the help text. Change-Id: I2b9eb5a6f7d543f57d9f3b9d0aa44a5462e8b718 Signed-off-by: Martin Roth <gaumless(a)gmail.com> Reviewed-on: http://review.coreboot.org/10610 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10610 for details. -gerrit

1 0

Patch merged into coreboot/master: SeaBIOS: fix reproducible build by defining our own version string
by gerrit＠coreboot.org 23 Jun '15

23 Jun '15

the following patch was just integrated into master: commit 633886719e2853744d932bd15324dd21634b0bbb Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Jun 11 14:24:39 2015 +0200 SeaBIOS: fix reproducible build by defining our own version string SeaBIOS uses a version string which is derived from hostname. Defining our own version strings drops this dependency. This only works in versions newer than rel-1.8.0-36-g624e812. Change-Id: Ie800deffd3706d1b2dabf5258e2e48bfcd2929b7 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> Reviewed-on: http://review.coreboot.org/10515 Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/10515 for details. -gerrit

1 0

Patch set updated for coreboot: AMD Kern: Fix path of PspSecureOs BLOB
by WANG Siyuan 23 Jun '15

23 Jun '15

WANG Siyuan (wangsiyuanbuaa(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10639 -gerrit commit ac47361532f9a8a209767eacf83b4355382467e0 Author: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Date: Tue Jun 16 21:21:00 2015 +0800 AMD Kern: Fix path of PspSecureOs BLOB AMD Kern uses PspSecureOs_prod_CZ.csbin rather than PspSecureOs_prod_CZ.sbin. PspSecureOs_prod_CZ.csbin is the firmware in CarrizoPI v1.0.0.7. Change-Id: Idf54ee808dd6965aec9b979be00b7f890a88b06d Signed-off-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang(a)amd.com> --- src/southbridge/amd/pi/hudson/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 5e8dbc2..ccca421 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -217,7 +217,7 @@ PSPRCVR_SIZE=$(call file-size,$(CONFIG_PSPRCVR_FILE)) ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).sbin +CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin endif PSPSECUREOS_POS=$(call int-align, \ $(call int-add,$(PSPRCVR_POS) $(PSPRCVR_SIZE) $(CBFS_HEADER_SIZE)), \

1 0

Patch merged into coreboot/master: SeaBIOS: Clean up build command line.
by gerrit＠coreboot.org 23 Jun '15

23 Jun '15

the following patch was just integrated into master: commit 920f2e63e574c57a8039db0a8f5ea76a2ff66391 Author: Martin Roth <gaumless(a)gmail.com> Date: Fri Jun 19 20:22:05 2015 -0600 SeaBIOS: Clean up build command line. - Move IASL up with the other tools. - Remove OUT= which is no longer used in the payloads/external/SeaBIOS Makefile. Change-Id: I211ddcf3496b533151936fa5cbfa7a92986ec28f Signed-off-by: Martin Roth <gaumless(a)gmail.com> Reviewed-on: http://review.coreboot.org/10606 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10606 for details. -gerrit

1 0

Patch set updated for coreboot: SeaBIOS: fix reproducible build by defining our own version string
by Patrick Georgi 23 Jun '15

23 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10515 -gerrit commit 03f71f49964b9a77572d718d8a4d7f898fc2eb4e Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Jun 11 14:24:39 2015 +0200 SeaBIOS: fix reproducible build by defining our own version string SeaBIOS uses a version string which is derived from hostname. Defining our own version strings drops this dependency. This only works in versions newer than rel-1.8.0-36-g624e812. Change-Id: Ie800deffd3706d1b2dabf5258e2e48bfcd2929b7 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- payloads/external/SeaBIOS/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/payloads/external/SeaBIOS/Makefile.inc b/payloads/external/SeaBIOS/Makefile.inc index 4d2367e..087b723 100644 --- a/payloads/external/SeaBIOS/Makefile.inc +++ b/payloads/external/SeaBIOS/Makefile.inc @@ -47,6 +47,9 @@ endif build: config echo " MAKE SeaBIOS $(TAG-y)" + export VERSION=$$(cd seabios && \ + git describe --tags --long --dirty 2>/dev/null || \ + echo "unknown") ; \ $(MAKE) -C seabios OUT=out/ clean:

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2015