the following patch was just integrated into master:
commit 623368113c7fb0a7382cb28ecfba5384cd4f12a0
Author: Julius Werner <jwerner(a)chromium.org>
Date: Mon May 18 13:11:12 2015 -0700
arm64: Decouple MMU functions from memranges
The current arm64 MMU interface is difficult to use in pre-RAM
environments. It is based on the memranges API which makes use of
malloc(), and early stages usually don't have a heap. It is also built
as a one-shot interface that requires all memory ranges to be laid out
beforehand, which is a problem when existing areas need to change (e.g.
after initializing DRAM).
The long-term goal of this patch is to completely switch to a
configure-as-you-go interface based on the mmu_config_range() function,
similar to what ARM32 does. As a first step this feature is added
side-by-side to the existing interface so that existing SoC
implementations continue to work and can be slowly ported over one by
one. Like the ARM32 version it does not garbage collect page tables that
become unused, so repeated mapping at different granularities will
exhaust the available table space (this is presumed to be a reasonable
limitation for a firmware environment and keeps the code much simpler).
Also do some cleanup, align comments between coreboot and libpayload for
easier diffing, and change all error cases to assert()s. Right now the
code just propagates error codes up the stack until it eventually
reaches a function that doesn't check them anymore. MMU configuration
errors (essentially just misaligned requests and running out of table
space) should always be compile-time programming errors, so failing hard
and fast seems like the best way to deal with them.
BRANCH=None
BUG=None
TEST=Compile-tested rush_ryu. Booted on Oak and hacked MMU init to use
mmu_config_range() insted of memranges. Confirmed that CRCs over all page
tables before and after the change are equal.
Change-Id: I93585b44a277c1d96d31ee9c3dd2522b5e10085b
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: f10fcba107aba1f3ea239471cb5a4f9239809539
Original-Change-Id: I6a2a11e3b94e6ae9e1553871f0cccd3b556b3e65
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/271991
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: http://review.coreboot.org/10304
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/10304 for details.
-gerrit
the following patch was just integrated into master:
commit 3ad6ff10545f50db9c294dffd89e3a5e2a5a57d1
Author: Felix Held <felix-coreboot(a)felixheld.de>
Date: Sun May 31 20:37:04 2015 +0200
superiotool: detect the NCT5572D
Change-Id: I99717072679a51deecd6934ce7fb4aeb45135cd6
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Reviewed-on: http://review.coreboot.org/10386
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org>
See http://review.coreboot.org/10386 for details.
-gerrit
the following patch was just integrated into master:
commit 53120a8d9caa84e087e6f5aad149413272ef96a9
Author: Furquan Shaikh <furquan(a)google.com>
Date: Thu May 28 11:32:46 2015 -0700
vboot: Increase max parsed fw components to 6
With addition of bl31 and trusty, we need to increase the number of
parsed fw components in vboot to 6.
CQ-DEPEND=CL:273866
BUG=chrome-os-partner:40713
BRANCH=None
TEST=Compiles successfully and vboot finds trusty and bl31.
Change-Id: I3597e98370bbaef4d2e563c868eed59b2e18adca
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 0ff87fdbc7779e6ee410905d1618281411b38a93
Original-Change-Id: Ia403f895b50cc5349bb700d01f62e13c679f68f4
Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/273865
Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: http://review.coreboot.org/10391
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan(a)google.com>
See http://review.coreboot.org/10391 for details.
-gerrit
the following patch was just integrated into master:
commit fde81099fa8db3de483f11e5d11dc0729145f4db
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sun May 31 12:05:35 2015 +0200
amd/torpedo: Remove stale ssdt*.asl
They're not referenced in the code anywhere.
Change-Id: I4805e11523ca7d3cffb484c719f479b7a6ba3e15
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/10384
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See http://review.coreboot.org/10384 for details.
-gerrit
the following patch was just integrated into master:
commit 2cb2978559b36e14c79fdf7cb016b73f7c60169d
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sun May 31 11:32:09 2015 +0200
SLIC: Check SLIC signature.
Change-Id: I79fd4d17b534274b1e84bc97ca5a2a6ee55e3114
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/10383
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See http://review.coreboot.org/10383 for details.
-gerrit
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9729
-gerrit
commit 03b68285cd9e72a3e6994d006f560d9e10428b80
Author: Julius Werner <jwerner(a)chromium.org>
Date: Fri Dec 19 16:11:14 2014 -0800
arm, arm64, mips: Add rough static stack size checks with -Wstack-usage
We've seen an increasing need to reduce stack sizes more and more for
space reasons, and it's always guesswork because no one has a good idea
how little is too litte. We now have boards with 3K and 2K stacks, and
old pieces of common code often allocate large temporary buffers that
would lead to very dangerous and hard to detect bugs when someone
eventually tries to use them on one of those.
This patch tries improve this situation at least a bit by declaring 2K
as the minimum stack size all of coreboot code should work with. It
checks all function frames with -Wstack-usage=1536 to make sure we don't
allocate more than 1.5K in a single buffer. This is of course not a
perfect test, but it should catch the most common situation of declaring
a single, large buffer in some close-to-leaf function (with the
assumption that 0.5K is hopefully enough for all the "normal" functions
above that).
Change one example where we were a bit overzealous and put a 1K buffer
into BSS back to stack allocation, since it actually conforms to this
new assumption and frees up another kilobyte of that highly sought-after
verstage space. Not touching x86 with any of this since it's lack of
__PRE_RAM__ BSS often requires it to allocate way more on the stack than
would usually be considered sane.
BRANCH=veyron
BUG=None
TEST=Compiled Cosmos, Daisy, Falco, Blaze, Pit, Storm, Urara and Pinky,
made sure they still build as well as before and don't show any stack
usage warnings.
Change-Id: Idc53d33bd8487bbef49d3ecd751914b0308006ec
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 8e5931066575e256dfc2295c3dab7f0e1b65417f
Original-Change-Id: I30bd9c2c77e0e0623df89b9e5bb43ed29506be98
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/236978
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/arch/arm/include/arch/memlayout.h | 4 +++-
src/arch/arm64/include/arch/memlayout.h | 4 +++-
src/arch/mips/include/arch/memlayout.h | 4 +++-
src/drivers/spi/spi_flash.c | 4 ++++
src/lib/gpio.c | 4 +++-
src/vendorcode/google/chromeos/vboot2/verstage.c | 2 +-
toolchain.inc | 26 ++++++++++++++++--------
7 files changed, 35 insertions(+), 13 deletions(-)
diff --git a/src/arch/arm/include/arch/memlayout.h b/src/arch/arm/include/arch/memlayout.h
index b28e0cf..86f5585 100644
--- a/src/arch/arm/include/arch/memlayout.h
+++ b/src/arch/arm/include/arch/memlayout.h
@@ -35,7 +35,9 @@
"TTB subtable region must be evenly divisible by table size!");
/* ARM stacks need 8-byte alignment and stay in one place through ramstage. */
-#define STACK(addr, size) REGION(stack, addr, size, 8)
+#define STACK(addr, size) \
+ REGION(stack, addr, size, 8) \
+ _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
#define DMA_COHERENT(addr, size) \
REGION(dma_coherent, addr, size, SUPERPAGE_SIZE) \
diff --git a/src/arch/arm64/include/arch/memlayout.h b/src/arch/arm64/include/arch/memlayout.h
index 522f1ab..30db848 100644
--- a/src/arch/arm64/include/arch/memlayout.h
+++ b/src/arch/arm64/include/arch/memlayout.h
@@ -27,7 +27,9 @@
/* ARM64 stacks need 16-byte alignment. The ramstage will set up its own stacks
* in BSS, so this is only used for the SRAM stages. */
#ifdef __PRE_RAM__
-#define STACK(addr, size) REGION(stack, addr, size, 16)
+#define STACK(addr, size) \
+ REGION(stack, addr, size, 16) \
+ _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
#else
#define STACK(addr, size) REGION(preram_stack, addr, size, 16)
#endif
diff --git a/src/arch/mips/include/arch/memlayout.h b/src/arch/mips/include/arch/memlayout.h
index 9493173..946fcf3 100644
--- a/src/arch/mips/include/arch/memlayout.h
+++ b/src/arch/mips/include/arch/memlayout.h
@@ -24,7 +24,9 @@
/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */
/* TODO: Double-check that that's the correct alignment for our ABI. */
-#define STACK(addr, size) REGION(stack, addr, size, 8)
+#define STACK(addr, size) \
+ REGION(stack, addr, size, 8) \
+ _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K)
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index b0558bb..9b6d4ec 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -94,6 +94,9 @@ static int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
return ret;
}
+/* TODO: This code is quite possibly broken and overflowing stacks. Fix ASAP! */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstack-usage="
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
const void *data, size_t data_len)
{
@@ -110,6 +113,7 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
return ret;
}
+#pragma GCC diagnostic pop
static int spi_flash_cmd_read_array(struct spi_slave *spi, u8 *cmd,
size_t cmd_len, u32 offset,
diff --git a/src/lib/gpio.c b/src/lib/gpio.c
index b185cc2..72bd7ec 100644
--- a/src/lib/gpio.c
+++ b/src/lib/gpio.c
@@ -17,6 +17,7 @@
* Foundation, Inc.
*/
+#include <assert.h>
#include <base3.h>
#include <console/console.h>
#include <delay.h>
@@ -53,7 +54,8 @@ int gpio_base3_value(gpio_t gpio[], int num_gpio)
int temp;
int index;
int result = 0;
- char value[num_gpio];
+ char value[32];
+ assert(num_gpio <= 32);
/* Enable internal pull up */
for (index = 0; index < num_gpio; ++index)
diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c
index bc7846a..1e653d0 100644
--- a/src/vendorcode/google/chromeos/vboot2/verstage.c
+++ b/src/vendorcode/google/chromeos/vboot2/verstage.c
@@ -119,7 +119,7 @@ static int hash_body(struct vb2_context *ctx, struct region_device *fw_main)
{
uint64_t load_ts;
uint32_t expected_size;
- MAYBE_STATIC uint8_t block[TODO_BLOCK_SIZE];
+ uint8_t block[TODO_BLOCK_SIZE];
size_t block_size = sizeof(block);
size_t offset;
int rv;
diff --git a/toolchain.inc b/toolchain.inc
index e089f2e..0f56080 100644
--- a/toolchain.inc
+++ b/toolchain.inc
@@ -61,16 +61,26 @@ ARCHDIR-arm64 := arm64
ARCHDIR-riscv := riscv
ARCHDIR-mips := mips
-CFLAGS_arm := -ffunction-sections -fdata-sections
-
-CFLAGS_arm64 := -ffunction-sections -fdata-sections
-
-CFLAGS_mips := -mips32r2 -G 0 -ffunction-sections -fdata-sections
+CFLAGS_common += -ffunction-sections -fdata-sections
+
+# Some boards only provide 2K stacks, so storing lots of data there leads to
+# problems. Since C rules don't allow us to statically determine the maximum
+# stack use, we use 1.5K as heuristic, assuming that we typically have lots
+# of tiny stack frames and the odd large one.
+#
+# Store larger buffers in BSS, use MAYBE_STATIC to share code with __PRE_RAM__
+# on x86.
+# Since GCCs detection of dynamic array bounds unfortunately seems to be
+# very basic, you'll sometimes have to use a static upper bound for the
+# size and an assert() to make sure it's honored (see gpio_base3_value()
+# for an example).
+# (If you absolutely need a larger stack frame and are 100% sure it cannot
+# cause problems, you can whitelist it with #pragma diagnostic.)
+CFLAGS_common += -Wstack-usage=1536
+
+CFLAGS_mips := -mips32r2 -G 0
CFLAGS_mips += -mno-abicalls -fno-pic
-CFLAGS_x86_32 += -ffunction-sections -fdata-sections
-CFLAGS_riscv := -ffunction-sections -fdata-sections
-
toolchain_to_dir = \
$(foreach arch,$(ARCH_SUPPORTED),\
$(eval CPPFLAGS_$(arch) += \
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10394
-gerrit
commit 67c419e3198be146fd7059c88ff22459c74b8863
Author: Julius Werner <jwerner(a)chromium.org>
Date: Fri May 22 16:26:40 2015 -0700
lib: Unify log2() and related functions
This patch adds a few bit counting functions that are commonly needed
for certain register calculations. We previously had a log2()
implementation already, but it was awkwardly split between some C code
that's only available in ramstage and an optimized x86-specific
implementation in pre-RAM that prevented other archs from pulling it
into earlier stages.
Using __builtin_clz() as the baseline allows GCC to inline optimized
assembly for most archs (including CLZ on ARM/ARM64 and BSR on x86), and
to perform constant-folding if possible. What was previously named log2f
on pre-RAM x86 is now ffs, since that's the standard name for that
operation and I honestly don't have the slightest idea how it could've
ever ended up being called log2f (which in POSIX is 'binary(2) LOGarithm
with Float result, whereas the Find First Set operation has no direct
correlation to logarithms that I know of). Make ffs result 0-based
instead of the POSIX standard's 1-based since that is consistent with
clz, log2 and the former log2f, and generally closer to what you want
for most applications (a value that can directly be used as a shift to
reach the found bit). Call it __ffs() instead of ffs() to avoid problems
when importing code, since that's what Linux uses for the 0-based
operation.
CQ-DEPEND=CL:273023
BRANCH=None
BUG=None
TEST=Built on Big, Falco, Jerry, Oak and Urara. Compared old and new
log2() and __ffs() results on Falco for a bunch of test values.
Change-Id: I599209b342059e17b3130621edb6b6bbeae26876
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 3701a16ae944ecff9c54fa9a50d28015690fcb2f
Original-Change-Id: I60f7cf893792508188fa04d088401a8bca4b4af6
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/273008
Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
payloads/libpayload/include/libpayload.h | 7 +++
payloads/libpayload/include/strings.h | 35 --------------
payloads/libpayload/libc/Makefile.inc | 4 +-
payloads/libpayload/libc/libgcc.c | 68 +++++++++++++++++++++++++++
payloads/libpayload/libc/strings.c | 42 -----------------
src/arch/arm/include/utils.h | 55 ----------------------
src/arch/x86/include/arch/io.h | 4 +-
src/include/lib.h | 18 ++++---
src/lib/Makefile.inc | 6 +--
src/lib/clog2.c | 37 ---------------
src/lib/libgcc.c | 56 ++++++++++++++++++++++
src/northbridge/amd/amdk8/coherent_ht.c | 1 +
src/northbridge/amd/amdk8/raminit.c | 5 +-
src/northbridge/amd/amdk8/raminit_f.c | 1 +
src/northbridge/amd/amdk8/raminit_test.c | 1 +
src/northbridge/intel/e7501/raminit.c | 1 +
src/northbridge/intel/i3100/raminit_ep80579.c | 1 +
src/northbridge/intel/i855/raminit.c | 1 +
src/northbridge/intel/i945/raminit.c | 1 +
src/soc/rockchip/rk3288/clock.c | 17 +------
src/southbridge/via/k8t890/traf_ctrl.c | 3 +-
21 files changed, 162 insertions(+), 202 deletions(-)
diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h
index 198f4f2..4670051 100644
--- a/payloads/libpayload/include/libpayload.h
+++ b/payloads/libpayload/include/libpayload.h
@@ -319,6 +319,13 @@ u8 bin2hex(u8 b);
u8 hex2bin(u8 h);
void hexdump(const void *memory, size_t length);
void fatal(const char *msg) __attribute__ ((noreturn));
+
+/* Count Leading Zeroes: clz(0) == 32, clz(0xf) == 28, clz(1 << 31) == 0 */
+static inline int clz(u32 x) { return x ? __builtin_clz(x) : sizeof(x) * 8; }
+/* Integer binary logarithm (rounding down): log2(0) == -1, log2(5) == 2 */
+static inline int log2(u32 x) { return sizeof(x) * 8 - clz(x) - 1; }
+/* Find First Set: __ffs(0xf) == 0, __ffs(0) == -1, __ffs(1 << 31) == 31 */
+static inline int __ffs(u32 x) { return log2(x & (u32)(-(s32)x)); }
/** @} */
diff --git a/payloads/libpayload/include/strings.h b/payloads/libpayload/include/strings.h
deleted file mode 100644
index 5beddc6..0000000
--- a/payloads/libpayload/include/strings.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2011 secunet Security Networks AG
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _STRINGS_H
-#define _STRINGS_H
-
-int ffs(int i);
-
-#endif
diff --git a/payloads/libpayload/libc/Makefile.inc b/payloads/libpayload/libc/Makefile.inc
index b4f75a6..272cda9 100644
--- a/payloads/libpayload/libc/Makefile.inc
+++ b/payloads/libpayload/libc/Makefile.inc
@@ -29,10 +29,10 @@
##
libc-$(CONFIG_LP_LIBC) += malloc.c printf.c console.c string.c
-libc-$(CONFIG_LP_LIBC) += memory.c ctype.c ipchecksum.c lib.c
+libc-$(CONFIG_LP_LIBC) += memory.c ctype.c ipchecksum.c lib.c libgcc.c
libc-$(CONFIG_LP_LIBC) += rand.c time.c exec.c
libc-$(CONFIG_LP_LIBC) += readline.c getopt_long.c sysinfo.c
-libc-$(CONFIG_LP_LIBC) += args.c strings.c
+libc-$(CONFIG_LP_LIBC) += args.c
libc-$(CONFIG_LP_LIBC) += strlcpy.c
libc-$(CONFIG_LP_LIBC) += qsort.c
libc-$(CONFIG_LP_LIBC) += hexdump.c
diff --git a/payloads/libpayload/libc/libgcc.c b/payloads/libpayload/libc/libgcc.c
new file mode 100644
index 0000000..86698d8
--- /dev/null
+++ b/payloads/libpayload/libc/libgcc.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <libpayload.h>
+
+/*
+ * Provide platform-independent backend implementation for __builtin_clz() in
+ * <libpayload.h> in case GCC does not have an assembly version for this arch.
+ */
+
+int __clzsi2(u32 a);
+int __clzsi2(u32 a)
+{
+ static const u8 four_bit_table[] = {
+ [0x0] = 4, [0x1] = 3, [0x2] = 2, [0x3] = 2,
+ [0x4] = 1, [0x5] = 1, [0x6] = 1, [0x7] = 1,
+ [0x8] = 0, [0x9] = 0, [0xa] = 0, [0xb] = 0,
+ [0xc] = 0, [0xd] = 0, [0xe] = 0, [0xf] = 0,
+ };
+ int r = 0;
+
+ if (!(a & (0xffff << 16))) {
+ r += 16;
+ a <<= 16;
+ }
+
+ if (!(a & (0xff << 24))) {
+ r += 8;
+ a <<= 8;
+ }
+
+ if (!(a & (0xf << 28))) {
+ r += 4;
+ a <<= 4;
+ }
+
+ return r + four_bit_table[a >> 28];
+}
diff --git a/payloads/libpayload/libc/strings.c b/payloads/libpayload/libc/strings.c
deleted file mode 100644
index 465ae4f..0000000
--- a/payloads/libpayload/libc/strings.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2011 secunet Security Networks AG
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <strings.h>
-
-int ffs(int i)
-{
- int count = 1;
- if (i == 0) return 0;
-
- while ((i & 1) != 1) {
- i>>=1;
- count++;
- }
- return count;
-}
diff --git a/src/arch/arm/include/utils.h b/src/arch/arm/include/utils.h
deleted file mode 100644
index 2482c6b..0000000
--- a/src/arch/arm/include/utils.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2010
- * Texas Instruments, <www.ti.com>
- * Aneesh V <aneesh(a)ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-#ifndef _UTILS_H_
-#define _UTILS_H_
-
-static inline s32 log_2_n_round_up(u32 n)
-{
- s32 log2n = -1;
- u32 temp = n;
-
- while (temp) {
- log2n++;
- temp >>= 1;
- }
-
- if (n & (n - 1))
- return log2n + 1; /* not power of 2 - round up */
- else
- return log2n; /* power of 2 */
-}
-
-static inline s32 log_2_n_round_down(u32 n)
-{
- s32 log2n = -1;
- u32 temp = n;
-
- while (temp) {
- log2n++;
- temp >>= 1;
- }
-
- return log2n;
-}
-
-#endif
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index ce94773..a83d1e0 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -175,7 +175,7 @@ static inline __attribute__((always_inline)) void write32(volatile void *addr, u
/* Conflicts with definition in lib.h */
#if defined(__ROMCC__) || defined(__SMM__)
-static inline int log2(int value)
+static inline int log2(u32 value)
{
unsigned int r = 0;
__asm__ volatile (
@@ -190,7 +190,7 @@ static inline int log2(int value)
#endif
#if defined(__PRE_RAM__) || defined(__SMM__)
-static inline int log2f(int value)
+static inline int __ffs(u32 value)
{
unsigned int r = 0;
__asm__ volatile (
diff --git a/src/include/lib.h b/src/include/lib.h
index 7ad33dd..b81b1b1 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -24,12 +24,6 @@
#include <stdint.h>
#include <types.h>
-#if !defined(__ROMCC__) /* Conflicts with inline function in arch/io.h */
-/* Defined in src/lib/clog2.c */
-unsigned long log2(unsigned long x);
-#endif
-unsigned long log2_ceil(unsigned long x);
-
/* Defined in src/lib/lzma.c */
unsigned long ulzma(unsigned char *src, unsigned char *dst);
@@ -49,4 +43,16 @@ int checkstack(void *top_of_stack, int core);
void hexdump(const void *memory, size_t length);
void hexdump32(char LEVEL, const void *d, size_t len);
+#if !defined(__ROMCC__)
+/* Count Leading Zeroes: clz(0) == 32, clz(0xf) == 28, clz(1 << 31) == 0 */
+static inline int clz(u32 x) { return x ? __builtin_clz(x) : sizeof(x) * 8; }
+/* Integer binary logarithm (rounding down): log2(0) == -1, log2(5) == 2 */
+static inline int log2(u32 x) { return sizeof(x) * 8 - clz(x) - 1; }
+/* Find First Set: __ffs(1) == 0, __ffs(0) == -1, __ffs(1<<31) == 31 */
+static inline int __ffs(u32 x) { return log2(x & (u32)(-(s32)x)); }
+#endif
+
+/* Integer binary logarithm (rounding up): log2_ceil(0) == -1, log2(5) == 3 */
+static inline int log2_ceil(u32 x) { return (x == 0) ? -1 : log2(x * 2 - 1); }
+
#endif /* __LIB_H__ */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 5ec9de7..4f7fe9b 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -22,7 +22,7 @@ bootblock-y += prog_ops.c
bootblock-y += cbfs.c cbfs_core.c
bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
bootblock-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
-
+bootblock-y += libgcc.c
bootblock-$(CONFIG_GENERIC_UDELAY) += timer.c
bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -40,6 +40,7 @@ verstage-y += cbfs.c
verstage-y += cbfs_core.c
verstage-y += halt.c
verstage-y += fmap.c
+verstage-y += libgcc.c
verstage-y += memcmp.c
verstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
verstage-y += region.c
@@ -69,6 +70,7 @@ romstage-$(CONFIG_I2C_TPM) += delay.c
romstage-y += cbfs.c cbfs_core.c
romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c
+romstage-y += libgcc.c
romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c
ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c
romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c
@@ -104,8 +106,6 @@ ramstage-y += cbfs.c cbfs_core.c
ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
ramstage-y += lzma.c lzmadecode.c
ramstage-y += stack.c
-ramstage-y += clog2.c
-romstage-y += clog2.c
ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
ramstage-$(CONFIG_TRACE) += trace.c
diff --git a/src/lib/clog2.c b/src/lib/clog2.c
deleted file mode 100644
index 5e0d591..0000000
--- a/src/lib/clog2.c
+++ /dev/null
@@ -1,37 +0,0 @@
-#include <console/console.h>
-#include <lib.h>
-
-/* Assume 8 bits per byte */
-#define CHAR_BIT 8
-
-unsigned long log2(unsigned long x)
-{
- /* assume 8 bits per byte. */
- unsigned long pow = sizeof(x) * CHAR_BIT - 1ULL;
- unsigned long i = 1ULL << pow;
-
- if (!x) {
- printk(BIOS_WARNING, "%s called with invalid parameter of 0\n",
- __func__);
- return -1;
- }
-
- for (; i > x; i >>= 1, pow--);
-
- return pow;
-}
-
-unsigned long log2_ceil(unsigned long x)
-{
- unsigned long pow;
-
- if (!x)
- return -1;
-
- pow = log2(x);
-
- if (x > (1ULL << pow))
- pow++;
-
- return pow;
-}
diff --git a/src/lib/libgcc.c b/src/lib/libgcc.c
new file mode 100644
index 0000000..6ce7ae5
--- /dev/null
+++ b/src/lib/libgcc.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#include <types.h>
+
+/*
+ * Provide platform-independent backend implementation for __builtin_clz() in
+ * <lib.h> in case GCC does not have an assembly version for this arch.
+ */
+
+#if !IS_ENABLED(CONFIG_ARCH_X86) /* work around lack of --gc-sections on x86 */
+int __clzsi2(u32 a);
+int __clzsi2(u32 a)
+{
+ static const u8 four_bit_table[] = {
+ [0x0] = 4, [0x1] = 3, [0x2] = 2, [0x3] = 2,
+ [0x4] = 1, [0x5] = 1, [0x6] = 1, [0x7] = 1,
+ [0x8] = 0, [0x9] = 0, [0xa] = 0, [0xb] = 0,
+ [0xc] = 0, [0xd] = 0, [0xe] = 0, [0xf] = 0,
+ };
+ int r = 0;
+
+ if (!(a & (0xffff << 16))) {
+ r += 16;
+ a <<= 16;
+ }
+
+ if (!(a & (0xff << 24))) {
+ r += 8;
+ a <<= 8;
+ }
+
+ if (!(a & (0xf << 28))) {
+ r += 4;
+ a <<= 4;
+ }
+
+ return r + four_bit_table[a >> 28];
+}
+#endif
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index a8d8700..6554e07 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -66,6 +66,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/hypertransport_def.h>
+#include <lib.h>
#include <stdlib.h>
#include <arch/io.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 4213cfb..c58abb1 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -7,6 +7,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
+#include <lib.h>
#include <stdlib.h>
#include <arch/acpi.h>
#include <reset.h>
@@ -1655,7 +1656,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
/* if the next lower frequency gives a CL at least one whole cycle
* shorter, select that (see end of BKDG 4.1.1.1) */
if (freq < sizeof(cl_at_freq)-1 && cl_at_freq[freq+1] &&
- log2f(cl_at_freq[freq]) - log2f(cl_at_freq[freq+1]) >= 2)
+ __ffs(cl_at_freq[freq]) - __ffs(cl_at_freq[freq+1]) >= 2)
freq++;
if (freq == sizeof(cl_at_freq))
@@ -1690,7 +1691,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
/* Update DRAM Timing Low with our selected cas latency */
value = pci_read_config32(ctrl->f2, DRAM_TIMING_LOW);
value &= ~(DTL_TCL_MASK << DTL_TCL_SHIFT);
- value |= latencies[log2f(cl_at_freq[freq]) - 2] << DTL_TCL_SHIFT;
+ value |= latencies[__ffs(cl_at_freq[freq]) - 2] << DTL_TCL_SHIFT;
pci_write_config32(ctrl->f2, DRAM_TIMING_LOW, value);
result.dimm_mask = dimm_mask;
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index 1469684..1c1a6ea 100644
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -25,6 +25,7 @@
#include <cpu/x86/tsc.h>
#include <cpu/amd/mtrr.h>
+#include <lib.h>
#include <stdlib.h>
#include <arch/acpi.h>
#include "raminit.h"
diff --git a/src/northbridge/amd/amdk8/raminit_test.c b/src/northbridge/amd/amdk8/raminit_test.c
index be46f27..87e281d 100644
--- a/src/northbridge/amd/amdk8/raminit_test.c
+++ b/src/northbridge/amd/amdk8/raminit_test.c
@@ -1,5 +1,6 @@
#include <unistd.h>
#include <limits.h>
+#include <lib.h>
#include <stdint.h>
#include <string.h>
#include <setjmp.h>
diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c
index f4fc9a8..93a3a5b 100644
--- a/src/northbridge/intel/e7501/raminit.c
+++ b/src/northbridge/intel/e7501/raminit.c
@@ -12,6 +12,7 @@
/* converted to C 6/2004 yhlu */
#include <assert.h>
+#include <lib.h>
#include <spd.h>
#include <sdram_mode.h>
#include <stdlib.h>
diff --git a/src/northbridge/intel/i3100/raminit_ep80579.c b/src/northbridge/intel/i3100/raminit_ep80579.c
index 85660e9..ee8c4fd 100644
--- a/src/northbridge/intel/i3100/raminit_ep80579.c
+++ b/src/northbridge/intel/i3100/raminit_ep80579.c
@@ -22,6 +22,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/speedstep.h>
+#include <lib.h>
#include "raminit_ep80579.h"
#include "ep80579.h"
diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c
index 81dcbb5..a43f5be 100644
--- a/src/northbridge/intel/i855/raminit.c
+++ b/src/northbridge/intel/i855/raminit.c
@@ -19,6 +19,7 @@
*/
#include <assert.h>
+#include <lib.h>
#include <spd.h>
#include <sdram_mode.h>
#include <stdlib.h>
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index a3be680..7bd6240 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#include <lib.h>
#include <pc80/mc146818rtc.h>
#include <spd.h>
#include <string.h>
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index 2c56376..a2e8d88 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -21,6 +21,7 @@
#include <assert.h>
#include <console/console.h>
#include <delay.h>
+#include <lib.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/grf.h>
@@ -236,22 +237,6 @@ static int rkclk_set_pll(u32 *pll_con, const struct pll_div *div)
return 0;
}
-/*
- TODO:
- it should be replaced by lib.h function
- 'unsigned long log2(unsigned long x)'
-*/
-static unsigned int log2(unsigned int value)
-{
- unsigned int div = 0;
-
- while (value != 1) {
- div++;
- value = ALIGN_UP(value, 2) / 2;
- }
- return div;
-}
-
void rkclk_init(void)
{
u32 aclk_div;
diff --git a/src/southbridge/via/k8t890/traf_ctrl.c b/src/southbridge/via/k8t890/traf_ctrl.c
index b4620da..24c1e65 100644
--- a/src/southbridge/via/k8t890/traf_ctrl.c
+++ b/src/southbridge/via/k8t890/traf_ctrl.c
@@ -24,10 +24,9 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <cpu/amd/powernow.h>
+#include <lib.h>
#include "k8t890.h"
-extern unsigned long log2(unsigned long x);
-
static void mmconfig_set_resources(device_t dev)
{
struct resource *resource;
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10392
-gerrit
commit f51e62b54692fcdbdffd3935e1ca802186abf468
Author: Julius Werner <jwerner(a)chromium.org>
Date: Fri May 22 18:18:46 2015 -0700
libpayload: Add div_round_up() function
The lack of a div_round_up() function in libpayload keeps being a
problem for payloads and has already caused us to sprinkle numerous
less-readable ALIGN_UP(n, d) / d throughout depthcharge. Let's add this
so we can avoid adding any more and then maybe cocchinelle them all over
later.
BRANCH=None
BUG=None
TEST=None
Change-Id: I241a52770a0edcf7003b48a81875b3fa0cb7ed53
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: a3f9514f9cfd325cc3c4b542020574b605fac935
Original-Change-Id: Ia55bd4bc52ab8a249b4854e40727cf6917af7b30
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/273050
Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
payloads/libpayload/include/libpayload.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h
index 0be0d8e..781a41d 100644
--- a/payloads/libpayload/include/libpayload.h
+++ b/payloads/libpayload/include/libpayload.h
@@ -66,6 +66,8 @@
#define MAX(a,b) ((a) > (b) ? (a) : (b))
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+static inline u32 div_round_up(u32 n, u32 d) { return n + d - 1 / d; }
+
#define LITTLE_ENDIAN 1234
#define BIG_ENDIAN 4321