coreboot-gerrit June 2015

coreboot-gerrit@coreboot.org

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1226 discussions

New patch to review for coreboot: 7899aa9 3rdparty/blobs: Move submodule marker forward
by WANG Siyuan 03 Jun '15

03 Jun '15

WANG Siyuan (wangsiyuanbuaa(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10405 -gerrit commit 7899aa97d41aa84e52ea3d5c9b93c1b8ba200cfd Author: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Date: Wed Jun 3 15:59:38 2015 +0800 3rdparty/blobs: Move submodule marker forward Move the 3rdparty/blobs marker to include the following: 9077293: Add BLOBs to support AMD Embedded "Merlin Falcon" processor Change-Id: Icf6c5f38c4aa5e3620c567478b1903ea3f1152c1 Signed-off-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang(a)amd.com> --- 3rdparty/blobs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty/blobs b/3rdparty/blobs index a710941..9077293 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit a710941e436f4724d42aedfa7f6f12abc5eaff28 +Subproject commit 9077293152f19ff925957ce453bc81172ef8e45f

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New patch to review for coreboot: 7ca6a42 cpu/amd/car: Move AP stacks below the BSP stack to free up space
by Timothy Pearson 03 Jun '15

03 Jun '15

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10404 -gerrit commit 7ca6a42ff1e835f5a1f0e6e53d4c918668cd2ec4 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Jun 2 20:25:03 2015 -0500 cpu/amd/car: Move AP stacks below the BSP stack to free up space Caching SPD data during startup requires additional CAR space. There was a large chunk of free space between the AP stack top and the BSP stack bottom; moving the AP stacks below the BSP stack allows this space to be utilized. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: I370ff368affde7061d6547527bda058b9016e977 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/cpu/amd/car/cache_as_ram.inc | 4 ++-- src/cpu/amd/model_10xxx/init_cpus.c | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 51ebba6..5b80e332 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -377,7 +377,7 @@ CAR_FAM10_ap: /* * Need to set stack pointer for AP. * It will be from: - * CacheBase + CacheSize / 2 + * CacheBase + (CacheSize - CacheSizeBSPStack * 2) * - (NodeID << CoreIDbits + CoreID) * CacheSizeAPStack * So need to get the NodeID and CoreID at first. * If NB_CFG bit 54 is set just use initial APIC ID, otherwise need @@ -411,7 +411,7 @@ roll_cfg: /* Calculate stack pointer. */ movl $CacheSizeAPStack, %eax mull %ebx - movl $(CacheBase + CacheSize / 2), %esp + movl $(CacheBase + (CacheSize - CacheSizeBSPStack * 2)), %esp subl %eax, %esp /* Retrive init detected. */ diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index aa21f37..f13eda52 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -250,7 +250,8 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo) u32 apicid; struct node_core_id id; - void * lower_stack_region_boundary = (void*)((CONFIG_DCACHE_RAM_BASE + (CONFIG_DCACHE_RAM_SIZE / 2)) + void * lower_stack_region_boundary = (void*)((CONFIG_DCACHE_RAM_BASE + + (CONFIG_DCACHE_RAM_SIZE - (CONFIG_DCACHE_BSP_STACK_SIZE * 2))) - (CONFIG_MAX_CPUS * CONFIG_DCACHE_AP_STACK_SIZE)); if (((void*)(sysinfo+1)) > lower_stack_region_boundary) printk(BIOS_WARNING,

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Patch set updated for coreboot: 7e73877 cpu/amd/car: Increase Family 10h CAR size limit to 128k
by Timothy Pearson 03 Jun '15

03 Jun '15

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10402 -gerrit commit 7e7387771cc2103c239bc4b0c42e225b387959c2 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Jun 2 13:53:25 2015 -0500 cpu/amd/car: Increase Family 10h CAR size limit to 128k This resolves issues with 4-node (32-core) systems not having sufficient CAR memory available to boot. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: Ie884556edc5c85c2c908a8c6640eeec11594ba3a Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/cpu/amd/car/cache_as_ram.inc | 25 +++++++++++++++++++++++-- src/cpu/amd/car/disable_cache_as_ram.c | 7 +++++++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 1c22447..51ebba6 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -3,6 +3,7 @@ * * Copyright (C) 2005-2007 Advanced Micro Devices, Inc. * Copyright (C) 2008 Carl-Daniel Hailfinger + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -250,8 +251,14 @@ clear_fixed_var_mtrr_out: */ .endm -#if CacheSize > 0x10000 -#error Invalid CAR size, must be at most 64k. +#if IS_ENABLED(CONFIG_CPU_AMD_MODEL_10XXX) + #if CacheSize > 0x80000 + #error Invalid CAR size, must be at most 128k (processor limit is 512k). + #endif +#else + #if CacheSize > 0x10000 + #error Invalid CAR size, must be at most 64k. + #endif #endif #if CacheSize < 0x1000 #error Invalid CAR size, must be at least 4k. This is a processor limitation. @@ -267,6 +274,20 @@ clear_fixed_var_mtrr_out: wrmsr #endif +#if CacheSize > 0x10000 + /* Enable caching for 64K-96K using fixed MTRR. */ + movl $MTRRfix4K_D0000_MSR, %ecx + simplemask CacheSize, 0x10000 + wrmsr +#endif + +#if CacheSize > 0x18000 + /* Enable caching for 96K-128K using fixed MTRR. */ + movl $MTRRfix4K_D8000_MSR, %ecx + simplemask CacheSize, 0x18000 + wrmsr +#endif + /* Enable caching for 0-32K using fixed MTRR. */ movl $MTRRfix4K_C8000_MSR, %ecx simplemask CacheSize, 0 diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c index 4a86280..d3a3812 100644 --- a/src/cpu/amd/car/disable_cache_as_ram.c +++ b/src/cpu/amd/car/disable_cache_as_ram.c @@ -4,6 +4,7 @@ * original idea yhlu 6.2005 (assembler code) * * Copyright (C) 2010 Rudolf Marek <r.marek(a)assembler.cz> + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -36,6 +37,12 @@ static inline __attribute__((always_inline)) void disable_cache_as_ram(void) #if CONFIG_DCACHE_RAM_SIZE > 0x8000 wrmsr(MTRRfix4K_C0000_MSR, msr); #endif +#if CONFIG_DCACHE_RAM_SIZE > 0x10000 + wrmsr(MTRRfix4K_D0000_MSR, msr); +#endif +#if CONFIG_DCACHE_RAM_SIZE > 0x18000 + wrmsr(MTRRfix4K_D8000_MSR, msr); +#endif /* disable fixed mtrr from now on, it will be enabled by ramstage again*/ msr = rdmsr(SYSCFG_MSR);

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Patch set updated for coreboot: b5aef12 cpu/amd/car: Increase Family 10h CAR size limit to 128k
by Timothy Pearson 03 Jun '15

03 Jun '15

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10402 -gerrit commit b5aef122aff84ee15ce9669305ac6f859200ff56 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Jun 2 13:53:25 2015 -0500 cpu/amd/car: Increase Family 10h CAR size limit to 128k This resolves issues with 4-node (32-core) systems not having sufficient CAR memory available to boot. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: Ie884556edc5c85c2c908a8c6640eeec11594ba3a Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/cpu/amd/car/cache_as_ram.inc | 25 +++++++++++++++++++++++-- src/cpu/amd/car/disable_cache_as_ram.c | 7 +++++++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 769e5cf..e563d67 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -3,6 +3,7 @@ * * Copyright (C) 2005-2007 Advanced Micro Devices, Inc. * Copyright (C) 2008 Carl-Daniel Hailfinger + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -249,8 +250,14 @@ clear_fixed_var_mtrr_out: */ .endm -#if CacheSize > 0x10000 -#error Invalid CAR size, must be at most 64k. +#if IS_ENABLED(CONFIG_CPU_AMD_MODEL_10XXX) + #if CacheSize > 0x80000 + #error Invalid CAR size, must be at most 128k (processor limit is 512k). + #endif +#else + #if CacheSize > 0x10000 + #error Invalid CAR size, must be at most 64k. + #endif #endif #if CacheSize < 0x1000 #error Invalid CAR size, must be at least 4k. This is a processor limitation. @@ -266,6 +273,20 @@ clear_fixed_var_mtrr_out: wrmsr #endif +#if CacheSize > 0x10000 + /* Enable caching for 64K-96K using fixed MTRR. */ + movl $MTRRfix4K_D0000_MSR, %ecx + simplemask CacheSize, 0x10000 + wrmsr +#endif + +#if CacheSize > 0x18000 + /* Enable caching for 96K-128K using fixed MTRR. */ + movl $MTRRfix4K_D8000_MSR, %ecx + simplemask CacheSize, 0x18000 + wrmsr +#endif + /* Enable caching for 0-32K using fixed MTRR. */ movl $MTRRfix4K_C8000_MSR, %ecx simplemask CacheSize, 0 diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c index 4a86280..d3a3812 100644 --- a/src/cpu/amd/car/disable_cache_as_ram.c +++ b/src/cpu/amd/car/disable_cache_as_ram.c @@ -4,6 +4,7 @@ * original idea yhlu 6.2005 (assembler code) * * Copyright (C) 2010 Rudolf Marek <r.marek(a)assembler.cz> + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -36,6 +37,12 @@ static inline __attribute__((always_inline)) void disable_cache_as_ram(void) #if CONFIG_DCACHE_RAM_SIZE > 0x8000 wrmsr(MTRRfix4K_C0000_MSR, msr); #endif +#if CONFIG_DCACHE_RAM_SIZE > 0x10000 + wrmsr(MTRRfix4K_D0000_MSR, msr); +#endif +#if CONFIG_DCACHE_RAM_SIZE > 0x18000 + wrmsr(MTRRfix4K_D8000_MSR, msr); +#endif /* disable fixed mtrr from now on, it will be enabled by ramstage again*/ msr = rdmsr(SYSCFG_MSR);

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Patch set updated for coreboot: c05af66 cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() API
by Marc Jones 02 Jun '15

02 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7878 -gerrit commit c05af66220975c87ae8dc43f7cf3f25bc062cded Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Jan 7 04:48:43 2015 +0200 cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() API Squashed and adjusted two changes from chromium.git. Covers CBMEM init for ROMTAGE and RAMSTAGE. cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API There are several use cases for performing a certain task when CBMEM is first set up (usually to migrate some data into it that was previously kept in BSS/SRAM/hammerspace), and unfortunately we handle each of them differently: timestamp migration is called explicitly from cbmem_initialize(), certain x86-chipset-specific tasks use the CAR_MIGRATION() macro to register a hook, and the CBMEM console is migrated through a direct call from romstage (on non-x86 and SandyBridge boards). This patch decouples the CAR_MIGRATION() hook mechanism from cache-as-RAM and rechristens it to CBMEM_INIT_HOOK(), which is a clearer description of what it really does. All of the above use cases are ported to this new, consistent model, allowing us to have one less line of boilerplate in non-CAR romstages. BRANCH=None BUG=None TEST=Built and booted on Nyan_Blaze and Falco with and without CONFIG_CBMEM_CONSOLE. Confirmed that 'cbmem -c' shows the full log after boot (and the resume log after S3 resume on Falco). Compiled for Parrot, Stout and Lumpy. Original-Change-Id: I1681b372664f5a1f15c3733cbd32b9b11f55f8ea Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/232612 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> cbmem: Extend hooks to ramstage, fix timestamp synching Commit 7dd5bbd71 (cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API) inadvertently broke ramstage timestamps since timestamp_sync() was no longer called there. Oops. This patch fixes the issue by extending the CBMEM_INIT_HOOK() mechanism to the cbmem_initialize() call in ramstage. The macro is split into explicit ROMSTAGE_/RAMSTAGE_ versions to make the behavior as clear as possible and prevent surprises (although just using a single macro and relying on the Makefiles to link an object into all appropriate stages would also work). This allows us to get rid of the explicit cbmemc_reinit() in ramstage (which I somehow accounted for in the last patch without realizing that timestamps work exactly the same way...), and replace the older and less flexible cbmem_arch_init() mechanism. Also added a size assertion for the pre-RAM CBMEM console to memlayout that could prevent a very unlikely buffer overflow I just noticed. BRANCH=None BUG=None TEST=Booted on Pinky and Falco, confirmed that ramstage timestamps once again show up. Compile-tested for Rambi and Samus. Original-Change-Id: If907266c3f20dc3d599b5c968ea5b39fe5c00e9c Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/233533 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Change-Id: I1be89bafacfe85cba63426e2d91f5d8d4caa1800 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> --- src/arch/arm/include/arch/early_variables.h | 1 - src/arch/arm64/include/arch/early_variables.h | 1 - src/arch/x86/boot/cbmem.c | 22 ---------------------- src/arch/x86/boot/gdt.c | 3 ++- src/arch/x86/include/arch/early_variables.h | 12 ------------ src/arch/x86/init/romstage.ld | 9 ++++----- src/cpu/x86/car.c | 18 +++--------------- src/drivers/usb/ehci_debug.c | 2 +- src/include/cbmem.h | 26 ++++++++++++++++++++++++++ src/include/console/cbmem_console.h | 6 ------ src/include/cpu/x86/gdt.h | 3 --- src/include/symbols.h | 4 ++++ src/include/timestamp.h | 2 -- src/lib/cbmem_common.c | 22 ++++++++++------------ src/lib/cbmem_console.c | 7 +++---- src/lib/ramstage.ld | 3 +++ src/lib/rmodule.ld | 3 +++ src/lib/romstage.ld | 4 ++++ src/lib/timestamp.c | 7 ++++--- src/soc/intel/baytrail/romstage/romstage.c | 2 +- src/soc/intel/broadwell/romstage/power_state.c | 2 +- src/soc/nvidia/tegra132/romstage.c | 2 -- 22 files changed, 69 insertions(+), 92 deletions(-) diff --git a/src/arch/arm/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h index 725650a..5e09448 100644 --- a/src/arch/arm/include/arch/early_variables.h +++ b/src/arch/arm/include/arch/early_variables.h @@ -22,7 +22,6 @@ #define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) diff --git a/src/arch/arm64/include/arch/early_variables.h b/src/arch/arm64/include/arch/early_variables.h index 725650a..5e09448 100644 --- a/src/arch/arm64/include/arch/early_variables.h +++ b/src/arch/arm64/include/arch/early_variables.h @@ -22,7 +22,6 @@ #define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index a9127d7..e279db9 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -20,12 +20,6 @@ #include <cbmem.h> #include <arch/acpi.h> -/* FIXME: Remove after CBMEM_INIT_HOOKS. */ -#include <arch/early_variables.h> -#include <cpu/x86/gdt.h> -#include <console/cbmem_console.h> -#include <timestamp.h> - #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) #if !defined(__PRE_RAM__) @@ -71,22 +65,6 @@ void *cbmem_top(void) #endif /* LATE_CBMEM_INIT */ -void cbmem_run_init_hooks(void) -{ - /* Migrate car.global_data. */ - car_migrate_variables(); - -#if !defined(__PRE_RAM__) - /* Relocate CBMEM console. */ - cbmemc_reinit(); - - /* Relocate timestamps stash. */ - timestamp_reinit(); - - move_gdt(); -#endif -} - /* Something went wrong, our high memory area got wiped */ void cbmem_fail_resume(void) { diff --git a/src/arch/x86/boot/gdt.c b/src/arch/x86/boot/gdt.c index 9d9517a..e13d3bc 100644 --- a/src/arch/x86/boot/gdt.c +++ b/src/arch/x86/boot/gdt.c @@ -32,7 +32,7 @@ struct gdtarg { /* Copy GDT to new location and reload it. * FIXME: We only do this for BSP CPU. */ -void move_gdt(void) +static void move_gdt(void) { void *newgdt; u16 num_gdt_bytes = (u32)&gdt_end - (u32)&gdt; @@ -55,3 +55,4 @@ void move_gdt(void) __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg)); printk(BIOS_DEBUG, "ok\n"); } +RAMSTAGE_CBMEM_INIT_HOOK(move_gdt) diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index bfb1201..d9f1cd7 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -29,13 +29,6 @@ asm(".previous"); #define CAR_GLOBAL __attribute__((used,section(".car.global_data#"))) #endif /* __clang__ */ -#define CAR_MIGRATE_ATTR __attribute__ ((used,section (".car.migrate"))) - -/* Call migrate_fn_() when CAR globals are migrated. */ -#define CAR_MIGRATE(migrate_fn_) \ - static void (* const migrate_fn_ ## _ptr)(void) CAR_MIGRATE_ATTR = \ - migrate_fn_; - /* Get the correct pointer for the CAR global variable. */ void *car_get_var_ptr(void *var); @@ -50,17 +43,12 @@ void *car_sync_var_ptr(void *var); #define car_set_var(var, val) \ do { car_get_var(var) = (val); } while(0) -/* Migrate the CAR variables to memory. */ -void car_migrate_variables(void); - #else #define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) -static inline void car_migrate_variables(void) { } #endif #endif diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld index ae7049b..74e665f 100644 --- a/src/arch/x86/init/romstage.ld +++ b/src/arch/x86/init/romstage.ld @@ -34,15 +34,14 @@ SECTIONS *(.text); *(.text.*); *(.rom.data); + . = ALIGN(4); + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; *(.rodata); *(.rodata.*); *(.rom.data.*); . = ALIGN(16); - _car_migrate_start = .; - KEEP(*(.car.migrate)); - LONG(0); - _car_migrate_end = .; - . = ALIGN(16); _erom = .; } diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index 165a0e6..ffcf0db 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -136,21 +136,9 @@ static void do_car_migrate_variables(void) car_migrated = ~0; } -static void do_car_migrate_hooks(void) +static void car_migrate_variables(void) { - car_migration_func_t *migrate_func; - /* Call all the migration functions. */ - migrate_func = &_car_migrate_start; - while (*migrate_func != NULL) { - (*migrate_func)(); - migrate_func++; - } -} - -void car_migrate_variables(void) -{ - if (!IS_ENABLED(PLATFORM_USES_FSP1_0)) + if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE) && !IS_ENABLED(PLATFORM_USES_FSP1_0)) do_car_migrate_variables(); - - do_car_migrate_hooks(); } +ROMSTAGE_CBMEM_INIT_HOOK(car_migrate_variables) diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 68fd0fa..a6de8b2 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -682,7 +682,7 @@ static void migrate_ehci_debug(void) memcpy(dbg_info_cbmem, dbg_info, sizeof(*dbg_info)); car_set_var(glob_dbg_info_p, dbg_info_cbmem); } -CAR_MIGRATE(migrate_ehci_debug); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_ehci_debug); #endif int dbgp_ep_is_active(struct dbgp_pipe *pipe) diff --git a/src/include/cbmem.h b/src/include/cbmem.h index afee873..7248c71 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -21,6 +21,11 @@ #ifndef _CBMEM_H_ #define _CBMEM_H_ +/* Use "" and not <> include type, so that the cbmem util include search + * path will work with system includes. + */ +#include "rules.h" + #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \ ! IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) #define HIGH_MEMORY_SAVE (CONFIG_RAMTOP - CONFIG_RAMBASE) @@ -197,6 +202,7 @@ void *cbmem_add(u32 id, u64 size); /* Find a cbmem entry of a given id. These return NULL on failure. */ void *cbmem_find(u32 id); +typedef void (* const cbmem_init_hook_t)(void); void cbmem_run_init_hooks(void); void cbmem_fail_resume(void); @@ -207,6 +213,26 @@ void cbmem_add_bootmem(void); void cbmem_list(void); #endif /* __PRE_RAM__ */ +#if ENV_RAMSTAGE +#define ROMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused_ __attribute__((unused)) = init_fn_; +#define RAMSTAGE_CBMEM_INIT_HOOK(init_fn_) \ + static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used, \ + section(".rodata.cbmem_init_hooks"))) = init_fn_; +#elif ENV_ROMSTAGE +#define ROMSTAGE_CBMEM_INIT_HOOK(init_fn_) \ + static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used, \ + section(".rodata.cbmem_init_hooks"))) = init_fn_; +#define RAMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused_ __attribute__((unused)) = init_fn_; +#else +#define ROMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused_ __attribute__((unused)) = init_fn_; +#define RAMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused2_ __attribute__((unused)) = init_fn_; +#endif /* ENV_RAMSTAGE */ + + /* These are for compatibility with old boards only. Any new chipset and board * must implement cbmem_top() for both romstage and ramstage to support * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index e9ec66e..06013f2 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -25,12 +25,6 @@ void cbmemc_init(void); void cbmemc_tx_byte(unsigned char data); -#if CONFIG_CONSOLE_CBMEM -void cbmemc_reinit(void); -#else -static inline void cbmemc_reinit(void) {} -#endif - #define __CBMEM_CONSOLE_ENABLE__ CONFIG_CONSOLE_CBMEM && \ (ENV_RAMSTAGE || (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) && \ (ENV_ROMSTAGE || (ENV_BOOTBLOCK && CONFIG_BOOTBLOCK_CONSOLE)))) diff --git a/src/include/cpu/x86/gdt.h b/src/include/cpu/x86/gdt.h index 8525a3c..a96b0e4 100644 --- a/src/include/cpu/x86/gdt.h +++ b/src/include/cpu/x86/gdt.h @@ -28,7 +28,4 @@ extern char _secondary_gdt_addr[]; extern char _secondary_start[]; extern char _secondary_start_end[]; -/* Defined in src/arch/x86/boot/gdt.c */ -void move_gdt(void); - #endif /* CPU_X86_GDT */ diff --git a/src/include/symbols.h b/src/include/symbols.h index b47c886..0c53cd6 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -34,6 +34,10 @@ extern u8 _epreram_cbmem_console[]; #define _preram_cbmem_console_size \ (_epreram_cbmem_console - _preram_cbmem_console) +extern u8 _cbmem_init_hooks[]; +extern u8 _ecbmem_init_hooks[]; +#define _cbmem_init_hooks_size (_ecbmem_init_hooks - _cbmem_init_hooks) + extern u8 _stack[]; extern u8 _estack[]; #define _stack_size (_estack - _stack) diff --git a/src/include/timestamp.h b/src/include/timestamp.h index d9afeea..a248ea4 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -92,12 +92,10 @@ enum timestamp_id { void timestamp_init(uint64_t base); void timestamp_add(enum timestamp_id id, uint64_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_reinit(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_reinit() #endif /* Implemented by the architecture code */ diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index e9beb5f..496bafa 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -20,30 +20,28 @@ #include <cbmem.h> #include <bootstate.h> #include <rules.h> +#include <symbols.h> #if IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) #include <arch/acpi.h> #endif -/* FIXME: Remove after CBMEM_INIT_HOOKS. */ -#include <console/cbmem_console.h> -#include <timestamp.h> - - -/* FIXME: Replace with CBMEM_INIT_HOOKS API. */ -#if !IS_ENABLED(CONFIG_ARCH_X86) void cbmem_run_init_hooks(void) { - /* Relocate CBMEM console. */ - cbmemc_reinit(); + cbmem_init_hook_t *init_hook_ptr = (cbmem_init_hook_t*) &_cbmem_init_hooks; + cbmem_init_hook_t *einit_hook_ptr = (cbmem_init_hook_t*) &_ecbmem_init_hooks; - /* Relocate timestamps stash. */ - timestamp_reinit(); + if (_cbmem_init_hooks_size == 0) + return; + + while (init_hook_ptr != einit_hook_ptr) { + (*init_hook_ptr)(); + init_hook_ptr++; + } } void __attribute__((weak)) cbmem_fail_resume(void) { } -#endif #if ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) static void init_cbmem_post_device(void *unused) diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index e9607f3..4866454 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -208,7 +208,7 @@ static void copy_console_buffer(struct cbmem_console *old_cons_p, new_cons_p->buffer_cursor = cursor; } -void cbmemc_reinit(void) +static void cbmemc_reinit(void) { struct cbmem_console *cbm_cons_p; const size_t size = CONFIG_CONSOLE_CBMEM_BUFFER_SIZE; @@ -233,6 +233,8 @@ void cbmemc_reinit(void) init_console_ptr(cbm_cons_p, size, flags); } +ROMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit) +RAMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit) #if IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART) void cbmem_dump_console(void) @@ -249,6 +251,3 @@ void cbmem_dump_console(void) uart_tx_byte(0, cbm_cons_p->buffer_body[cursor]); } #endif - -/* Call cbmemc_reinit() at CAR migration time. */ -CAR_MIGRATE(cbmemc_reinit) diff --git a/src/lib/ramstage.ld b/src/lib/ramstage.ld index 30b18a7..402f495 100644 --- a/src/lib/ramstage.ld +++ b/src/lib/ramstage.ld @@ -64,6 +64,9 @@ LONG(0); LONG(0); _bs_init_end = .; + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; *(.rodata) *(.rodata.*) diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld index 70a2d3d..0e9c880 100644 --- a/src/lib/rmodule.ld +++ b/src/lib/rmodule.ld @@ -55,6 +55,9 @@ SECTIONS LONG(0); LONG(0); _bs_init_end = .; + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; . = ALIGN(8); diff --git a/src/lib/romstage.ld b/src/lib/romstage.ld index 34e76c0..7d552a7 100644 --- a/src/lib/romstage.ld +++ b/src/lib/romstage.ld @@ -29,6 +29,10 @@ } : to_load .data . : { + . = ALIGN(8); + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; *(.rodata); *(.rodata.*); *(.data); diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 8c82649..3b886b6 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -157,7 +157,7 @@ void timestamp_init(uint64_t base) #endif } -void timestamp_reinit(void) +static void timestamp_reinit(void) { if (!timestamp_should_run()) return; @@ -172,8 +172,9 @@ void timestamp_reinit(void) timestamp_do_sync(); } -/* Call timestamp_reinit at CAR migration time. */ -CAR_MIGRATE(timestamp_reinit) +/* Call timestamp_reinit CBMEM init hooks. */ +ROMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) +RAMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) /* Provide default timestamp implementation using monotonic timer. */ uint64_t __attribute__((weak)) timestamp_get(void) diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index a32db02..3f35bde 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -158,7 +158,7 @@ static void migrate_power_state(void) } memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); } -CAR_MIGRATE(migrate_power_state); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) static struct chipset_power_state *fill_power_state(void) { diff --git a/src/soc/intel/broadwell/romstage/power_state.c b/src/soc/intel/broadwell/romstage/power_state.c index 22ec8a6..ce52b49 100644 --- a/src/soc/intel/broadwell/romstage/power_state.c +++ b/src/soc/intel/broadwell/romstage/power_state.c @@ -50,7 +50,7 @@ static void migrate_power_state(void) } memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); } -CAR_MIGRATE(migrate_power_state); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) /* Return 0, 3, or 5 to indicate the previous sleep state. */ static int prev_sleep_state(struct chipset_power_state *ps) diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c index fedc1d4..6476e06 100644 --- a/src/soc/nvidia/tegra132/romstage.c +++ b/src/soc/nvidia/tegra132/romstage.c @@ -76,8 +76,6 @@ void romstage(void) romstage_mainboard_init(); - cbmemc_reinit(); - run_ramstage(); }

1 0

Patch merged into coreboot/master: a4cf83d cbfs: Fix mismerge.
by gerrit＠coreboot.org 02 Jun '15

02 Jun '15

the following patch was just integrated into master: commit a4cf83df7a3ef3401e12ca3732cbe07294684d02 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue Jun 2 21:40:29 2015 +0200 cbfs: Fix mismerge. cbfs_get_file_content was replaced with cbfs_boot_map_with_leak but 36f8d27ea9f741e184b76b5f42d7f777f207edc0 failed to get it into account. Change-Id: I0c7840043b2ea6abaf8e70f4bf1a63c96aedebc1 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10403 Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/10403 for details. -gerrit

1 0

New patch to review for coreboot: b06ba1c cbfs: Fix mismerge.
by Vladimir Serbinenko 02 Jun '15

02 Jun '15

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10403 -gerrit commit b06ba1c3b2b35fe169f8aeaa61ff2622a5310cb0 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue Jun 2 21:40:29 2015 +0200 cbfs: Fix mismerge. cbfs_get_file_content was replaced with cbfs_boot_map_with_leak but 36f8d27ea9f741e184b76b5f42d7f777f207edc0 failed to get it into account. Change-Id: I0c7840043b2ea6abaf8e70f4bf1a63c96aedebc1 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/arch/x86/boot/acpi.c | 2 +- src/mainboard/amd/serengeti_cheetah/acpi_tables.c | 2 +- src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c | 2 +- src/mainboard/iwill/dk8_htx/acpi_tables.c | 2 +- util/autoport/readme.md | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index 03d40d0..f0e56ea 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -757,7 +757,7 @@ unsigned long write_acpi_tables(unsigned long start) if (fw) return fw; - dsdt_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + dsdt_file = cbfs_boot_map_with_leak( CONFIG_CBFS_PREFIX "/dsdt.aml", CBFS_TYPE_RAW, &dsdt_size); if (!dsdt_file) { diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c index 14ef938..225f897 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c @@ -162,7 +162,7 @@ unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp default: continue; } - p = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + p = cbfs_boot_map_with_leak( file_name, CBFS_TYPE_RAW, &p_size); if (!p || p_size < sizeof(acpi_header_t)) diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c index cc932d2..ac021d0 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c @@ -168,7 +168,7 @@ unsigned long mainboard_write_acpi_tables(unsigned long current, //HTX no io apic file_name = CONFIG_CBFS_PREFIX "/ssdt5.aml"; } - p = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + p = cbfs_boot_map_with_leak( file_name, CBFS_TYPE_RAW, &p_size); if (!p || p_size < sizeof(acpi_header_t)) diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c index 834d1fe..5767878 100644 --- a/src/mainboard/iwill/dk8_htx/acpi_tables.c +++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c @@ -170,7 +170,7 @@ unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp file_name = CONFIG_CBFS_PREFIX "/ssdt5.aml"; break; } - p = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + p = cbfs_boot_map_with_leak( file_name, CBFS_TYPE_RAW, &p_size); if (!p || p_size < sizeof(acpi_header_t)) diff --git a/util/autoport/readme.md b/util/autoport/readme.md index 9a16fd2..35526f8 100644 --- a/util/autoport/readme.md +++ b/util/autoport/readme.md @@ -213,7 +213,7 @@ soldered and another is socketed: void *spd_file; size_t spd_file_len = 0; /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */ - spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", CBFS_TYPE_RAW, + spd_file = cbfs_boot_map_with_leak( "spd.bin", CBFS_TYPE_RAW, &spd_file_len); if (spd_file && spd_file_len >= 128) memcpy(&spd[0], spd_file, 128);

1 0

Patch merged into coreboot/master: 1aeea7f tpm: Add dummy _DSM to make Bitlocker happy.
by gerrit＠coreboot.org 02 Jun '15

02 Jun '15

the following patch was just integrated into master: commit 1aeea7fbdf252c95e1e3cdf45339a1430125f85d Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri May 22 08:01:37 2015 +0200 tpm: Add dummy _DSM to make Bitlocker happy. Change-Id: Ieb6f70f5b2863336bd6143b2dfbb1d67c4c26109 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10323 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10323 for details. -gerrit

1 0

Patch set updated for coreboot: 80f43a0 board_id: Remove extra quotes.
by Vladimir Serbinenko 02 Jun '15

02 Jun '15

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10382 -gerrit commit 80f43a05ee409cd4ab2b40eaa5a99077f74ba5b6 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat May 30 23:13:48 2015 +0200 board_id: Remove extra quotes. Kconfig already quotes the string. Double quoting actually removes the quoting. Change-Id: I927d90dc2ce8af4e8d2d700d2bb3e04254459e1b Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.inc b/Makefile.inc index 0c688f7..49e1ba3 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -639,7 +639,7 @@ board_id-file := $(obj)/board_id board_id-type := raw $(obj)/board_id: - printf "$(CONFIG_BOARD_ID_STRING)" > $@ + printf $(CONFIG_BOARD_ID_STRING) > $@ JENKINS_PAYLOAD=none what-jenkins-does:

1 0

Patch merged into coreboot/master: 36f8d27 Make DSDT a file in CBFS rather than embedding it into ramstage.
by gerrit＠coreboot.org 02 Jun '15

02 Jun '15

the following patch was just integrated into master: commit 36f8d27ea9f741e184b76b5f42d7f777f207edc0 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun May 31 12:31:59 2015 +0200 Make DSDT a file in CBFS rather than embedding it into ramstage. Makes it cleaner by putting AML into separate file rather than having an array in C code. Change-Id: Ia5d6b50ad9dabdb97ed05c837dc3ccc48b8f490f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10385 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10385 for details. -gerrit

1 0

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