coreboot-gerrit June 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: coreinfo: Use IS_ENABLED() to query Kconfig variables
by gerrit＠coreboot.org 30 Jun '15

30 Jun '15

the following patch was just integrated into master: commit 04fb7a81c1a08e3f4276dcdc489ea51238d36b2b Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Mon Jun 29 16:08:39 2015 -0700 coreinfo: Use IS_ENABLED() to query Kconfig variables This will make the code work with the different styles of Kconfig (emit unset bools vs don't emit unset bools) Roughly, the patch does this, and a little bit of fixing up: perl -pi -e 's,ifdef (CONFIG_.+?)\b,if IS_ENABLED$$1$,g' `find . -name *.[ch]` perl -pi -e 's,ifndef (CONFIG_.+?)\b,if !IS_ENABLED$$1$,g' `find . -name *.[ch]` Change-Id: Ia461a33541f58ff39e984119c44ece7e6c05608a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10713 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10713 for details. -gerrit

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New patch to review for coreboot: coreinfo: Fix build output (cosmetical)
by Stefan Reinauer 30 Jun '15

30 Jun '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10744 -gerrit commit 904a59fded912ed752cfdd14234e4d56c3e96127 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 15:22:12 2015 -0700 coreinfo: Fix build output (cosmetical) Change-Id: I6c3cdda7febc02bab9195fc98f46490c0d478a9a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/coreinfo/Makefile | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 3cc0fc9..37df8d8 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -41,9 +41,14 @@ UNAME_RELEASE := $(shell uname -r) HAVE_DOTCONFIG := $(wildcard .config) MAKEFLAGS += -rR --no-print-directory +ifneq ($(V),1) # Make is silent per default, but 'make V=1' will show all compiler calls. +Q:=@ +endif ifneq ($(V),1) -Q := @ +ifneq ($(Q),) +.SILENT: +endif endif HOSTCC ?= gcc @@ -72,18 +77,18 @@ include $(src)/.config all: $(TARGET) $(TARGET): $(src)/.config $(obj)/config.h $(OBJS) libpayload - $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" + $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@)) (LINK)\n" $(Q)$(LPCC) -o $@ $(OBJS) $(Q)$(OBJCOPY) --only-keep-debug $@ $(TARGET).debug $(Q)$(OBJCOPY) --strip-debug $@ $(Q)$(OBJCOPY) --add-gnu-debuglink=$(TARGET).debug $@ $(obj)/%.S.o: $(src)/%.S libpayload - $(Q)printf " LPAS $(subst $(shell pwd)/,,$(@))\n" + $(Q)printf " LPAS $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LPAS) -o $@ $< $(obj)/%.o: $(src)/%.c libpayload - $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" + $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LPCC) $(CFLAGS) -c -o $@ $< else

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Patch set updated for coreboot: coreinfo: use coreboot's kconfig
by Stefan Reinauer 30 Jun '15

30 Jun '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10715 -gerrit commit 8c7b3b8b93db32cdcfade10ba864b37c9fd02bdd Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Mon Jun 29 16:10:16 2015 -0700 coreinfo: use coreboot's kconfig Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Change-Id: I99e612dca3c2e5678d43b3e85eaf2f51d8f693e7 --- payloads/coreinfo/Makefile | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index a0e82d9..68aeffc 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -20,13 +20,19 @@ src := $(shell pwd) srctree := $(src) -srck := $(src)/util/kconfig +srck := $(src)/../../util/kconfig obj := $(src)/build objk := $(src)/build/util/kconfig export KERNELVERSION := 0.1.0 export KCONFIG_AUTOHEADER := $(obj)/config.h export KCONFIG_AUTOCONFIG := $(obj)/auto.conf +export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd +export KCONFIG_SPLITCONFIG := $(obj)/config +export KCONFIG_TRISTATE := $(obj)/tristate.conf +export KCONFIG_NEGATIVES := 1 +export Kconfig := Kconfig + export V := $(V) CONFIG_SHELL := sh @@ -65,7 +71,7 @@ ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config all: $(TARGET) -$(TARGET): $(src)/.config $(OBJS) prepare libpayload +$(TARGET): $(src)/.config $(OBJS) libpayload $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LPCC) -o $@ $(OBJS) $(Q)$(OBJCOPY) --only-keep-debug $@ $(TARGET).debug @@ -95,8 +101,7 @@ libpayload: $(Q)make -C $(LIBCONFIG_PATH) DESTDIR=$(shell pwd)/$(LIBPAYLOAD_DIR) install endif -prepare: - $(Q)mkdir -p $(obj)/util/kconfig/lxdialog +$(shell mkdir -p $(obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) clean: $(Q)rm -rf build/*.elf build/*.o @@ -105,6 +110,6 @@ distclean: clean $(Q)rm -rf build $(Q)rm -f .config .config.old ..config.tmp .kconfig.d .tmpconfig* -include util/kconfig/Makefile +include $(srck)/Makefile .PHONY: $(PHONY) prepare clean distclean

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Patch set updated for coreboot: coreinfo: fix compilation
by Stefan Reinauer 30 Jun '15

30 Jun '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10717 -gerrit commit 6e1b129241c0ed1b7bf6d4671b9f7a62eb191fa9 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Mon Jun 29 16:44:12 2015 -0700 coreinfo: fix compilation - extra rule for config.h creation - include kconfig.h from libpayload - libpayload symbols are conflicting with gcc builtins (e.g. log2) - ALIGN() is already defined in libpayload these days - move libpayload build directory under build/ Change-Id: I2aefdde26853253d58f6cf6e186e784871c1cb5b Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/coreinfo/Makefile | 11 +++++++---- payloads/coreinfo/cbfs_module.c | 2 -- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 68aeffc..3cc0fc9 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -52,15 +52,15 @@ HOSTCFLAGS := -I$(srck) -I$(objk) HOSTCXXFLAGS := -I$(srck) -I$(objk) LIBCONFIG_PATH := ../libpayload -LIBPAYLOAD_DIR := ./libpayloadbin +LIBPAYLOAD_DIR := build/libpayload LPCC := $(LIBPAYLOAD_DIR)/libpayload/bin/lpgcc LPAS := $(LIBPAYLOAD_DIR)/libpayload/bin/lpas HAVE_LIBPAYLOAD := $(wildcard $(LIBPAYLOAD_DIR)/libpayload/lib/libpayload.a) LIB_CONFIG ?= defconfig OBJCOPY ?= objcopy -INCLUDES = -I$(obj) -CFLAGS := -Wall -Werror -Os $(INCLUDES) +INCLUDES = -I$(obj) -include $(LIBPAYLOAD_DIR)/libpayload/include/kconfig.h +CFLAGS := -Wall -Werror -Os -fno-builtin $(INCLUDES) OBJECTS = cpuinfo_module.o cpuid.S.o pci_module.o coreboot_module.o \ nvram_module.o bootlog_module.o ramdump_module.o lar_module.o \ multiboot_module.o cbfs_module.o coreinfo.o @@ -71,7 +71,7 @@ ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config all: $(TARGET) -$(TARGET): $(src)/.config $(OBJS) libpayload +$(TARGET): $(src)/.config $(obj)/config.h $(OBJS) libpayload $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LPCC) -o $@ $(OBJS) $(Q)$(OBJCOPY) --only-keep-debug $@ $(TARGET).debug @@ -101,6 +101,9 @@ libpayload: $(Q)make -C $(LIBCONFIG_PATH) DESTDIR=$(shell pwd)/$(LIBPAYLOAD_DIR) install endif +$(obj)/config.h: + $(MAKE) oldconfig + $(shell mkdir -p $(obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) clean: diff --git a/payloads/coreinfo/cbfs_module.c b/payloads/coreinfo/cbfs_module.c index 2e6db28..8cb76a4 100644 --- a/payloads/coreinfo/cbfs_module.c +++ b/payloads/coreinfo/cbfs_module.c @@ -22,8 +22,6 @@ #if IS_ENABLED(CONFIG_MODULE_CBFS) -#define ALIGN(_v, _a) (((_v) + ((_a) - 1)) & ~((_a) - 1)) - #define HEADER_MAGIC 0x4F524243 #define HEADER_ADDR 0xfffffffc #define LARCHIVE_MAGIC 0x455649484352414cLL /* "LARCHIVE" */

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New patch to review for coreboot: x86 makefile: Use preprocessed linker files
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10743 -gerrit commit f037b7b489319b4ce6605404e020c43c5c099000 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Tue Jun 30 15:46:49 2015 -0600 x86 makefile: Use preprocessed linker files The top level Makefile runs the $stage-src .led scripts through the preprocessor and puts them in $(obj). Use the preprocessed .ld files and cat them together into x86 romstage_null.ld. Change-Id: If71240fbf7231df2b1333a1f8e5160cb8694f6ce Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> --- src/arch/x86/Makefile.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index dcb9ff0..a83d9c6 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -220,12 +220,12 @@ $(objcbfs)/romstage.debug: $$(romstage-objs) $(objgenerated)/romstage.ld $$(roms @printf " LINK $(subst $(obj)/,,$(@))\n" $(LD_romstage) --gc-sections -nostdlib -nostartfiles -static -o $@ -L$(obj) $(COMPILER_RT_FLAGS_romstage) --whole-archive --start-group $(filter-out %.ld,$(romstage-objs)) $(romstage-libs) --no-whole-archive $(COMPILER_RT_romstage) --end-group -T $(objgenerated)/romstage.ld --oformat $(romstage-oformat) -$(objgenerated)/romstage_null.ld: $(obj)/config.h $$(filter %.ld,$$(romstage-srcs)) +$(objgenerated)/romstage_null.ld: $(obj)/config.h $$(filter %.ld,$$(romstage-objs)) @printf " GEN $(subst $(obj)/,,$(@))\n" rm -f $@ printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp printf '$(foreach ldscript,$(^),#include "$(ldscript)"\n)' >> $@.tmp - $(CC_romstage) $(PREPROCESS_ONLY) $(CPPFLAGS_common) $@.tmp > $@ + $(CC_romstage) $(PREPROCESS_ONLY) $@.tmp > $@ $(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt

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New patch to review for coreboot: timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10742 -gerrit commit ccb017663ffea90c29f653d6e671a20ced876436 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Nov 6 09:58:07 2014 -0600 timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS Empty functions are provided when !CONFIG_COLLECT_TIMESTAMPS so stop guarding the compilation. BUG=None BRANCH=None TEST=Built Original-Change-Id: Ib0f23e1204e048a9b928568da02e9661f6aa0a35 Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/228190 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> (cherry picked from commit 9aa69fd43d77f5f7acdc9f361016c595dd16104e) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I14418c8ef3ccb57ac6fce05b422e1c21b1d38392 --- src/arch/x86/boot/acpi.c | 4 ---- src/mainboard/google/cosmos/romstage.c | 15 ++++----------- src/mainboard/google/veyron_brain/romstage.c | 11 +++-------- src/mainboard/google/veyron_danger/romstage.c | 11 +++-------- src/mainboard/google/veyron_jerry/romstage.c | 12 ++++-------- src/mainboard/google/veyron_mickey/romstage.c | 11 +++-------- src/mainboard/google/veyron_mighty/romstage.c | 11 +++-------- src/mainboard/google/veyron_pinky/romstage.c | 14 ++++++-------- src/mainboard/google/veyron_rialto/romstage.c | 11 +++-------- src/mainboard/google/veyron_romy/romstage.c | 11 +++-------- src/mainboard/google/veyron_speedy/romstage.c | 12 ++++-------- src/southbridge/intel/bd82x6x/bootblock.c | 3 +-- src/southbridge/intel/fsp_bd82x6x/bootblock.c | 3 +-- src/southbridge/intel/i82801gx/bootblock.c | 3 +-- src/southbridge/intel/lynxpoint/bootblock.c | 3 +-- 15 files changed, 40 insertions(+), 95 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index cf33e40..134e437 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -34,9 +34,7 @@ #include <cpu/x86/lapic_def.h> #include <cpu/cpu.h> #include <cbfs.h> -#if CONFIG_COLLECT_TIMESTAMPS #include <timestamp.h> -#endif #include <romstage_handoff.h> /* FIXME: Kconfig doesn't support overridable defaults :-( */ @@ -1124,9 +1122,7 @@ void acpi_jump_to_wakeup(void *vector) /* Copy wakeup trampoline in place. */ memcpy((void *)WAKEUP_BASE, &__wakeup, __wakeup_size); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_ACPI_WAKE_JUMP); -#endif acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE); diff --git a/src/mainboard/google/cosmos/romstage.c b/src/mainboard/google/cosmos/romstage.c index 0988bee..e5fa67e 100644 --- a/src/mainboard/google/cosmos/romstage.c +++ b/src/mainboard/google/cosmos/romstage.c @@ -37,37 +37,30 @@ void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS uint64_t start_romstage_time; uint64_t before_dram_time; uint64_t after_dram_time; uint64_t base_time = timestamp_get(); start_romstage_time = timestamp_get(); -#endif console_init(); -#if CONFIG_COLLECT_TIMESTAMPS before_dram_time = timestamp_get(); -#endif + sdram_init(); -#if CONFIG_COLLECT_TIMESTAMPS + after_dram_time = timestamp_get(); -#endif + mmu_init(); mmu_config_range(0, 4096, DCACHE_OFF); dcache_mmu_enable(); cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(base_time); timestamp_add(TS_START_ROMSTAGE, start_romstage_time); timestamp_add(TS_BEFORE_INITRAM, before_dram_time); timestamp_add(TS_AFTER_INITRAM, after_dram_time); -#endif - -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_brain/romstage.c +++ b/src/mainboard/google/veyron_brain/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c index 0328e95..e9857b8 100644 --- a/src/mainboard/google/veyron_danger/romstage.c +++ b/src/mainboard/google/veyron_danger/romstage.c @@ -80,9 +80,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -93,13 +91,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -109,9 +106,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c index 06eabe0..fb6e631 100644 --- a/src/mainboard/google/veyron_jerry/romstage.c +++ b/src/mainboard/google/veyron_jerry/romstage.c @@ -85,9 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -98,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -114,9 +111,8 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index 06eabe0..5ccbe3e 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -85,9 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -98,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -114,9 +111,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c index 5031ad9d..492c0f0 100644 --- a/src/mainboard/google/veyron_pinky/romstage.c +++ b/src/mainboard/google/veyron_pinky/romstage.c @@ -93,9 +93,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -106,13 +104,13 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -122,9 +120,9 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_END_ROMSTAGE); -#endif + run_ramstage(); } diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index ffdfdb0..9cdacc3 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -86,9 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -99,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -115,9 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_romy/romstage.c +++ b/src/mainboard/google/veyron_romy/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index ffdfdb0..07170b9 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -86,9 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -99,13 +97,13 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -115,9 +113,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 4df6bb5..18532df 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -86,9 +86,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/fsp_bd82x6x/bootblock.c b/src/southbridge/intel/fsp_bd82x6x/bootblock.c index 46aa58f..8f6ddbc 100644 --- a/src/southbridge/intel/fsp_bd82x6x/bootblock.c +++ b/src/southbridge/intel/fsp_bd82x6x/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c index 64c4410..dde1ae9 100644 --- a/src/southbridge/intel/i82801gx/bootblock.c +++ b/src/southbridge/intel/i82801gx/bootblock.c @@ -47,9 +47,8 @@ static void enable_spi_prefetch(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); /* Enable RCBA */ diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c index 6727173..8c2133b 100644 --- a/src/southbridge/intel/lynxpoint/bootblock.c +++ b/src/southbridge/intel/lynxpoint/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + map_rcba(); enable_spi_prefetch(); enable_port80_on_lpc();

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New patch to review for coreboot: documentation: Add documentation for timestamp library
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10741 -gerrit commit d636a46d9878e0e7c442cee31e4cfd7fe8eabe00 Author: Furquan Shaikh <furquan(a)google.com> Date: Fri Nov 14 11:57:00 2014 -0800 documentation: Add documentation for timestamp library BUG=chrome-os-partner:32973 BRANCH=None TEST=None Original-Change-Id: I4b184ffad6fcd93d63343a9bca34ad013e9d4263 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/229861 Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 97e2a3ebd9552c2a91d9ea62be515059428631cb) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I6ea7237f2fa749ce3a493f378f9937e642f3b678 --- documentation/timestamp_library.txt | 445 ++++++++++++++++++++++++++++++++++++ 1 file changed, 445 insertions(+) diff --git a/documentation/timestamp_library.txt b/documentation/timestamp_library.txt new file mode 100644 index 0000000..ef4f051 --- /dev/null +++ b/documentation/timestamp_library.txt @@ -0,0 +1,445 @@ +=========================== Table of Contents ================================== +Introduction + +Data structures used + cache_state + cbmem_state + table + entries + +Internal Functions + timestamp_cache_init + timestamp_cache_get + timestamp_alloc_cbmem_table + timestamp_table_get + timestamp_add_table_entry + +Function APIs + timestamp_early_init + timestamp_init + timestamp_add + timestamp_add_now + timestamp_sync + +Use / Test Cases + Case 1: Timestamp Region Exists + Case 2: No timestamp region, fresh boot, cbmem_initialize called after + timestamp_init + Case 3: No timestamp region, fresh boot, cbmem_initialize called before + timestamp_init + Case 4: No timestamp region, resume, cbmem_initialize called after + timestamp_init + Case 5: No timestamp region, resume, cbmem_initialize called before + timestamp_init + + +============================== Introduction ==================================== + + The aim of timestamp library is to make it easier for different boards +to save timestamps in cbmem / stash (until cbmem is brought up) by providing a +simple API to initalize, add and sync timestamps. In order to make the +timestamps persistent and accessible from the kernel, we need to ensure that all +the saved timestamps end up in cbmem area under the CBMEM_ID_TIMESTAMP +tag. However, until the cbmem area is available, the timestamps can be saved to +board/SOC-defined _timestamp region or in a local stage-specific stash. The work +of identifying the right location for storing timestamps is done by the library +and is not exposed to the user. + + Working of timestamp library from a user perspective can be outlined in +the following steps: +1. Initialize the _timestamp cache (if any used) +2. Initialize the base time and reset cbmem timestamp area +3. Start adding timestamps + + Steps 1) and 2) above can be performed in a single API call as explained +in later sections. Behind the scenes, the timestamp library takes care of: +1. Identifying the correct location for storing timestamps (cbmem or _timestamp +region or local stash). +2. Once cbmem is up, ensure that all timestamps are synced from _timestamp +region or local stash into the cbmem area. +3. Add a new cbmem timestamp area based on whether a reset of cbmem timestamp +region is required / not. + +========================== Data structures used ================================ + + The main structure that maintains information about the timestamp cache +is: +struct __attribute__((__packed__)) timestamp_cache { + uint16_t cache_state; + uint16_t cbmem_state; + struct timestamp_table table; + struct timestamp_entry entries[MAX_TIMESTAMP_CACHE]; +}; + +1. cache_state + The state of the cache is maintained by cache_state attribute which can +be any one of the following: + +enum { + TIMESTAMP_CACHE_UNINITIALIZED = 0, + TIMESTAMP_CACHE_INITIALIZED, + TIMESTAMP_CACHE_NOT_NEEDED, +}; + + By default, if the cache is stored in local stash (bss area), then it +will be reset to uninitialized state. However, if the cache is stored in +_timestamp region, then it might have garbage in any of the attributes. Thus, if +_timestamp region is being used by any board, it is important to call +timestamp_early_init which provides the initialization of timestamp cache. + + Once the cache is initialized, its state is set to +cache_initialized. Henceforth, the calls to cache i.e. timestamp_add know that +the state reflected is valid and timestamps can be directly saved in the cache. + + When cbmem area is up (i.e. call to cbmem_initialize), we do not need to +store the timestamps in local stash / _timestamp area anymore. Thus, the cache +state is set to cache_not_needed, which allows timestamp_add to store all +timestamps directly into cbmem area. + + +2. cbmem_state + This attribute indicates if we need to reset the timestamp area in +cbmem. This needs to be done for fresh boot (when there is no timestamp area +allocated in cbmem) or during resume (to clean out timestamps from earlier +boot). This can be set to any one of the following values: + +enum { + TIMESTAMP_CBMEM_RESET_NOT_REQD = 0, + TIMESTAMP_CBMEM_RESET_REQD, +}; + + If _timestamp region is being used, the call to timestamp_early_init +sets this field to reset_reqd. If this region is not being used, then instead +the call to timestamp_init sets this field to reset_reqd. Thus, when cbmem +initialization is complete, the timestamp library ensures that the cbmem +timestamp area is properly set as per the value of this attribute and resets +this field to reset_not_reqd. In case of resume path, this field would be set +accordingly by timestamp_early_init / timestamp_init thus ensuring that +timestamps from earlier boot dont float around into current boot logs. Also, +during early ramstage, when cbmem is not yet up, local stash would be used which +is in the bss area and thus this field is set to reset_not_reqd (unless +timestamp_init is called before or after cbmem_intiialize). Hence, when ramstage +brings up cbmem and syncs timestamps, the cbmem timestamp area is not reset. If +ramstage is the first stage where timestamp_init is called, then the cbmem area +is accordingly reset in timestamp_sync or timestamp_init based on the order in +which calls are made. Details are explained in the use cases towards the end. + + +3. table + This field is represented by a structure which provides overall +information about the entries in the timestamp area: + +struct timestamp_table { + uint64_t base_time; + uint32_t max_entries; + uint32_t num_entries; + struct timestamp_entry entries[0]; /* Variable number of entries */ +} __attribute__((packed)); + + It indicates the base time for all timestamp entries, maximum number of +entries that can be stored, total number of entries that currently exist and an +entry structure to hold variable number of entries. + + +4. entries + This field holds the details of each timestamp entry, upto a maximum of +MAX_TIMESTAMP_CACHE which is defined as 16 entries. Each entry is defined by: + +struct timestamp_entry { + uint32_t entry_id; + uint64_t entry_stamp; +} __attribute__((packed)); + + entry_id holds the timestamp id corresponding to this entry and +entry_stamp holds the actual timestamp. + + + For timestamps stored in the cbmem area, a timestamp_table is allocated +with space for MAX_TIMESTAMPS equal to 30. Thus, the cbmem area holds base_time, +max_entries (which is 30), current number of entries and the actual entries +represented by timestamp_entry. + + +========================== Internal Functions ================================== + +1. timestamp_cache_init + Initializes the timestamp cache to a known state by setting num_entries +to 0, base_entries to MAX_TIMESTAMP_CACHE, base_time to caller-provided base, +cache_state to TIMESTAMP_CACHE_INITIALIZED and cbmem_state to caller-provided +state. + + +2. timestamp_cache_get + This function returns a pointer to timestamp cache. It basically +identifies what cache to use based on following parameters: +a. If __PRE_RAM__ is true i.e. we are in pre-ramstage step and _timestamp region +is provided, use _timestamp region. +b. Otherwise use local stash + + If using _timestamp region, it ensures that the size of the region is +big enough to hold all of timestamp_cache structure and MAX_TIMESTAMP_CACHE +timestamp entries. Once the location of cache is decided, it checks to see if +cache is not yet initialized, and calls timestamp_cache_init if required. + + +3. timestamp_alloc_cbmem_table + This function exists only in romstage and ramstage since only these two +stages access cbmem area. It allocates a new table for MAX_TIMESTAMPS number of +entries in the cbmem area using CBMEM_ID_TIMESTAMP tag. It also resets the +base_time and num_entries to 0. + + +4. timestamp_table_get + This function returns a pointer to the timestamp table. Based on the +value of cache_state in timestamp_cache, it provides a pointer either to the +cache (in stash or _timestamp region) or the cbmem timestamp table. If a pointer +to the cbmem timestamp table is returned, it checks to see if cbmem_state +indicates a reset of the cbmem timestamp area. If required, it makes a call to +timestamp_alloc_cbmem_table. + + +5. timestamp_add_table_entry + This function adds a new entry to the timestamp table obtained by making +a call to timestamp_table_get. It sets the id based on user-provided id and the +stamp is set to user-provided time - table base time. This is to normalize all +the timestamps. + + +============================= Function APIs ==================================== + +1. timestamp_early_init + It is essential to call this function only if _timestamp region is being +used. This should be the first call made to the timestamp library. Since +_timestamp region can contain arbitary values in the different fields of the +cache, this function initializes the fields properly by calling +timestamp_cache_init with the cache pointer, user-provided base time and +cbmem_state as TIMESTAMP_CBMEM_RESET_REQD. This will provide an indication that +cbmem timestamp area needs to be added (in case of fresh boot) or reset to 0 +entries(in case of resume). + + +2. timestamp_init + It is essential to call this function before any call to timestamp_add +is made. In case of _timestamp region being used, only a call to +timestamp_early_init is required. In all other cases, it is essential to call +timestamp_init to set the cbmem_state to TIMESTAMP_CBMEM_RESET_REQD. This will +provide an indication that cbmem timestamp area needs to be added (in case of +fresh boot) or reset to 0 entries(in case of resume). + + +3. timestamp_add + This function accepts from user a timestamp id and time to record in the +timestamp table. Based on the table provided by timestamp_table_get, it stores +the entry in the appropriate table in cbmem or _timestamp region or local +stash. + + +4. timestamp_add_now + This function calls timestamp_add with user-provided id and current +time. + + +5. timestamp_sync + This is one of the most important functions required to ensure the +proper functioning of the timestamp library across cbmem, _timestamp region and +local stash with minimal interference for the user. It is important to note that +this function is called only by cbmem_initialize to ensure that once the cbmem +area is ready, we automatically sync all the timestamps saved in the cache to +cbmem area. Thus, the user never has to call the timestamp_sync function. + + This function checks to see if the cache state indicates that a cbmem +reset of timestamp area is required or no timestamp area exists in cbmem at +all. In that case, it allocates a new cbmem area by calling +timestamp_alloc_cbmem_table. + + Otherwise, it uses cbmem_find to use the timestamp area in cbmem. It +then uses timestamp_add_table_entry to move all the entries from cache to cbmem +area. Here, two cases can occur with respect to the base time subtraction: + +a. Newly added cbmem table will have a base time of 0. Thus, no adjustments are +required for the timestamps being added from cache to cbmem table. + +b. Timestamps added to cache before ramstage: In this case, the base time in +cache table will be 0 and timestamp_add_table_entry will take care of +subtracting the correct base_time. Finally, it resets the timestamp cache to: + + cache_state: TIMESTAMP_CACHE_NOT_NEEDED + cbmem_state: TIMESTAMP_CBMEM_RESET_NOT_REQD + num_entries: 0 + + Also, the base_time in cbmem table is update if it is currently zero +indicating that it needs to inherit base time from cache table since +cbmem table might be newly allocated. + + +============================= Use / Test Cases ================================= + + The following cases have been considered while designing the timestamp +library. It is important to ensure that any changes made to this library satisfy +each of the following use cases: + +Case 1: Timestamp Region Exists (Fresh Boot / Resume) + + +1. timestamp_early_init is called to setup the cache state and cbmem_state is +set to reset_reqd. These properties are set in the timestamp cache which is part +of _timestamp region. + +2. <Any number of timestamp_add / timestamp_add_now> : All saved in _timestamp +region + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +_timestamp region to check the cbmem_state field. Since it says reset_reqd, a +new area for timestamp is setup in cbmem by calling cbmem_add. The value of +cbmem_state is set to reset_not_reqd in _timestamp region cache. + +4. After entering ramstage, the local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 2: No timestamp region, fresh boot, cbmem_initialize called after +timestamp_init + +1. Since timestamp_init is called before cbmem_initialize, it will set the cache +field attributes to: cache_state as initialized and cbmem_state as +reset_reqd. This ensures that timestamp_sync sets up a new cbmem area for +timestamps. + +2. < Any number of calls to timestamp_add / timestamp_add_now> : All saved in +stash + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +stash cache to check the cbmem_state field. Since it says reset_reqd, a new area +for timestamp is setup in cbmem by calling cbmem_add. The value of cbmem_state +is set to reset_not_reqd in stash cache. + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 3: No timestamp region, fresh boot, cbmem_initialize called before +timestamp_init + +1. Since cbmem_initialize is called before timestamp_init, it will call +timestamp_sync which checks local stash to check for cbmem_state field. Since, +cbmem_state says no_reset_reqd, it uses cbmem_find to look for a timestamp area +in cbmem. Since, it is a fresh boot, none will be found and it uses cbmem_add to +create a new area on cbmem. + +2. timestamp_init is called, which sets local cache state to reset required. It +then calls timestamp_table_get which sees that cache_state is cache_not_needed +and cbmem_state is reset_reqd. Thus, it calls timestamp_alloc_cbmem_table to +reset the cbmem area which is as good as no change in the state of cbmem +area. Then, the cbmem_state is set to reset_not_reqd. + +3. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 4: No timestamp region, resume, cbmem_initialize called after +timestamp_init + +1. Since timestamp_init is called before cbmem_initialize, it will set the cache +field attributes to: cache_state as initialized and cbmem_state as reset_reqd. + +2. < Any number of calls to timestamp_add / timestamp_add_now> : All saved in +stash + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +stash cache to check the cbmem_state field. Since it says reset_reqd, +timestamp_sync resets cbmem area to num_entries=0, thus flushing timestamps from +earlier boot. The value of cbmem_state is set to reset_not_reqd in stash cache. + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 5: No timestamp region, resume, cbmem_initialize called before +timestamp_init + +1. Since cbmem_initialize is called before timestamp_init, it will call +timestamp_sync which checks local stash to check for cbmem_state field. Since, +cbmem_state says no_reset_reqd, it uses cbmem_find to look for a timestamp area +in cbmem. Since, it is resume, it will find the older cbmem timestamp area from +earlier boot. However, nothing is added to cbmem area since timestamp_add / +timestamp_add_now is expected to be used only after call to timestamp_init. + +2. timestamp_init is called, which sets local cache state to reset required. It +then calls timestamp_table_get which sees that cache_state is cache_not_needed +and cbmem_state is reset_reqd. Thus, it calls timestamp_alloc_cbmem_table to +reset the cbmem area which sets num_entries to 0. Thus, flushing timestamps from +earlier boot. Then, the cbmem_state is set to reset_not_reqd. + +3. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem

1 0

New patch to review for coreboot: rk3288: Use timestamp region for pre-cbmem timestamps
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10740 -gerrit commit 5178e41251642b0aabbc4b3648c8acc5771bf255 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Nov 3 14:39:11 2014 -0800 rk3288: Use timestamp region for pre-cbmem timestamps BUG=None BRANCH=None TEST=Compiles successfully for veyron_pinky Original-Change-Id: I3862e9bf2c32085c921adae4c1dcdf88ff0f3ff3 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/227243 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 0fabdbb05826160beb8ee8f89339b18a49e87ab8) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I4504d29a43084d4bd406626899b25903200fa6d7 --- src/mainboard/google/veyron_brain/romstage.c | 14 +++----------- src/mainboard/google/veyron_danger/romstage.c | 14 +++----------- src/mainboard/google/veyron_jerry/romstage.c | 14 +++----------- src/mainboard/google/veyron_mickey/romstage.c | 14 +++----------- src/mainboard/google/veyron_mighty/romstage.c | 14 +++----------- src/mainboard/google/veyron_pinky/romstage.c | 14 +++----------- src/mainboard/google/veyron_rialto/romstage.c | 14 +++----------- src/mainboard/google/veyron_romy/romstage.c | 14 +++----------- src/mainboard/google/veyron_speedy/romstage.c | 14 +++----------- src/soc/rockchip/rk3288/Kconfig | 2 ++ src/soc/rockchip/rk3288/bootblock.c | 3 +++ src/soc/rockchip/rk3288/include/soc/memlayout.ld | 1 + 12 files changed, 33 insertions(+), 99 deletions(-) diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_brain/romstage.c +++ b/src/mainboard/google/veyron_brain/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c index 80d9081..0328e95 100644 --- a/src/mainboard/google/veyron_danger/romstage.c +++ b/src/mainboard/google/veyron_danger/romstage.c @@ -81,11 +81,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -98,11 +94,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -114,10 +110,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c index e509a4a..06eabe0 100644 --- a/src/mainboard/google/veyron_jerry/romstage.c +++ b/src/mainboard/google/veyron_jerry/romstage.c @@ -86,11 +86,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -103,11 +99,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -119,10 +115,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index e509a4a..06eabe0 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -86,11 +86,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -103,11 +99,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -119,10 +115,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c index b536391..5031ad9d 100644 --- a/src/mainboard/google/veyron_pinky/romstage.c +++ b/src/mainboard/google/veyron_pinky/romstage.c @@ -94,11 +94,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -111,11 +107,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -127,10 +123,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index 68ab661..ffdfdb0 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -87,11 +87,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -104,11 +100,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -120,10 +116,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_romy/romstage.c +++ b/src/mainboard/google/veyron_romy/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index 68ab661..ffdfdb0 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -87,11 +87,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -104,11 +100,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -120,10 +116,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig index 3a4712e..ef7f13d 100644 --- a/src/soc/rockchip/rk3288/Kconfig +++ b/src/soc/rockchip/rk3288/Kconfig @@ -24,6 +24,8 @@ config SOC_ROCKCHIP_RK3288 select ARCH_VERSTAGE_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 + select COLLECT_TIMESTAMPS + select HAS_PRECBMEM_TIMESTAMP_REGION select HAVE_MONOTONIC_TIMER select GENERIC_UDELAY select HAVE_UART_SPECIAL diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c index ce0ab33..16412d2 100644 --- a/src/soc/rockchip/rk3288/bootblock.c +++ b/src/soc/rockchip/rk3288/bootblock.c @@ -26,9 +26,12 @@ #include <soc/grf.h> #include <soc/timer.h> #include <symbols.h> +#include <timestamp.h> static void bootblock_soc_init(void) { + timestamp_early_init(timestamp_get()); + rkclk_init(); mmu_init(); diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld index cd484c8..094e154 100644 --- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld @@ -42,6 +42,7 @@ SECTIONS TTB_SUBTABLES(0xFF716C00, 1K) PRERAM_CBFS_CACHE(0xFF717000, 1K) STACK(0xFF717580, 3K - 0x180) + TIMESTAMP(0xFF717C00, 1K) SRAM_END(0xFF718000) /* 4K of special SRAM in PMU power domain.

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New patch to review for coreboot: broadwell: Use _timestamp region
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10739 -gerrit commit e9c8ed201d21b7c172955e7c3b5895e5fbb43d48 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 29 16:50:35 2014 -0700 broadwell: Use _timestamp region Use timestamp region instead of storing timestamps in local data structures before cbmem is up BUG=None BRANCH=None TEST=Compiles successfully for Auron and Samus. cbmem -t reports correct timestamps on auron(for both normal boot and suspend/resume) Original-Change-Id: Ib70a3632c2034963c819c1bb90a3cdb2d7d9c355 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226420 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit e2ac6132aa874c13cd8e9333b8e1413ce8359852) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I70f608fc50b2cf180554f817c9aaf833257d7d80 --- src/soc/intel/broadwell/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 6ad9113..f37ffd8 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -23,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SMI_HANDLER select HAVE_HARD_RESET select HAVE_USBDEBUG + select HAS_PRECBMEM_TIMESTAMP_REGION select IOAPIC select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT

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New patch to review for coreboot: baytrail: Use _timestamp region
by Marc Jones 30 Jun '15

30 Jun '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10738 -gerrit commit 80de341cdfed45ecc5150cbfd35a30d39fc42b5d Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 29 17:37:25 2014 -0700 baytrail: Use _timestamp region Use timestamp region instead of storing timestamps in local data structures before cbmem is up. BUG=None BRANCH=None TEST=cbmem -t reports correct timestamps on rambi(for both normal boot and suspend/resume). Original-Change-Id: I4cce22514041edc7808278d45eac4370a2bf0810 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226421 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 58e212498ffc0ac32e8ad60e0e59caf1aa81c8d8) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I8cc686327c7bacf28aa97f001b4fd6c0f4aeb585 --- src/soc/intel/baytrail/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 2764efb..18e8b6b 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select HAVE_HARD_RESET + select HAS_PRECBMEM_TIMESTAMP_REGION select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select RELOCATABLE_MODULES

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coreboot-gerrit June 2015