coreboot-gerrit May 2015

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: 14dab9a cache: Add arch_program_segment_loaded call to arm and arm64
by Patrick Georgi 11 May '15

11 May '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10173 -gerrit commit 14dab9ae7464b6022533e678c227f11b78967df4 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Mar 18 11:27:25 2015 -0700 cache: Add arch_program_segment_loaded call to arm and arm64 arch_program_segment_loaded ensures that the program segment loaded is synced back from the cache to PoC. dcache_flush_all on arm64 does not guarantee PoC in case of MP systems. Thus, it is important to track and sync back all the required segments using arch_program_segment_loaded. Use this function in rmodules as well instead of cache_sync_instructions which guarantees sync upto PoC. BUG=chrome-os-partner:37546 BRANCH=None TEST=Boots into depthcharge on foster Change-Id: I64c2dd5e40ea59fa31f300174ca0d0aebcf8041d Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 35ba0b882b86ff2c29ac766e1d65f403c8346247 Original-Change-Id: I964aa09f0cafdaab170606cd4b8f2e027698aee7 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/260908 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Trybot-Ready: Furquan Shaikh <furquan(a)chromium.org> --- src/arch/arm/armv7/cache.c | 10 ++++++++++ src/arch/arm64/armv8/cache.c | 12 ++++++++++++ 2 files changed, 22 insertions(+) diff --git a/src/arch/arm/armv7/cache.c b/src/arch/arm/armv7/cache.c index 1f762b8..eea514b 100644 --- a/src/arch/arm/armv7/cache.c +++ b/src/arch/arm/armv7/cache.c @@ -34,6 +34,7 @@ #include <stdint.h> #include <arch/cache.h> +#include <program_loading.h> void tlb_invalidate_all(void) { @@ -155,3 +156,12 @@ void cache_sync_instructions(void) dsb(); isb(); } + +/* + * For each segment of a program loaded this function is called + * to invalidate caches for the addresses of the loaded segment + */ +void arch_segment_loaded(uintptr_t start, size_t size, int flags) +{ + cache_sync_instructions(); +} diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c index db9b388..95f2890 100644 --- a/src/arch/arm64/armv8/cache.c +++ b/src/arch/arm64/armv8/cache.c @@ -36,6 +36,7 @@ #include <arch/cache.h> #include <arch/cache_helpers.h> #include <arch/lib_helpers.h> +#include <program_loading.h> void tlb_invalidate_all(void) { @@ -147,3 +148,14 @@ void cache_sync_instructions(void) flush_dcache_all(DCCISW); /* includes trailing DSB (in assembly) */ icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */ } + + +/* + * For each segment of a program loaded this function is called + * to invalidate caches for the addresses of the loaded segment + */ +void arch_segment_loaded(uintptr_t start, size_t size, int flags) +{ + dcache_clean_invalidate_by_mva((void *)start, size); + icache_invalidate_all(); +}

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Patch merged into coreboot/master: 9bb90cd secmon: Add some missing files
by gerrit＠coreboot.org 11 May '15

11 May '15

the following patch was just integrated into master: commit 9bb90cd1a2d79146c0f4928ec88fd3b7fa3c7f60 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Thu May 7 12:30:06 2015 +0200 secmon: Add some missing files secmon is referring to uart's default_baudrate() and various coreboot version strings. Change-Id: I40a8d1979146058409a814d94ea24de83ee4d634 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/10129 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/10129 for details. -gerrit

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Patch merged into coreboot/master: c96ff45 nvidia/tegra132: we write tables in ramstage
by gerrit＠coreboot.org 11 May '15

11 May '15

the following patch was just integrated into master: commit c96ff45b7fcc16ff65836f0ed1d2780e9fd3b5ef Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Thu May 7 12:29:13 2015 +0200 nvidia/tegra132: we write tables in ramstage So that's more precise than "anything non-pre-ram". Change-Id: I21db536a5ea704c4b087f57d0b761dd3fdf43e3e Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/10128 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/10128 for details. -gerrit

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New patch to review for coreboot: 27bd9f4 drivers/gic: reprogram the GIC CPU interface to bypass IRQ
by Patrick Georgi 11 May '15

11 May '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10172 -gerrit commit 27bd9f450709bf256e6fdbb84ab8ec1e359b9c52 Author: Joseph Lo <josephl(a)nvidia.com> Date: Wed Apr 29 17:14:03 2015 +0800 drivers/gic: reprogram the GIC CPU interface to bypass IRQ GICv2 provides a wake IRQ/FIQ (for wake-event purpose), which are not disabled by GIC CPU interface. This is done by adding a bypass override capability when the interrupts are disabled at the CPU interface. To support this, there are four bits about IRQ/FIQ BypassDisable in CPU interface Control Register. So the CPU can exit from WFI when an asserted IRQ is coming. This is critical for power gating a CPU. BRANCH=none BUG=chrome-os-partner:39620 TEST=testing with CPU idle with power down state support and CPU can wake up normally Change-Id: I71ac642e28024a562db898665b74a5791fce325a Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 3a3f098cbf3fbfdab8150ebd4fd688fdb472b529 Original-Change-Id: I20569a18f34a4b11b8c8c67ea255b3d0f021839f Original-Signed-off-by: Joseph Lo <josephl(a)nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/269116 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/gic/gic.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/drivers/gic/gic.c b/src/drivers/gic/gic.c index 71073a5..b7bce2a 100644 --- a/src/drivers/gic/gic.c +++ b/src/drivers/gic/gic.c @@ -26,6 +26,10 @@ enum { ENABLE_GRP0 = 0x1 << 0, ENABLE_GRP1 = 0x1 << 1, + FIQ_BYP_DIS_GRP0 = 0x1 << 5, + IRQ_BYP_DIS_GRP0 = 0x1 << 6, + FIQ_BYP_DIS_GRP1 = 0x1 << 7, + IRQ_BYP_DIS_GRP1 = 0x1 << 8, }; struct gic { @@ -135,6 +139,13 @@ void gic_disable(void) /* Disable secure, non-secure interrupts. */ uint32_t val = gic_read(&gicc->ctlr); val &= ~(ENABLE_GRP0 | ENABLE_GRP1); + /* + * Enable the IRQ/FIQ BypassDisable bits to bypass the IRQs. + * So the CPU can wake up from power gating state when the GIC + * was disabled. + */ + val |= FIQ_BYP_DIS_GRP0 | IRQ_BYP_DIS_GRP0 | + FIQ_BYP_DIS_GRP1 | IRQ_BYP_DIS_GRP1; gic_write(&gicc->ctlr, val); }

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New patch to review for coreboot: 4ec3f2f arm64: psci: add cpu_suspend support
by Patrick Georgi 11 May '15

11 May '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10171 -gerrit commit 4ec3f2ffec452cbfb815a0f689ecdc087f528ff3 Author: Joseph Lo <josephl(a)nvidia.com> Date: Tue Dec 9 15:11:54 2014 +0800 arm64: psci: add cpu_suspend support Implement the cpu_suspend for the PSCI service in secmon. BRANCH=none BUG=chrome-os-partner:39620 TEST=test with CPU idle driver that invoke the cpu_suspend of PSCI Change-Id: I4cdfab88bf36bf432fb33c56c1ea114b384528f8 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 90b3ea3fcb21cb393e30a8359f0328054961f6d5 Original-Change-Id: Ieb76abc017b9c3e074cc018903cef72020306a8f Original-Signed-off-by: Joseph Lo <josephl(a)nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/269115 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm64/armv8/secmon/psci.c | 133 ++++++++++++++++++++++++++++++++++++- src/arch/arm64/include/arch/psci.h | 36 +++++++++- 2 files changed, 166 insertions(+), 3 deletions(-) diff --git a/src/arch/arm64/armv8/secmon/psci.c b/src/arch/arm64/armv8/secmon/psci.c index 70251b2..f57a3e9 100644 --- a/src/arch/arm64/armv8/secmon/psci.c +++ b/src/arch/arm64/armv8/secmon/psci.c @@ -207,6 +207,34 @@ static int psci_schedule_cpu_on(struct psci_node *e) return PSCI_RET_SUCCESS; } +static void psci_cpu_resume_prepare(struct psci_cmd *cmd, + const struct cpu_action *a) +{ + struct psci_node *ancestor; + struct psci_node *e; + int state = PSCI_STATE_ON_PENDING; + + e = cmd->target; + e->cpu_state.resume = *a; + ancestor = psci_find_ancestor(e, PSCI_AFFINITY_LEVEL_HIGHEST, state); + e->cpu_state.ancestor = ancestor; + cmd->ancestor = ancestor; +} + +static void psci_schedule_cpu_resume(struct psci_node *e) +{ + struct cpu_info *ci; + struct cpu_action *action; + + if (e->cpu_state.resume.run == NULL) + return; + + ci = e->cpu_state.ci; + action = &e->cpu_state.resume; + + arch_run_on_cpu(ci->id, action); +} + void psci_turn_on_self(const struct cpu_action *action) { struct psci_node *e = node_self(); @@ -233,13 +261,111 @@ void psci_turn_on_self(const struct cpu_action *action) void psci_cpu_entry(void) { gic_enable(); + /* - * Just wait for an action to be performed. Only CPU_ON is supported - * initially. i.e. no power down then wake. + * Just wait for an action to be performed. */ + psci_schedule_cpu_resume(node_self()); secmon_wait_for_action(); } +static void psci_cpu_resume(void *arg) +{ + uint64_t power_state = (uint64_t)arg; + struct psci_node *e; + struct psci_power_state state; + struct psci_cmd cmd = { + .type = PSCI_CMD_RESUME, + }; + + psci_power_state_unpack(power_state, &state); + + psci_lock(); + + e = node_self(); + /* clear the resume action after resume */ + e->cpu_state.resume.run = NULL; + e->cpu_state.resume.arg = NULL; + + cmd.target = e; + cmd.state = &state; + soc_psci_ops.cmd_prepare(&cmd); + + psci_unlock(); + + soc_psci_ops.cmd_commit(&cmd); + + psci_lock(); + psci_set_hierarchy_state(e, e->cpu_state.ancestor, PSCI_STATE_ON); + psci_unlock(); + + psci_schedule_cpu_on(node_self()); +} + +static void psci_cpu_suspend(struct psci_func *pf) +{ + uint64_t power_state; + uint64_t entry; + uint64_t context_id; + struct psci_node *e; + struct psci_power_state state; + struct cpu_action action; + struct cpu_action resume_action; + struct psci_cmd cmd = { + .type = PSCI_CMD_SUSPEND, + }; + int ret; + + power_state = psci64_arg(pf, PSCI_PARAM_0); + entry = psci64_arg(pf, PSCI_PARAM_1); + context_id = psci64_arg(pf, PSCI_PARAM_2); + psci_power_state_unpack(power_state, &state); + + psci_lock(); + + e = node_self(); + cmd.target = e; + cmd.state = &state; + action.run = (void *)entry; + action.arg = (void *)context_id; + resume_action.run = &psci_cpu_resume; + resume_action.arg = (void*)power_state; + + psci_cpu_on_prepare(&cmd, &action); + psci_cpu_resume_prepare(&cmd, &resume_action); + + ret = soc_psci_ops.cmd_prepare(&cmd); + + if (ret == PSCI_RET_SUCCESS) + psci_set_hierarchy_state(e, cmd.ancestor, PSCI_STATE_OFF); + + psci_unlock(); + + if (ret != PSCI_RET_SUCCESS) + return psci32_return(pf, ret); + + gic_disable(); + + ret = soc_psci_ops.cmd_commit(&cmd); + + /* PSCI_POWER_STATE_TYPE_STANDBY mode only */ + + psci_lock(); + resume_action.run = NULL; + resume_action.arg = NULL; + psci_cpu_resume_prepare(&cmd, &resume_action); + psci_unlock(); + + if (ret != PSCI_RET_SUCCESS) + return psci32_return(pf, ret); + + psci_lock(); + psci_set_hierarchy_state(e, e->cpu_state.ancestor, PSCI_STATE_ON); + psci_unlock(); + + psci32_return(pf, PSCI_RET_SUCCESS); +} + static void psci_cpu_on(struct psci_func *pf) { uint64_t entry; @@ -369,6 +495,9 @@ static int psci_handler(struct smc_call *smc) psci_func_init(pf, smc); switch (pf->id) { + case PSCI_CPU_SUSPEND64: + psci_cpu_suspend(pf); + break; case PSCI_CPU_ON64: psci_cpu_on(pf); break; diff --git a/src/arch/arm64/include/arch/psci.h b/src/arch/arm64/include/arch/psci.h index 47c9028..1c28dc4 100644 --- a/src/arch/arm64/include/arch/psci.h +++ b/src/arch/arm64/include/arch/psci.h @@ -24,6 +24,25 @@ #include <arch/cpu.h> #include <arch/smc.h> +/* PSCI v0.2 power state encoding for CPU_SUSPEND function */ +#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff +#define PSCI_0_2_POWER_STATE_ID_SHIFT 0 +#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 +#define PSCI_0_2_POWER_STATE_TYPE_MASK \ + (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) +#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 +#define PSCI_0_2_POWER_STATE_AFFL_MASK \ + (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) + +#define PSCI_POWER_STATE_TYPE_STANDBY 0 +#define PSCI_POWER_STATE_TYPE_POWER_DOWN 1 + +struct psci_power_state { + u16 id; + u8 type; + u8 affinity_level; +}; + /* Return Values */ enum { PSCI_RET_SUCCESS = 0, @@ -64,6 +83,7 @@ struct psci_node; struct psci_cpu_state { struct cpu_info *ci; struct cpu_action startup; + struct cpu_action resume; /* Ancestor of target to update state in CPU_ON case. */ struct psci_node *ancestor; }; @@ -107,7 +127,8 @@ static inline int psci_root_node(const struct psci_node *n) enum { PSCI_CMD_ON, PSCI_CMD_OFF, - PSCI_CMD_STANDBY, + PSCI_CMD_SUSPEND, + PSCI_CMD_RESUME, }; /* @@ -127,6 +148,7 @@ struct psci_cmd { * A value of -1 indicates a CPU_OFF request. */ int state_id; + struct psci_power_state *state; /* * target is the command's target, but it can affect up to the * ancestor entity. If target == ancestor then it only affects @@ -184,6 +206,18 @@ struct psci_func { struct smc_call *smc; }; +static inline void psci_power_state_unpack(uint32_t power_state, + struct psci_power_state *state) +{ + state->id = (power_state & PSCI_0_2_POWER_STATE_ID_MASK) >> + PSCI_0_2_POWER_STATE_ID_SHIFT; + state->type = (power_state & PSCI_0_2_POWER_STATE_TYPE_MASK) >> + PSCI_0_2_POWER_STATE_TYPE_SHIFT; + state->affinity_level = + (power_state & PSCI_0_2_POWER_STATE_AFFL_MASK) >> + PSCI_0_2_POWER_STATE_AFFL_SHIFT; +} + static inline void psci_func_init(struct psci_func *pf, struct smc_call *smc) { pf->id = smc_function_id(smc);

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New patch to review for coreboot: 7d129fe libpayload: add mediatek timer driver
by Patrick Georgi 11 May '15

11 May '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10170 -gerrit commit 7d129fee3ec0072ecbab7dba9ce60c142f5c0399 Author: Yidi Lin <yidi.lin(a)mediatek.com> Date: Mon Feb 9 16:34:44 2015 +0800 libpayload: add mediatek timer driver Change-Id: Ifb19cf97d4db6c7394521e549968a0cfb6ed1c75 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 0137652ca07e290bb3cb1cc82a00b44ac7bcc7bf Original-Change-Id: Ica649927d3533c847b24e520e8fe73d75fb9e786 Original-Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/257375 Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- payloads/libpayload/Config.in | 17 ++++++++++++++ payloads/libpayload/drivers/Makefile.inc | 1 + payloads/libpayload/drivers/timer/mtk_timer.c | 34 +++++++++++++++++++++++++++ 3 files changed, 52 insertions(+) diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index 40c57dc..4d48761 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -405,6 +405,9 @@ config TIMER_CYGNUS config TIMER_IMG_PISTACHIO bool "Timer for IMG Pistachio" +config TIMER_MTK + bool "Timer for MediaTek MT8173" + endchoice config TIMER_MCT_HZ @@ -447,6 +450,20 @@ config IPROC_PERIPH_GLB_TIM_REG_BASE depends on TIMER_CYGNUS default 0x19020200 +config TIMER_MTK_HZ + int "MediaTek GPT frequency" + depends on TIMER_MTK + default 13000000 + help + Clock frequency of MediaTek General Purpose Timer. + +config TIMER_MTK_ADDRESS + hex "MTK GPT register address" + depends on TIMER_MTK + default 0x10008048 + help + Address of GPT4's counter register to read the FREERUN-mode timer value. + config USB bool "USB Support" default n diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index 61b0034..57a82ac 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -46,6 +46,7 @@ libc-$(CONFIG_LP_NVRAM) += nvram.c libc-$(CONFIG_LP_NVRAM) += options.c # Timer drivers +libc-$(CONFIG_LP_TIMER_MTK) += timer/mtk_timer.c libc-$(CONFIG_LP_TIMER_MCT) += timer/mct.c libc-$(CONFIG_LP_TIMER_RDTSC) += timer/rdtsc.c libc-$(CONFIG_LP_TIMER_TEGRA_1US) += timer/tegra_1us.c diff --git a/payloads/libpayload/drivers/timer/mtk_timer.c b/payloads/libpayload/drivers/timer/mtk_timer.c new file mode 100644 index 0000000..92b28bd --- /dev/null +++ b/payloads/libpayload/drivers/timer/mtk_timer.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <arch/io.h> +#include <libpayload.h> +#include <libpayload-config.h> +#include <stdint.h> + +static uint32_t *const mtk_tmrus = (void*)CONFIG_LP_TIMER_MTK_ADDRESS; + +uint64_t timer_hz(void) +{ + return CONFIG_LP_TIMER_MTK_HZ; +} + +uint64_t timer_raw_value(void) +{ + return (uint64_t)readl(mtk_tmrus); +}

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Patch merged into coreboot/master: ccbcfd7 kconfig: handle globbed files backwards
by gerrit＠coreboot.org 11 May '15

11 May '15

the following patch was just integrated into master: commit ccbcfd79eca4d55692011d71911eb7efa7672e8d Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sun May 10 18:00:05 2015 +0200 kconfig: handle globbed files backwards They're essentially collected on a stack before they're parsed. So we push them backwards, then parse them in the correct order. Change-Id: Ibf29559389cd19f260d67bae8e0b5ef9f4f58d91 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/10169 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> See http://review.coreboot.org/10169 for details. -gerrit

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Patch set updated for coreboot: a0bdae8 [Do not Merge] try to add i945G based board
by HAOUAS Elyes 10 May '15

10 May '15

HAOUAS Elyes (ehaouas(a)noos.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9971 -gerrit commit a0bdae8c22aa987b4e20ad25ee9a6b6e3208a1f5 Author: Elyes HAOUAS <ehaouas(a)noos.fr> Date: Tue May 5 22:04:03 2015 +0200 [Do not Merge] try to add i945G based board at the 1st boot, the system hang on this msg: "CBMEM: root @ 7ffff000 254 entries." but at the 2nd boot, it hang on this msg: "Trying CBFS ramstage loader" here the 1st and the 2nd log: https://www.dropbox.com/s/qaa7dn2xv1vn8ty/log-10052015.txt?dl=0 Please advise. Thank you Change-Id: I97401a39a958a17f2f9120539362e3fa7819a742 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- src/lib/cbmem_console.c | 8 +- src/lib/dynamic_cbmem.c | 37 ++-- src/lib/timestamp.c | 5 +- src/mainboard/nec/945g-m4/Kconfig | 42 ++++ src/mainboard/nec/945g-m4/Kconfig.name | 2 + src/mainboard/nec/945g-m4/acpi/ec.asl | 1 + src/mainboard/nec/945g-m4/acpi/i945_pci_irqs.asl | 83 ++++++++ src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl | 103 ++++++++++ src/mainboard/nec/945g-m4/acpi/platform.asl | 90 +++++++++ src/mainboard/nec/945g-m4/acpi/superio.asl | 92 +++++++++ src/mainboard/nec/945g-m4/acpi/thermal.asl | 94 +++++++++ src/mainboard/nec/945g-m4/acpi/video.asl | 43 ++++ src/mainboard/nec/945g-m4/acpi_tables.c | 77 ++++++++ src/mainboard/nec/945g-m4/board_info.txt | 15 ++ src/mainboard/nec/945g-m4/cmos.layout | 194 +++++++++++++++++++ src/mainboard/nec/945g-m4/devicetree.cb | 121 ++++++++++++ src/mainboard/nec/945g-m4/dsdt.asl | 44 +++++ src/mainboard/nec/945g-m4/hda_verb.c | 5 + src/mainboard/nec/945g-m4/irq_tables.c | 61 ++++++ src/mainboard/nec/945g-m4/mainboard.c | 94 +++++++++ src/mainboard/nec/945g-m4/mptable.c | 106 ++++++++++ src/mainboard/nec/945g-m4/romstage.c | 237 +++++++++++++++++++++++ src/mainboard/nec/945g-m4/smihandler.c | 49 +++++ src/mainboard/nec/945g-m4/superio_hwm.c | 161 +++++++++++++++ src/mainboard/nec/945g-m4/superio_hwm.h | 25 +++ src/northbridge/intel/i945/early_init.c | 41 +++- src/northbridge/intel/i945/gma.c | 17 +- src/northbridge/intel/i945/raminit.c | 96 ++++++--- 28 files changed, 1889 insertions(+), 54 deletions(-) diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 770c1d2..1344ccb 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -212,19 +212,21 @@ void cbmemc_reinit(void) struct cbmem_console *cbm_cons_p = NULL; int flags = CBMEMC_APPEND; - if (ENV_ROMSTAGE && (CONFIG_CONSOLE_PRERAM_BUFFER_SIZE == 0)) + if (ENV_ROMSTAGE && (CONFIG_CONSOLE_PRERAM_BUFFER_SIZE == 0)){ +printk(BIOS_DEBUG, "step If CBMEM entry already existed, old contents is not altered.\n"); return; - +} /* If CBMEM entry already existed, old contents is not altered. */ cbm_cons_p = cbmem_add(CBMEM_ID_CONSOLE, CONFIG_CONSOLE_CBMEM_BUFFER_SIZE); - +printk(BIOS_DEBUG, "step Clear old contents of CBMEM buffer.\n"); /* Clear old contents of CBMEM buffer. */ if (ENV_ROMSTAGE || (CONFIG_CONSOLE_PRERAM_BUFFER_SIZE == 0)) flags |= CBMEMC_RESET; init_console_ptr(cbm_cons_p, CONFIG_CONSOLE_CBMEM_BUFFER_SIZE, flags); +printk(BIOS_DEBUG, "CONFIG_CONSOLE_CBMEM_BUFFER_SIZE \n"); } /* Call cbmemc_reinit() at CAR migration time. */ CAR_MIGRATE(cbmemc_reinit) diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index c63cb46..5b141d7 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -96,7 +96,7 @@ static inline uintptr_t get_top_aligned(void) /* Align down what is returned from cbmem_top(). */ top = (uintptr_t)cbmem_top_cached(); top &= ~(DYN_CBMEM_ALIGN_SIZE - 1); - +printk(BIOS_DEBUG, "return get_top_aligned \n"); return top; } @@ -104,18 +104,21 @@ static inline void *get_root(void) { uintptr_t pointer_addr; struct cbmem_root_pointer *pointer; - +printk(BIOS_DEBUG, "step get root \n"); pointer_addr = get_top_aligned(); if (pointer_addr == 0) - return NULL; - +{ printk(BIOS_DEBUG, "pointer_addr NULL ... \n"); + return NULL; } +printk(BIOS_DEBUG, "step pointer_addr - sizeof \n"); pointer_addr -= sizeof(struct cbmem_root_pointer); - +printk(BIOS_DEBUG, "end step pointer_addr - sizeof \n"); pointer = (void *)pointer_addr; - if (pointer->magic != CBMEM_POINTER_MAGIC) - return NULL; - + if (pointer->magic != CBMEM_POINTER_MAGIC){ +printk(BIOS_DEBUG, "pointer magic != CBMEM_POINTER_MAGIC ... \n"); + return NULL; } +printk(BIOS_DEBUG, "start pointer_addr .... \n"); pointer_addr = pointer->root; +printk(BIOS_DEBUG, "pointer_addr .... \n"); return (void *)pointer_addr; } @@ -352,33 +355,38 @@ const struct cbmem_entry *cbmem_entry_find(u32 id) struct cbmem_root *root; const struct cbmem_entry *entry; unsigned int i; - +printk(BIOS_DEBUG, "step cbmem_entry cbmem_entry_find u32 id \n"); root = get_root(); - if (root == NULL) + if (root == NULL) { +printk(BIOS_DEBUG, "Root is NULL \n"); return NULL; - +} entry = NULL; for (i = 0; i < root->num_entries; i++) { +printk(BIOS_DEBUG, "from i to root num_entrirs loop \n"); if (root->entries[i].id == id) { +printk(BIOS_DEBUG, " root entries id \n"); entry = &root->entries[i]; break; } } - +printk(BIOS_DEBUG,"return cbmem entry \n"); return entry; } void *cbmem_find(u32 id) { const struct cbmem_entry *entry; - +printk(BIOS_DEBUG, "step cbmem_find \n"); entry = cbmem_entry_find(id); if (entry == NULL) +{ printk(BIOS_DEBUG, "entry = NULL ...\n"); return NULL; - +} + printk(BIOS_DEBUG, "return cbmem_entry_start \n"); return cbmem_entry_start(entry); } @@ -420,6 +428,7 @@ u64 cbmem_entry_size(const struct cbmem_entry *entry) void *cbmem_entry_start(const struct cbmem_entry *entry) { uintptr_t addr = entry->start; +printk(BIOS_DEBUG, "step cbmeme entry start fuction ...\n"); return (void *)addr; } diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 5846781..e7618cc 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -145,9 +145,10 @@ void timestamp_init(uint64_t base) void timestamp_reinit(void) { - if (!boot_cpu()) + if (!boot_cpu()){ +printk(BIOS_DEBUG, "!Boot_cpu is true: \n"); return; - +} #ifdef __PRE_RAM__ timestamp_real_init(car_get_var(ts_basetime)); #else diff --git a/src/mainboard/nec/945g-m4/Kconfig b/src/mainboard/nec/945g-m4/Kconfig new file mode 100644 index 0000000..791a8f9 --- /dev/null +++ b/src/mainboard/nec/945g-m4/Kconfig @@ -0,0 +1,42 @@ +if BOARD_NEC_945G_M4 +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_LGA775 + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GC + select CHECK_SLFRCS_ON_RESUME + select SOUTHBRIDGE_INTEL_I82801GX + select SUPERIO_WINBOND_W83627EHG + select HAVE_ACPI_TABLES + select HAVE_PIRQ_TABLE + select HAVE_MP_TABLE + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select BOARD_ROMSIZE_KB_512 + select CHANNEL_XOR_RANDOMIZATION + +config MAINBOARD_DIR + string + default nec/945g-m4 + +config MAINBOARD_PART_NUMBER + string + default "945G-M4" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 4 + +#config VGA_BIOS_FILE +# string +# default "amipci_01.20" +endif # BOARD_NEC_945G_M4 diff --git a/src/mainboard/nec/945g-m4/Kconfig.name b/src/mainboard/nec/945g-m4/Kconfig.name new file mode 100644 index 0000000..46571f0 --- /dev/null +++ b/src/mainboard/nec/945g-m4/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_NEC_945G_M4 + bool "945G-M" diff --git a/src/mainboard/nec/945g-m4/acpi/ec.asl b/src/mainboard/nec/945g-m4/acpi/ec.asl new file mode 100644 index 0000000..8f20f9d --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/ec.asl @@ -0,0 +1 @@ +//to make the compiler happy diff --git a/src/mainboard/nec/945g-m4/acpi/i945_pci_irqs.asl b/src/mainboard/nec/945g-m4/acpi/i945_pci_irqs.asl new file mode 100644 index 0000000..fb57b5e --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/i945_pci_irqs.asl @@ -0,0 +1,83 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 coreboot + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This is board specific information: IRQ routing for i945G */ + + +// PCI Interrupt Routing +Method(_PRT) +{ + If (PICM) { + Return (Package() { + // PCIe Graphics 0:1.0 + Package() { 0x0001ffff, 0, 0, 10 }, + Package() { 0x0001ffff, 1, 0, 11 }, + Package() { 0x0001ffff, 2, 0, 12 }, + Package() { 0x0001ffff, 3, 0, 13 }, + // Onboard graphics (IGD) 0:2.0 + Package() { 0x0002ffff, 0, 0, 10 }, + // High Definition Audio 0:1b.0 + Package() { 0x001bffff, 0, 0, 10 }, + // PCIe Root Ports 0:1c.x + Package() { 0x001cffff, 0, 0, 10 }, + Package() { 0x001cffff, 1, 0, 11 }, + Package() { 0x001cffff, 2, 0, 12 }, + Package() { 0x001cffff, 3, 0, 13 }, + // USB and EHCI 0:1d.x + Package() { 0x001dffff, 0, 0, 17 }, + Package() { 0x001dffff, 1, 0, 19 }, + Package() { 0x001dffff, 2, 0, 13 }, + Package() { 0x001dffff, 3, 0, 12 }, + // AC97/IDE 0:1e.2, 0:1e.3 + Package() { 0x001effff, 0, 0, 11 }, + Package() { 0x001effff, 1, 0, 24 }, + // LPC device 0:1f.0 + Package() { 0x001fffff, 0, 0, 12 }, + Package() { 0x001fffff, 1, 0, 13 }, + }) + } Else { + Return (Package() { + // PCIe Graphics 0:1.0 + Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, + // Onboard graphics (IGD) 0:2.0 + Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + // High Definition Audio 0:1b.0 + //Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + // PCIe Root Ports 0:1c.x + Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, + // USB and EHCI 0:1d.x + Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, + Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 }, + Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }, + // AC97/IDE 0:1e.2, 0:1e.3 + Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 }, + // LPC device 0:1f.0 + Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 }, + }) + } +} diff --git a/src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl b/src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl new file mode 100644 index 0000000..c108d3f --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl @@ -0,0 +1,103 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This is board specific information: IRQ routing for the + * 0:1e.0 PCI bridge of the ICH7 + */ + +If (PICM) { + Return (Package() { + Package() { 0x0000ffff, 0, 0, 16}, + + Package() { 0x0001ffff, 0, 0, 20}, + Package() { 0x0001ffff, 1, 0, 21}, + Package() { 0x0001ffff, 2, 0, 22}, + Package() { 0x0001ffff, 3, 0, 23}, + + Package() { 0x0002ffff, 0, 0, 21}, + Package() { 0x0002ffff, 1, 0, 22}, + Package() { 0x0002ffff, 2, 0, 23}, + Package() { 0x0002ffff, 3, 0, 20}, + + Package() { 0x0003ffff, 0, 0, 22}, + Package() { 0x0003ffff, 1, 0, 23}, + Package() { 0x0003ffff, 2, 0, 20}, + Package() { 0x0003ffff, 3, 0, 21}, + + Package() { 0x0004ffff, 0, 0, 23}, + Package() { 0x0004ffff, 1, 0, 20}, + Package() { 0x0004ffff, 2, 0, 21}, + Package() { 0x0004ffff, 3, 0, 22}, + + Package() { 0x0005ffff, 0, 0, 19}, + Package() { 0x0005ffff, 1, 0, 18}, + Package() { 0x0005ffff, 2, 0, 17}, + Package() { 0x0005ffff, 3, 0, 16}, + + Package() { 0x0006ffff, 0, 0, 18}, + Package() { 0x0006ffff, 1, 0, 17}, + Package() { 0x0006ffff, 2, 0, 16}, + Package() { 0x0006ffff, 3, 0, 19}, + + Package() { 0x0009ffff, 0, 0, 21}, + Package() { 0x0009ffff, 1, 0, 22}, + Package() { 0x0009ffff, 2, 0, 23}, + Package() { 0x0009ffff, 3, 0, 20}, + }) +} Else { + Return (Package() { + Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0}, + + Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0}, + + Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKE, 0}, + + Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKF, 0}, + + Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKG, 0}, + + Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKD, 0}, + Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKC, 0}, + Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKB, 0}, + Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKA, 0}, + + Package() { 0x0006ffff, 0, \_SB.PCI0.LPCB.LNKC, 0}, + Package() { 0x0006ffff, 1, \_SB.PCI0.LPCB.LNKB, 0}, + Package() { 0x0006ffff, 2, \_SB.PCI0.LPCB.LNKA, 0}, + Package() { 0x0006ffff, 3, \_SB.PCI0.LPCB.LNKD, 0}, + + Package() { 0x0009ffff, 0, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0009ffff, 1, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0009ffff, 2, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0009ffff, 3, \_SB.PCI0.LPCB.LNKE, 0}, + }) +} + diff --git a/src/mainboard/nec/945g-m4/acpi/platform.asl b/src/mainboard/nec/945g-m4/acpi/platform.asl new file mode 100644 index 0000000..6770348 --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/platform.asl @@ -0,0 +1,90 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) // SMI Function + Store (0, TRP0) // Generate trap + Return (SMIF) // Return value of SMI handler +} + +/* The _PIC method is called by the OS to choose between interrupt + * routing via the i8259 interrupt controller or the APIC. + * + * _PIC is called with a parameter of 0 for i8259 configuration and + * with a parameter of 1 for Local Apic/IOAPIC configuration. + */ + +Method(_PIC, 1) +{ + // Remember the OS' IRQ routing choice. + Store(Arg0, PICM) +} + +/* The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0 + */ + +Method(_PTS,1) +{ + // Call a trap so SMI can prepare for Sleep as well. + // TRAP(0x55) +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + // CPU specific part + + // Notify PCI Express slots in case a card + // was inserted while a sleep state was active. + + // Are we going to S3? + If (LEqual(Arg0, 3)) { + // .. + } + + // Are we going to S4? + If (LEqual(Arg0, 4)) { + // .. + } + + // TODO: Windows XP SP2 P-State restore + + Return(Package(){0,0}) +} diff --git a/src/mainboard/nec/945g-m4/acpi/superio.asl b/src/mainboard/nec/945g-m4/acpi/superio.asl new file mode 100644 index 0000000..997a33a --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/superio.asl @@ -0,0 +1,92 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + +Device (SIO1) +{ + Name (_HID, EISAID("PNP0A05")) + Name (_UID, 1) + + Device (UAR1) + { + Name(_HID, EISAID("PNP0501")) + Name(_UID, 1) + Name(_DDN, "COM1") + + Method (_STA, 0) + { + // always enable for now + Return (0x0f) + } + + Method (_DIS, 0) { /* NOOP */ } + + Name (_PRS, ResourceTemplate() { + StartDependentFn(0, 1) { + IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8) + IRQNoFlags() { 4 } + } EndDependentFn() + }) + + Method (_CRS, 0) + { + Return(ResourceTemplate() { + IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8) + IRQNoFlags() { 4 } + }) + } + // Some methods need an implementation here: + // missing: _STA, _DIS, _CRS, _PRS, + // missing: _SRS, _PS0, _PS3 + } + + Device (UAR2) + { + Name(_HID, EISAID("PNP0501")) + Name(_UID, 2) + Name(_DDN, "COM2") + + Method (_STA, 0) + { + // always enable for now + Return (0x0f) + } + + Method (_DIS, 0) { /* NOOP */ } + + Name (_PRS, ResourceTemplate() { + StartDependentFn(0, 1) { + IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8) + IRQNoFlags() { 3 } + } EndDependentFn() + }) + + Method (_CRS, 0) + { + Return(ResourceTemplate() { + IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8) + IRQNoFlags() { 3 } + }) + } + // Some methods need an implementation here: + // missing: _STA, _DIS, _CRS, _PRS, + // missing: _SRS, _PS0, _PS3 + } +} + diff --git a/src/mainboard/nec/945g-m4/acpi/thermal.asl b/src/mainboard/nec/945g-m4/acpi/thermal.asl new file mode 100644 index 0000000..ede22fa --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/thermal.asl @@ -0,0 +1,94 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +// Thermal Zone + +Scope (\_TZ) +{ + ThermalZone (THRM) + { + + // FIXME these could/should be read from the + // GNVS area, so they can be controlled by + // coreboot + Name(TC1V, 0x04) + Name(TC2V, 0x03) + Name(TSPV, 0x64) + + // At which temperature should the OS start + // active cooling? + Method (_AC0, 0, Serialized) + { + Return (0xf5c) // Value for Rocky + } + + // Method (_AC1, 0, Serialized) + // { + // Return (0xf5c) + // } + + // Critical shutdown temperature + Method (_CRT, 0, Serialized) + { + Return (Add (0x0aac, 0x50)) // FIXME + } + + // CPU throttling start temperature + Method (_PSV, 0, Serialized) + { + Return (0xaaf) // FIXME + } + + // Get DTS Temperature + Method (_TMP, 0, Serialized) + { + Return (0xaac) // FIXME + } + + // Processors used for active cooling + Method (_PSL, 0, Serialized) + { + If (MPEN) { + Return (Package() {\_PR.CPU1, \_PR.CPU2}) + } + Return (Package() {\_PR.CPU1}) + } + + // TC1 value for passive cooling + Method (_TC1, 0, Serialized) + { + Return (TC1V) + } + + // TC2 value for passive cooling + Method (_TC2, 0, Serialized) + { + Return (TC2V) + } + + // Sampling period for passive cooling + Method (_TSP, 0, Serialized) + { + Return (TSPV) + } + + + } +} + diff --git a/src/mainboard/nec/945g-m4/acpi/video.asl b/src/mainboard/nec/945g-m4/acpi/video.asl new file mode 100644 index 0000000..3ececa9 --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi/video.asl @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +// Brightness write +Method (BRTW, 1, Serialized) +{ + // TODO +} + +// Hot Key Display Switch +Method (HKDS, 1, Serialized) +{ + // TODO +} + +// Lid Switch Display Switch +Method (LSDS, 1, Serialized) +{ + // TODO +} + +// Brightness Notification +Method(BRTN,1,Serialized) +{ + // TODO (no displays defined yet) +} + diff --git a/src/mainboard/nec/945g-m4/acpi_tables.c b/src/mainboard/nec/945g-m4/acpi_tables.c new file mode 100644 index 0000000..dba2953 --- /dev/null +++ b/src/mainboard/nec/945g-m4/acpi_tables.c @@ -0,0 +1,77 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <string.h> +#include <console/console.h> +#include <arch/acpi.h> +#include <arch/ioapic.h> +#include <arch/acpigen.h> +#include <arch/smp/mpspec.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <cpu/x86/msr.h> + +#include "southbridge/intel/i82801gx/nvs.h" +void acpi_create_gnvs(global_nvs_t *gnvs) +{ + /* Enable both COM ports */ + gnvs->cmap = 0x01; + gnvs->cmbp = 0x01; + + /* IGD Displays */ + gnvs->ndid = 3; + gnvs->did[0] = 0x80000100; + gnvs->did[1] = 0x80000240; + gnvs->did[2] = 0x80000410; + gnvs->did[3] = 0x80000410; + gnvs->did[4] = 0x00000005; +} + +unsigned long acpi_fill_madt(unsigned long current) +{ + /* Local APICs */ + current = acpi_create_madt_lapics(current); + + /* IOAPIC */ + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, + 2, IO_APIC_ADDR, 0); + + /* INT_SRC_OVR */ + current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) + current, 0, 0, 2, 0); + current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) + current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH); + + return current; +} + +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + diff --git a/src/mainboard/nec/945g-m4/board_info.txt b/src/mainboard/nec/945g-m4/board_info.txt new file mode 100644 index 0000000..dc67898 --- /dev/null +++ b/src/mainboard/nec/945g-m4/board_info.txt @@ -0,0 +1,15 @@ +Board name:945G-M4 (Rev: B) +Category: µATX 24.4 cm x 24.4 cm Form Factor +Board URL: http://www.nec-computers.com/support2/pib.asp?platform=spec_veracruz&mode=d… +ROM package: PLCC +ROM protocol: FWH +ROM socketed: y +Flashrom support: y + +superiotool: https://www.dropbox.com/s/bn3478cz1n4g76x/superIOtool.txt?dl=0 +inteltool: https://www.dropbox.com/s/fnygo2juum6qcth/inteltool-log.txt?dl=0 +facp.dsl: https://www.dropbox.com/s/7r9po39nn9vd8af/facp.dsl?dl=0 +dsdt.dsl: https://www.dropbox.com/s/uei35yaon0vtr2d/dsdt.dsl?dl=0 +ssdt1.dsl: https://www.dropbox.com/s/s20t7mr4invzcgj/ssdt1.dsl?dl=0 +ssdt2.dsl: https://www.dropbox.com/s/d71lqmc871lzgxi/ssdt2.dsl?dl=0 +getpir (irq_tables.c): https://www.dropbox.com/s/mf6gbdzxb2mx3ty/irq_tables.c?dl=0 \ No newline at end of file diff --git a/src/mainboard/nec/945g-m4/cmos.layout b/src/mainboard/nec/945g-m4/cmos.layout new file mode 100644 index 0000000..b3e8c4e --- /dev/null +++ b/src/mainboard/nec/945g-m4/cmos.layout @@ -0,0 +1,194 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2008 coresystems GmbH +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# ----------------------------------------------------------------- +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +# ----------------------------------------------------------------- +# Status Register A +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +# ----------------------------------------------------------------- +# Status Register B +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +# ----------------------------------------------------------------- +# Status Register C +#96 4 r 0 status_c_rsvd +#100 1 r 0 uf_flag +#101 1 r 0 af_flag +#102 1 r 0 pf_flag +#103 1 r 0 irqf_flag +# ----------------------------------------------------------------- +# Status Register D +#104 7 r 0 status_d_rsvd +#111 1 r 0 valid_cmos_ram +# ----------------------------------------------------------------- +# Diagnostic Status Register +#112 8 r 0 diag_rsvd1 + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory +#120 264 r 0 unused + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +385 1 e 4 last_boot +388 4 r 0 reboot_bits +#390 2 r 0 unused? + +# ----------------------------------------------------------------- +# coreboot config options: console +392 3 e 5 baud_rate +395 4 e 6 debug_level +#399 1 r 0 unused + +# coreboot config options: cpu +400 1 e 2 hyper_threading +#401 7 r 0 unused + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail +#411 5 r 0 unused + +# coreboot config options: bootloader +416 512 s 0 boot_devices +#928 40 r 0 unused + +# coreboot config options: mainboard specific options +948 2 e 8 cpufan_cruise_control +950 2 e 8 sysfan_cruise_control +952 4 e 9 cpufan_speed +#956 4 e 10 cpufan_temperature +960 4 e 9 sysfan_speed +#964 4 e 10 sysfan_temperature + +968 1 e 2 ethernet1 +969 1 e 2 ethernet2 +970 1 e 2 ethernet3 + +#971 13 r 0 unused + +# coreboot config options: check sums +984 16 h 0 check_sum +#1000 24 r 0 amd_reserved + +# ram initialization internal data +1024 8 r 0 C0WL0REOST +1032 8 r 0 C1WL0REOST +1040 8 r 0 RCVENMT +1048 4 r 0 C0DRT1 +1052 4 r 0 C1DRT1 + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 1 Emergency +6 2 Alert +6 3 Critical +6 4 Error +6 5 Warning +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Disable +7 1 Enable +7 2 Keep +# Fan Cruise Control +8 0 Disabled +8 1 Speed +#8 2 Thermal +# Fan Speed (Rotations per Minute) +9 0 5625 +9 1 5192 +9 2 4753 +9 3 4326 +9 4 3924 +9 5 3552 +9 6 3214 +9 7 2909 +9 8 2636 +9 9 2393 +9 10 2177 +9 11 1985 +9 12 1814 +9 13 1662 +9 14 1527 +9 15 1406 +# +# Temperature (�C/�F) +#10 0 30/86 +#10 1 33/91 +#10 2 36/96 +#10 3 39/102 +#10 4 42/107 +#10 5 45/113 +#10 6 48/118 +#10 7 51/123 +#10 8 54/129 +#10 9 57/134 +#10 10 60/140 +#10 11 63/145 +#10 12 66/150 +#10 13 69/156 +#10 14 72/161 +#10 15 75/167 +# ----------------------------------------------------------------- +checksums + +checksum 392 983 984 + + diff --git a/src/mainboard/nec/945g-m4/devicetree.cb b/src/mainboard/nec/945g-m4/devicetree.cb new file mode 100644 index 0000000..7423f30 --- /dev/null +++ b/src/mainboard/nec/945g-m4/devicetree.cb @@ -0,0 +1,121 @@ +chip northbridge/intel/i945 + device cpu_cluster 0 on + chip cpu/intel/socket_LGA775 + device lapic 0 on end + end + end + device domain 0 on + device pci 00.0 on end # 82945G/GZ/P/PL Memory Controller Hub [8086:2770] + device pci 02.0 on end # 82945G/GZ Integrated Graphics Controller [8086:2772] + chip southbridge/intel/i82801gx + register "pirqa_routing" = "0x8a" + register "pirqb_routing" = "0x85" + register "pirqc_routing" = "0x8a" + register "pirqd_routing" = "0x8b" + register "pirqe_routing" = "0x80" + register "pirqf_routing" = "0x80" + register "pirqg_routing" = "0x80" + register "pirqh_routing" = "0x87" + + # GPI routing + # 0 No effect (default) + # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) + # 2 SCI (if corresponding GPIO_EN bit is also set) + register "gpi13_routing" = "1" + register "ide_legacy_combined" = "0x0" + register "ide_enable_primary" = "0x1" + register "ide_enable_secondary" = "0x0" + register "sata_ahci" = "0x1" + + device pci 1c.0 on end # PCI Express Gigabit Ethernet Controller [10ec:8168] + device pci 1d.0 on end # NM10/ICH7 Family USB UHCI Controller #1 [8086:27c8] + device pci 1d.1 on end # NM10/ICH7 Family USB UHCI Controller #2 [8086:27c9] + device pci 1d.2 on end # NM10/ICH7 Family USB UHCI Controller #3 [8086:27ca] + device pci 1d.3 on end # NM10/ICH7 Family USB UHCI Controller #4 [8086:27cb] + device pci 1d.7 on end # NM10/ICH7 Family USB2 EHCI Controller [8086:27cc] + device pci 1e.0 on end # 82801 PCI Bridge [8086:244e] + device pci 1e.2 on end # 82801G (ICH7 Family) AC'97 Audio Controller [8086:27de] + device pci 1f.0 on # 82801GB/GR (ICH7 Family) LPC Interface Bridge [8086:27b8] + + chip superio/winbond/w83627ehg # Super I/O Winbond + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + + device pnp 2e.1 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + drq 0x74 = 3 + end + + device pnp 2e.2 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + + device pnp 2e.3 off # COM2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + irq 0xf0 = 0x82 + end + + device pnp 2e.106 on # Serial flash interface + io 0x60 = 0x100 + end + + device pnp 2e.007 on # GPIO 1 + end + + device pnp 2e.107 off # Game port + io 0x60 = 0x201 + end + + device pnp 2e.207 on # MIDI + io 0x62 = 0x330 + irq 0x70 = 0xa + end + + device pnp 2e.307 on # GPIO 6 + end + + device pnp 2e.8 off # WDTO#, PLED + end + + device pnp 2e.009 on # GPIO 2 + end + + device pnp 2e.109 on # GPIO 3 + end + + device pnp 2e.209 on # GPIO 4 + end + + device pnp 2e.309 on # GPIO 5 + end + + device pnp 2e.a on # ACPI + end + + device pnp 2e.b on # Hardware monitor + io 0x60 = 0xa10 + irq 0x70 = 0 + end + + end # Winbond + end # LPC + + device pci 1f.1 on end # 82801G (ICH7 Family) IDE Controller [8086:27df] + device pci 1f.2 on end # NM10/ICH7 Family SATA Controller [IDE mode] [8086:27c0] + device pci 1f.3 on end # NM10/ICH7 Family SMBus Controller [8086:27da] + end # i82801gx + end # domain 0 +end diff --git a/src/mainboard/nec/945g-m4/dsdt.asl b/src/mainboard/nec/945g-m4/dsdt.asl new file mode 100644 index 0000000..05a93d3 --- /dev/null +++ b/src/mainboard/nec/945g-m4/dsdt.asl @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +DefinitionBlock ("dsdt.aml", "DSDT", 1, "COREv4", "COREBOOT", 0x00000108) +{ + // Some generic macros + #include "acpi/platform.asl" + + // global NVS and variables + #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> + //#include "acpi/platform.asl" + + // General Purpose Events + //#include "acpi/gpe.asl" + + //#include "acpi/thermal.asl" + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/i945/acpi/i945.asl> + #include <southbridge/intel/i82801gx/acpi/ich7.asl> + } + } + + /* Chipset specific sleep states */ + #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> +} diff --git a/src/mainboard/nec/945g-m4/hda_verb.c b/src/mainboard/nec/945g-m4/hda_verb.c new file mode 100644 index 0000000..aaa0a93 --- /dev/null +++ b/src/mainboard/nec/945g-m4/hda_verb.c @@ -0,0 +1,5 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; +const u32 pc_beep_verbs[0] = {}; +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/nec/945g-m4/irq_tables.c b/src/mainboard/nec/945g-m4/irq_tables.c new file mode 100644 index 0000000..d51d2ef --- /dev/null +++ b/src/mainboard/nec/945g-m4/irq_tables.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2008 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/pirq_routing.h> + + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32 + 16 * 14, /* Max. number of devices on the bus */ + 0x00, /* Interrupt router bus */ + (0x1f << 3) | 0x0, /* Interrupt router dev */ + 0, /* IRQs devoted exclusively to PCI usage */ + 0x8086, /* Vendor */ + 0x27b0, /* Device */ + 0, /* Miniport */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0xb, /* Checksum (has to be set to some value that + * would give 0 after the sum of all bytes + * for this structure (including checksum). + */ + { + /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00, (0x01 << 3) | 0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcf8}}, 0x0, 0x0}, + {0x00, (0x02 << 3) | 0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x00, (0x1e << 3) | 0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x00, (0x1f << 3) | 0x0, {{0x62, 0xdcf8}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x00, (0x1d << 3) | 0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdcf8}, {0x60, 0xdcf8}}, 0x0, 0x0}, + {0x00, (0x1b << 3) | 0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x00, (0x1c << 3) | 0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcf8}}, 0x0, 0x0}, + {0x02, (0x00 << 3) | 0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcf8}}, 0x20, 0x0}, + {0x03, (0x03 << 3) | 0x0, {{0x63, 0xdcf8}, {0x62, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}}, 0x4, 0x0}, + {0x03, (0x04 << 3) | 0x0, {{0x62, 0xdcf8}, {0x6b, 0xdcf8}, {0x60, 0xdcf8}, {0x68, 0xdcf8}}, 0x5, 0x0}, + {0x03, (0x05 << 3) | 0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}}, 0x6, 0x0}, + {0x03, (0x01 << 3) | 0x0, {{0x62, 0xdcf8}, {0x63, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}}, 0x1, 0x0}, + {0x03, (0x02 << 3) | 0x0, {{0x63, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}}, 0x2, 0x0}, + {0x03, (0x08 << 3) | 0x0, {{0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + } +}; + +unsigned long write_pirq_routing_table(unsigned long addr) +{ + return copy_pirq_routing_table(addr, &intel_irq_routing_table); +} diff --git a/src/mainboard/nec/945g-m4/mainboard.c b/src/mainboard/nec/945g-m4/mainboard.c new file mode 100644 index 0000000..508d693 --- /dev/null +++ b/src/mainboard/nec/945g-m4/mainboard.c @@ -0,0 +1,94 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <device/device.h> +#include <console/console.h> +#if CONFIG_VGA_ROM_RUN +#include <x86emu/x86emu.h> +#endif +#include <pc80/mc146818rtc.h> +#include <arch/io.h> +#include <arch/interrupt.h> +#include "superio_hwm.h" + +#if CONFIG_VGA_ROM_RUN +static int int15_handler(void) +{ +#define BOOT_DISPLAY_DEFAULT 0 +#define BOOT_DISPLAY_CRT (1 << 0) +#define BOOT_DISPLAY_TV (1 << 1) +#define BOOT_DISPLAY_EFP (1 << 2) +#define BOOT_DISPLAY_LCD (1 << 3) +#define BOOT_DISPLAY_CRT2 (1 << 4) +#define BOOT_DISPLAY_TV2 (1 << 5) +#define BOOT_DISPLAY_EFP2 (1 << 6) +#define BOOT_DISPLAY_LCD2 (1 << 7) + + printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n", + __func__, X86_AX, X86_BX, X86_CX, X86_DX); + + switch (X86_AX) { + case 0x5f35: /* Boot Display */ + X86_AX = 0x005f; // Success + X86_CL = BOOT_DISPLAY_DEFAULT; + break; + case 0x5f40: /* Boot Panel Type */ + // M.x86.R_AX = 0x015f; // Supported but failed + X86_AX = 0x005f; // Success + X86_CL = 3; // Display ID + break; + default: + /* Interrupt was not handled */ + return 0; + } + + /* Interrupt handled */ + return 1; +} +#endif +/* Audio Setup */ + +extern u32 * cim_verb_data; +extern u32 cim_verb_data_size; + +static void verb_setup(void) +{ + // Default VERB is fine on this mainboard. + cim_verb_data = NULL; + cim_verb_data_size = 0; +} + +// mainboard_enable is executed as first thing after +// enumerate_buses(). + +static void mainboard_enable(device_t dev) +{ +#if CONFIG_VGA_ROM_RUN + /* Install custom int15 handler for VGA OPROM */ + mainboard_interrupt_handlers(0x15, &int15_handler); +#endif + verb_setup(); +// hwm_setup(); /* commented while debugging */ +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; + diff --git a/src/mainboard/nec/945g-m4/mptable.c b/src/mainboard/nec/945g-m4/mptable.c new file mode 100644 index 0000000..eed8fa6 --- /dev/null +++ b/src/mainboard/nec/945g-m4/mptable.c @@ -0,0 +1,106 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2008 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <arch/smp/mpspec.h> +#include <arch/ioapic.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> +#define INTA 0x00 +#define INTB 0x01 +#define INTC 0x02 +#define INTD 0x03 +static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length) +{ + mc->mpc_length += length; + mc->mpc_entry_count++; +} +static void my_smp_write_bus(struct mp_config_table *mc, + unsigned char id, const char *bustype) +{ + struct mpc_config_bus *mpc; + mpc = smp_next_mpc_entry(mc); + memset(mpc, '\0', sizeof(*mpc)); + mpc->mpc_type = MP_BUS; + mpc->mpc_busid = id; + memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype)); + smp_add_mpc_entry(mc, sizeof(*mpc)); +} +static void *smp_write_config_table(void *v) +{ + struct mp_config_table *mc; + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mptable_init(mc, LOCAL_APIC_ADDR); + smp_write_processors(mc); + /* Bus: Bus ID Type */ + my_smp_write_bus(mc, 0, "PCI "); + my_smp_write_bus(mc, 1, "PCI "); + my_smp_write_bus(mc, 2, "PCI "); + my_smp_write_bus(mc, 3, "PCI "); + my_smp_write_bus(mc, 4, "ISA "); + /* I/O APICs: APIC ID Version State Address */ + smp_write_ioapic(mc, 0x1, 0x20, VIO_APIC_VADDR); + /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ + smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x0, 0x1, 0x0); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x1, 0x1, 0x1); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x0, 0x1, 0x2); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x3, 0x1, 0x3); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x4, 0x1, 0x4); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x6, 0x1, 0x6); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x7, 0x1, 0x7); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x4, 0x8, 0x1, 0x8); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0x9, 0x1, 0x9); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0xc, 0x1, 0xc); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0xd, 0x1, 0xd); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0xe, 0x1, 0xe); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x4, 0xf, 0x1, 0xf); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x01 << 2) | INTA, 0x1, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, (0x00 << 2) | INTA, 0x1, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1e << 2) | INTA, 0x1, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1f << 2) | INTA, 0x1, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1f << 2) | INTB, 0x1, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1d << 2) | INTA, 0x1, 0x17); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1d << 2) | INTB, 0x1, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1d << 2) | INTC, 0x1, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1d << 2) | INTD, 0x1, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, (0x1c << 2) | INTA, 0x1, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, (0x00 << 2) | INTA, 0x1, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, (0x02 << 2) | INTA, 0x1, 0x13); + /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ + smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x0); + smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x1); +/* mptable_lintsrc(mc, isa_bus); */ + /* Compute the checksums */ + return mptable_finalize(mc); +} +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr, 1); + return (unsigned long)smp_write_config_table(v); +} +/*MP Config Extended Table Entries: +-- +System Address Space + bus ID: 0 address type: I/O address + address base: 0x600000000000 + address range: 0x148000000000 +Extended Table HOSED! +*/ diff --git a/src/mainboard/nec/945g-m4/romstage.c b/src/mainboard/nec/945g-m4/romstage.c new file mode 100644 index 0000000..80679e7 --- /dev/null +++ b/src/mainboard/nec/945g-m4/romstage.c @@ -0,0 +1,237 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2014 coreboot + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <stdint.h> +#include <string.h> +#include <arch/io.h> +#include <device/pci_def.h> +#include <device/pnp_def.h> +#include <cpu/x86/lapic.h> +#include <cpu/intel/romstage.h> +#include <lib.h> +#include <arch/acpi.h> +#include <cbmem.h> +#include <superio/winbond/common/winbond.h> +#include <superio/winbond/w83627ehg/w83627ehg.h> +#include <pc80/mc146818rtc.h> +#include <console/console.h> +#include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> +#include <halt.h> +#include <northbridge/intel/i945/i945.h> +#include <northbridge/intel/i945/raminit.h> +#include <southbridge/intel/i82801gx/i82801gx.h> + +#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) +#define LPC_DEV PCI_DEV(0, 0x1f, 0) + +void setup_ich7_gpios(void) +{ + + printk(BIOS_DEBUG, "GPIOS..."); + /* General Registers */ + outl(0x1f9fffc3, DEFAULT_GPIOBASE + 0x00); /* GPIO_USE_SEL */ + outl(0xe0e8ffc3, DEFAULT_GPIOBASE + 0x04); /* GP_IO_SEL */ + outl(0xebffffbf, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */ + /* Output Control Registers */ + outl(0x00000000, DEFAULT_GPIOBASE + 0x18); /* GPO_BLINK */ + /* Input Control Registers */ + outl(0x0000af03, DEFAULT_GPIOBASE + 0x2c); /* GPI_INV */ + outl(0x000000ff, DEFAULT_GPIOBASE + 0x30); /* GPIO_USE_SEL2 */ + outl(0x000000f0, DEFAULT_GPIOBASE + 0x34); /* GP_IO_SEL2 */ + outl(0x000000f7, DEFAULT_GPIOBASE + 0x38); /* GP_LVL2 */ +} + +static void ich7_enable_lpc(void) +{ + // Enable Serial IRQ + pci_write_config8(LPC_DEV, 0x64, 0xd0); + // LPC I/O decode range + pci_write_config16(LPC_DEV, 0x80, 0x0010); + // LPC Interface Enables + pci_write_config16(LPC_DEV, 0x82, 0x340f); + // GEN1_DEC. LPC interface generic decode Rang1 + pci_write_config32(LPC_DEV, 0x84, 0x00fc0a01); + // GEN2_DEC. LPC interface generic decode Rang2 + pci_write_config32(LPC_DEV, 0x88, 0x00fc4701); + +} + +static void rcba_config(void) +{ + /* Set up virtual channel 0 */ + RCBA32(0x0014) = 0x80000001; + RCBA32(0x001c) = 0x03128010; + +/* Device 1f interrupt pin register */ + RCBA32(0x3100) = 0x00042210; + /* Device 1d interrupt pin register */ + RCBA32(0x310c) = 0x00214321; + /* HD Audio Interrupt */ + RCBA32(0x3110) = 0x00000001; + /* dev irq route register */ + RCBA16(0x3140) = 0x0132; + RCBA16(0x3142) = 0x0146; + RCBA16(0x3144) = 0x0237; + RCBA16(0x3146) = 0x3201; + RCBA16(0x3148) = 0x0146; + /* Enable IOAPIC */ + RCBA8(0x31ff) |= 3 << 24; + /* Enable upper 128bytes of CMOS */ + RCBA32(0x3400) = (1 << 2); + /* Enable PCIe Root Port Clock Gate */ + RCBA32(0x341c) = 0x00000001; +} + +static void early_ich7_init(void) +{ + uint8_t reg8; + uint32_t reg32; + printk(BIOS_DEBUG, "program secondary mlt XXX byte \n"); + pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20); +printk(BIOS_DEBUG, "reset rtc power status \n"); + reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4); + reg8 &= ~(1 << 2); + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8); +printk(BIOS_DEBUG, "usb transient disconnect \n"); + reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad); + reg8 |= (3 << 0); + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xad, reg8); + reg32 = pci_read_config32(PCI_DEV(0, 0x1d, 7), 0xfc); + reg32 |= (1 << 29) | (1 << 17); + pci_write_config32(PCI_DEV(0, 0x1d, 7), 0xfc, reg32); + reg32 = pci_read_config32(PCI_DEV(0, 0x1d, 7), 0xdc); + reg32 |= (1 << 31) | (1 << 27); + pci_write_config32(PCI_DEV(0, 0x1d, 7), 0xdc, reg32); + + /*./inteltool -r on vendor bios*/ + RCBA32(0x0088) = 0x0011d000; + RCBA16(0x01fc) = 0x060f; + RCBA32(0x01f4) = 0x86000040; + RCBA32(0x0214) = 0x10030549; + RCBA32(0x0218) = 0x00020504; + RCBA8(0x0220) = 0xc5; + reg32 = RCBA32(0x3410); + reg32 |= (1 << 6); + RCBA32(0x3410) = reg32; + reg32 = RCBA32(0x3430); + reg32 &= ~(3 << 0); + reg32 |= (1 << 0); + RCBA32(0x3430) = reg32; + RCBA32(0x3418) |= (1 << 0); + RCBA16(0x0200) = 0x2008; + RCBA8(0x2027) = 0x0d; + RCBA16(0x3e08) |= (1 << 7); + RCBA16(0x3e48) |= (1 << 7); +// RCBA32(0x3e0e) |= (1 << 7); +// RCBA32(0x3e4e) |= (1 << 7); + // next step only on ich7m b0 and later: + reg32 = RCBA32(0x2034); + reg32 &= ~(0x0f << 16); + reg32 |= (5 << 16); + RCBA32(0x2034) = reg32; + + +} + +void main(unsigned long bist) +{ + int s3resume = 0; +device_t dev; + if (bist == 0) + enable_lapic(); + + ich7_enable_lpc(); + /* Set up the console */ +// winbond_enable_serial(SERIAL_DEV,CONFIG_TTYS0_BASE); + + dev=PNP_DEV(0x2e, W83627EHG_SP1); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x3f8); + pnp_set_irq(dev, PNP_IDX_IRQ0, 4); + pnp_set_enable(dev, 1); +// SuperIO + dev=PNP_DEV(0x2e, W83627EHG_KBC); // Keyboard + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x60); + pnp_set_iobase(dev, PNP_IDX_IO1, 0x64); + //pnp_write_config(dev, 0xf0, 0x82); + pnp_set_enable(dev, 1); + + dev=PNP_DEV(0x2e, W83627EHG_GPIO2); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 1); + + dev=PNP_DEV(0x2e, W83627EHG_GPIO3); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_write_config(dev, 0xf0, 0xfb); // GPIO bit 2 + pnp_write_config(dev, 0xf1, 0x00); // GPIO bit 2 + pnp_write_config(dev, 0x30, 0x03); // Enable GPIO3+4 + + dev=PNP_DEV(0x2e, W83627EHG_FDC); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + + dev=PNP_DEV(0x2e, W83627EHG_PP); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + + /* Enable HWM */ + dev=PNP_DEV(0x2e, W83627EHG_HWM); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, 0xa00); + pnp_set_enable(dev, 1); + + pnp_exit_ext_func_mode(dev); +// + console_init(); + + report_bist_failure(bist); + if (MCHBAR16(SSKPD) == 0xCAFE) { + printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n"); + outb(0x6, 0xcf9); + halt(); + } + /* Perform some early chipset initialization required + * before RAM initialization can work + */ + + i945_early_initialization(); + s3resume = southbridge_detect_s3_resume(); + +printk(BIOS_DEBUG, "Enable SPD ROMs and DDR-II DRAM \n"); + enable_smbus(); + +#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8 + dump_spd_registers(); +#endif + sdram_initialize(s3resume ? 2 : 0, NULL); +printk(BIOS_DEBUG, "Perform some initialization that must run before stage2 \n"); + early_ich7_init(); + +rcba_config(); +printk(BIOS_DEBUG, "Chipset Errata! \n"); +// fixup_i945_errata(); this is probably not for desktop version. + +printk(BIOS_DEBUG, "Initialize the internal PCIe links before we go into stage2 \n"); + i945_late_initialization(s3resume); +} diff --git a/src/mainboard/nec/945g-m4/smihandler.c b/src/mainboard/nec/945g-m4/smihandler.c new file mode 100644 index 0000000..d1f4f7b --- /dev/null +++ b/src/mainboard/nec/945g-m4/smihandler.c @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/console.h> +#include <cpu/x86/smm.h> +#include <southbridge/intel/i82801gx/nvs.h> + +/* The southbridge SMI handler checks whether gnvs has a + * valid pointer before calling the trap handler + */ +extern global_nvs_t *gnvs; + +int mainboard_io_trap_handler(int smif) +{ + switch (smif) { + case 0x99: + printk(BIOS_DEBUG, "Sample\n"); + gnvs->smif = 0; + break; + default: + return 0; + } + + /* On success, the IO Trap Handler returns 0 + * On failure, the IO Trap Handler returns a value != 0 + * + * For now, we force the return value to 0 and log all traps to + * see what's going on. + */ + //gnvs->smif = 0; + return 1; +} diff --git a/src/mainboard/nec/945g-m4/superio_hwm.c b/src/mainboard/nec/945g-m4/superio_hwm.c new file mode 100644 index 0000000..622f8e8 --- /dev/null +++ b/src/mainboard/nec/945g-m4/superio_hwm.c @@ -0,0 +1,161 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <device/device.h> +#include <console/console.h> +#include <arch/io.h> +#include <pc80/mc146818rtc.h> + +#include "superio_hwm.h" + +/* Hardware Monitor */ + +#define FAN_CRUISE_CONTROL_DISABLED 0 +#define FAN_CRUISE_CONTROL_SPEED 1 +#define FAN_CRUISE_CONTROL_THERMAL 2 + +#define FAN_SPEED_5625 0 +//#define FAN_TEMPERATURE_30DEGC 0 + +#define HWM_BASE 0x290 + +static void hwm_write(u8 reg, u8 value) +{ + outb(reg, HWM_BASE + 0x05); // Index port + outb(value, HWM_BASE + 0x06); // Data port +} + +static void hwm_bank(u8 bank) +{ + hwm_write(0x2e, bank); +} + +struct fan_speed { + u8 fan_in; + u16 fan_speed; +}; + +// FANIN Target Speed Register +// FANIN = 337500 / RPM +struct fan_speed fan_speeds[] = { + { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 }, + { 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 }, + { 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 }, + { 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 } +}; + +struct temperature { + u8 deg_celsius; + u8 deg_fahrenheit; +}; + +struct temperature temperatures[] = { + { 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 }, + { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 }, + { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 }, + { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 } +}; + +void hwm_setup(void) +{ + int cpufan_control = 0, sysfan_control = 0; + int cpufan_speed = 0, sysfan_speed = 0; + int cpufan_temperature = 0, sysfan_temperature = 0; + + if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) + cpufan_control = FAN_CRUISE_CONTROL_DISABLED; + if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) + cpufan_speed = FAN_SPEED_5625; + //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) + // cpufan_temperature = FAN_TEMPERATURE_30DEGC; + + if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) + sysfan_control = FAN_CRUISE_CONTROL_DISABLED; + if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) + sysfan_speed = FAN_SPEED_5625; + //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) + // sysfan_temperature = FAN_TEMPERATURE_30DEGC; + + // hwm_write(0x31, 0x20); // AVCC high limit + // hwm_write(0x34, 0x06); // VIN2 low limit + + hwm_bank(0); + hwm_write(0x59, 0x20); // Diode Selection + hwm_write(0x5d, 0x0f); // All Sensors Diode, not Thermistor + + hwm_bank(4); + hwm_write(0x54, 0xf1); // SYSTIN temperature offset + hwm_write(0x55, 0x19); // CPUTIN temperature offset + hwm_write(0x56, 0xfc); // AUXTIN temperature offset + + hwm_bank(0x80); // Default + + u8 fan_config = 0; + // 00 FANOUT is Manual Mode + // 01 FANOUT is Thermal Cruise Mode + // 10 FANOUT is Fan Speed Cruise Mode + switch (cpufan_control) { + case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 4); break; + case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break; + } + switch (sysfan_control) { + case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 2); break; + case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break; + } + // This register must be written first + hwm_write(0x04, fan_config); + + switch (cpufan_control) { + case FAN_CRUISE_CONTROL_SPEED: + printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n", + fan_speeds[cpufan_speed].fan_speed); + hwm_write(0x06, fan_speeds[cpufan_speed].fan_in); // CPUFANIN target speed + break; + case FAN_CRUISE_CONTROL_THERMAL: + printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n", + temperatures[cpufan_temperature].deg_celsius, + temperatures[cpufan_temperature].deg_fahrenheit); + hwm_write(0x06, temperatures[cpufan_temperature].deg_celsius); // CPUFANIN target temperature + break; + } + + switch (sysfan_control) { + case FAN_CRUISE_CONTROL_SPEED: + printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n", + fan_speeds[sysfan_speed].fan_speed); + hwm_write(0x05, fan_speeds[sysfan_speed].fan_in); // SYSFANIN target speed + break; + case FAN_CRUISE_CONTROL_THERMAL: + printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n", + temperatures[sysfan_temperature].deg_celsius, + temperatures[sysfan_temperature].deg_fahrenheit); + hwm_write(0x05, temperatures[sysfan_temperature].deg_celsius); // SYSFANIN target temperature + break; + } + + hwm_write(0x0e, 0x02); // Fan Output Step Down Time + hwm_write(0x0f, 0x02); // Fan Output Step Up Time + + hwm_write(0x47, 0xaf); // FAN divisor register + hwm_write(0x4b, 0x84); // AUXFANIN speed divisor + + hwm_write(0x40, 0x01); // Init, but no SMI# +} diff --git a/src/mainboard/nec/945g-m4/superio_hwm.h b/src/mainboard/nec/945g-m4/superio_hwm.h new file mode 100644 index 0000000..346b97c --- /dev/null +++ b/src/mainboard/nec/945g-m4/superio_hwm.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_HWM_H +#define SUPERIO_HWM_H + +void hwm_setup(void); + +#endif /* SUPERIO_HWM_H */ diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 776c051..5550332 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -219,26 +219,32 @@ static void i945_setup_egress_port(void) /* map only TC0 to VC0 */ reg32 = EPBAR32(EPVC0RCTL); +printk(BIOS_DEBUG, "EPVC0RCCTL: %08x\n", reg32); reg32 &= 0xffffff01; EPBAR32(EPVC0RCTL) = reg32; reg32 = EPBAR32(EPPVCCAP1); +printk(BIOS_DEBUG, "EPPVCCAP1: %08x\n", reg32); reg32 &= ~(7 << 0); reg32 |= 1; EPBAR32(EPPVCCAP1) = reg32; /* Egress Port Virtual Channel 1 Configuration */ reg32 = EPBAR32(0x2c); +printk(BIOS_DEBUG, "EPBAR at 0x2c: %08x\n", reg32); reg32 &= 0xffffff00; if ((MCHBAR32(CLKCFG) & 7) == 1) reg32 |= 0x0d; /* 533MHz */ + if ((MCHBAR32(CLKCFG) & 7) == 2) + reg32 |= 0x14; /* 800MHz */ if ((MCHBAR32(CLKCFG) & 7) == 3) reg32 |= 0x10; /* 667MHz */ EPBAR32(0x2c) = reg32; - +printk(BIOS_DEBUG, "EPBAR at 0x2c 2nd : %08x\n", reg32); EPBAR32(EPVC1MTS) = 0x0a0a0a0a; reg32 = EPBAR32(EPVC1RCAP); +printk(BIOS_DEBUG, "EPVC1RCAP: %08x\n", reg32); reg32 &= ~(0x7f << 16); reg32 |= (0x0a << 16); EPBAR32(EPVC1RCAP) = reg32; @@ -247,6 +253,11 @@ static void i945_setup_egress_port(void) EPBAR32(EPVC1IST + 0) = 0x009c009c; EPBAR32(EPVC1IST + 4) = 0x009c009c; } + if ((MCHBAR32(CLKCFG) & 7) == 2) { /* 800MHz */ + EPBAR32(EPVC1IST + 0) = 0x00f000f0; + EPBAR32(EPVC1IST + 4) = 0x00f000f0; +printk(BIOS_DEBUG, "CLKCFG & 7 donne 2"); + } if ((MCHBAR32(CLKCFG) & 7) == 3) { /* 667MHz */ EPBAR32(EPVC1IST + 0) = 0x00c000c0; @@ -255,11 +266,19 @@ static void i945_setup_egress_port(void) /* Is internal graphics enabled? */ if (pci_read_config8(PCI_DEV(0, 0x0, 0), DEVEN) & (DEVEN_D2F0 | DEVEN_D2F1)) { + if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) { + MCHBAR32(MMARB1) &= 0xFFFBFFFF; + MCHBAR32(C0DRC1) |= 2; + MCHBAR32(C1DRC1) |= 2; + }else{ MCHBAR32(MMARB1) |= (1 << 17); + } } - +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) +MCHBAR32(MMARB1 +4) |= 0x3000; /* Assign Virtual Channel ID 1 to VC1 */ reg32 = EPBAR32(EPVC1RCTL); +printk(BIOS_DEBUG, "EPVC1RCTL: ..%08x\n", reg32); reg32 &= ~(7 << 24); reg32 |= (1 << 24); EPBAR32(EPVC1RCTL) = reg32; @@ -268,7 +287,7 @@ static void i945_setup_egress_port(void) reg32 &= 0xffffff01; reg32 |= (1 << 7); EPBAR32(EPVC1RCTL) = reg32; - +printk(BIOS_DEBUG, "EPVC1RCTL: ..%08x\n", reg32); EPBAR32(PORTARB + 0x00) = 0x01000001; EPBAR32(PORTARB + 0x04) = 0x00040000; EPBAR32(PORTARB + 0x08) = 0x00001000; @@ -422,8 +441,13 @@ static void i945_setup_dmi_rcrb(void) /* Last but not least, some additional steps */ reg32 = MCHBAR32(FSBSNPCTL); +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770){ reg32 &= ~(0xff << 2); reg32 |= (0xaa << 2); +}else{ + reg32 &= 0x0fc; + reg32 |=2; +} MCHBAR32(FSBSNPCTL) = reg32; DMIBAR32(0x2c) = 0x86000040; @@ -431,9 +455,9 @@ static void i945_setup_dmi_rcrb(void) reg32 = DMIBAR32(0x204); reg32 &= ~0x3ff; #if 1 - reg32 |= 0x13f; /* for x4 DMI only */ + reg32 |= 0x13f; /* for x4 DMI only */ #else - reg32 |= 0x1e4; /* for x2 DMI only */ + reg32 |= 0x1e4; /* for x2 DMI only */ #endif DMIBAR32(0x204) = reg32; @@ -810,7 +834,7 @@ static void i945_setup_root_complex_topology(void) printk(BIOS_DEBUG, "Setting up Root Complex Topology\n"); /* Egress Port Root Topology */ - +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770){ reg32 = EPBAR32(EPESD); reg32 &= 0xff00ffff; reg32 |= (1 << 16); @@ -821,7 +845,7 @@ static void i945_setup_root_complex_topology(void) EPBAR32(EPLE1A) = (uintptr_t)DEFAULT_DMIBAR; EPBAR32(EPLE2D) |= (1 << 16) | (1 << 0); - +} /* DMI Port Root Topology */ reg32 = DMIBAR32(DMILE1D); @@ -903,6 +927,7 @@ static void i945_prepare_resume(int s3resume) * this is not a resume. In that case we just create the cbmem toc. */ if (s3resume && cbmem_was_initted) { + printk(BIOS_DEBUG, "step s3resume && cbmem_was_initted is True \n"); void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption @@ -922,6 +947,7 @@ static void i945_prepare_resume(int s3resume) void i945_late_initialization(int s3resume) { +// if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770) i945_setup_egress_port(); ich7_setup_root_complex_topology(); @@ -930,6 +956,7 @@ void i945_late_initialization(int s3resume) ich7_setup_dmi_rcrb(); +// if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770) i945_setup_dmi_rcrb(); i945_setup_pci_express_x16(); diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index cee0640..4f3cdf2 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -519,16 +519,27 @@ static struct device_operations gma_func1_ops = { .ops_pci = &gma_pci_ops, }; -static const unsigned short pci_device_ids[] = { 0x27a2, 0x27ae, 0 }; +static const unsigned short i945_gma_func0_ids[] = { + 0x2772, + 0x27a2, + 0x27ae, + 0 +}; + +static const unsigned short i945_gma_func1_ids[] = { + 0x2776, + 0x27a6, + 0 +}; static const struct pci_driver i945_gma_func0_driver __pci_driver = { .ops = &gma_func0_ops, .vendor = PCI_VENDOR_ID_INTEL, - .devices = pci_device_ids, + .devices = i945_gma_func0_ids, }; static const struct pci_driver i945_gma_func1_driver __pci_driver = { .ops = &gma_func1_ops, .vendor = PCI_VENDOR_ID_INTEL, - .device = 0x27a6, + .devices = i945_gma_func1_ids, }; diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index c3f9bae..e310fb4 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -113,11 +113,13 @@ static int memclk(void) #if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM offset++; #endif +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) + offset = 1; switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) { case 1: return 400; case 2: return 533; case 3: return 667; - default: printk(BIOS_DEBUG, "memclk: unknown register value %x\n", ((MCHBAR32(CLKCFG) >> 4) & 7) - offset); + default: printk(BIOS_DEBUG, "memclk: unknown register value %x\n", MCHBAR32(CLKCFG));// >> 4) & 7) - offset); } return -1; } @@ -214,11 +216,12 @@ static int sdram_capabilities_enhanced_addressing_xor(void) static int sdram_capabilities_two_dimms_per_channel(void) { u8 reg8; - +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) + return (1); /* this board support 2 dimms per channel */ reg8 = pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe8); /* CAPID0 + 8 */ reg8 &= (1 << 0); - return (reg8 != 0); + } // TODO check if we ever need this function @@ -384,7 +387,7 @@ static void sdram_get_dram_configuration(struct sys_info *sysinfo) continue; /* Two DIMMs per channel not supported, but odd DIMM number? */ - if (!sdram_capabilities_two_dimms_per_channel() && (i& 1)) + if (!sdram_capabilities_two_dimms_per_channel() && (i & 1)) continue; printk(BIOS_DEBUG, "DDR II Channel %d Socket %d: ", (i >> 1), (i & 1)); @@ -907,9 +910,13 @@ static void sdram_program_dram_width(struct sys_info * sysinfo) c0dramw |= c1dramw; c1dramw = 0; } - - MCHBAR16(C0DRAMW) = c0dramw; - MCHBAR16(C1DRAMW) = c1dramw; + if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770){ + MCHBAR16(C0DRAMW) = c0dramw; + MCHBAR16(C1DRAMW) = c1dramw; + }else{ + MCHBAR16(C0DRAMW) = 0x55; + MCHBAR16(C1DRAMW) = 0; + } } static void sdram_write_slew_rates(u32 offset, const u32 *slew_rate_table) @@ -1253,15 +1260,30 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo) int i; printk(BIOS_DEBUG, "Programming DLL Timings... \n"); - +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770){ + MCHBAR16(DQSMT) &= 0xfff0; + MCHBAR16(DQSMT) |= 0xc; +}else{ MCHBAR16(DQSMT) &= ~( (3 << 12) | (1 << 10) | ( 0xf << 0) ); MCHBAR16(DQSMT) |= (1 << 13) | (0xc << 0); - +} /* We drive both channels with the same speed */ switch (sysinfo->memory_frequency) { case 400: chan0dll = 0x26262626; chan1dll=0x26262626; break; /* 400MHz */ - case 533: chan0dll = 0x22222222; chan1dll=0x22222222; break; /* 533MHz */ - case 667: chan0dll = 0x11111111; chan1dll=0x11111111; break; /* 667MHz */ + case 533: + if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770){ + chan0dll = 0x24242424; chan1dll=0x24242424; + }else{ + chan0dll = 0x22222222; chan1dll=0x22222222; + } + break; /* 533MHz */ + case 667: + if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770){ + chan0dll = 0x25252525; chan1dll=0x25252525; + }else{ + chan0dll = 0x11111111; chan1dll=0x11111111; + } + break; /* 667MHz */ } for (i=0; i < 4; i++) { @@ -1306,6 +1328,11 @@ static void sdram_initialize_system_memory_io(struct sys_info *sysinfo) printk(BIOS_DEBUG, "Initializing System Memory IO... \n"); /* Enable Data Half Clock Pushout */ +if ((pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770)||(pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2778)){ + MCHBAR8(C0HCTC) = 1; + MCHBAR8(C1HCTC) = 1; + +}else{ reg8 = MCHBAR8(C0HCTC); reg8 &= ~0x1f; reg8 |= ( 1 << 0); @@ -1315,7 +1342,7 @@ static void sdram_initialize_system_memory_io(struct sys_info *sysinfo) reg8 &= ~0x1f; reg8 |= ( 1 << 0); MCHBAR8(C1HCTC) = reg8; - +} MCHBAR16(WDLLBYPMODE) &= ~( (1 << 9) | (1 << 6) | (1 << 4) | (1 << 3) | (1 << 1) ); MCHBAR16(WDLLBYPMODE) |= (1 << 8) | (1 << 7) | (1 << 5) | (1 << 2) | (1 << 0); @@ -1748,13 +1775,13 @@ static void sdram_set_timing_and_control(struct sys_info *sysinfo) }; reg32 = MCHBAR32(C0DRC0); - reg32 |= (1 << 2); /* Burst Length 8 */ reg32 &= ~( (1 << 13) | (1 << 12) ); + reg32 |= (1 << 2); /* Burst Length 8 */ MCHBAR32(C0DRC0) = reg32; reg32 = MCHBAR32(C1DRC0); - reg32 |= (1 << 2); /* Burst Length 8 */ reg32 &= ~( (1 << 13) | (1 << 12) ); + reg32 |= (1 << 2); /* Burst Length 8 */ MCHBAR32(C1DRC0) = reg32; if (!sysinfo->dual_channel && sysinfo->dimm[1] != @@ -2265,7 +2292,7 @@ static void sdram_program_clock_crossing(void) 0x02010804, 0x00000000, /* DDR400 FSB800 */ 0x00010402, 0x00000000, /* DDR533 FSB800 */ - 0x04020180, 0x00000008, /* DDR667 FSB800 */ + 0x04020130, 0x00000008, /* DDR667 FSB800 */ 0x00020904, 0x00000000, /* DDR400 FSB1066 */ 0x02010804, 0x00000000, /* DDR533 FSB1066 */ @@ -2326,18 +2353,32 @@ static void sdram_pre_jedec_initialization(void) u32 reg32; reg32 = MCHBAR32(WCC); - reg32 &= 0x113ff3ff; - reg32 |= (4 << 29) | (3 << 25) | (1 << 10); - MCHBAR32(WCC) = reg32; + if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) + { + reg32 &= 0xf3fff7ff; + reg32 |= (1 << 25) | (3 << 22) | (1 << 10); + MCHBAR32(WCC) = reg32; + MCHBAR32(MMARB0) |= (3 << 7)|(3 << 8); + MCHBAR32(MMARB1) |= (1 << 18)|(3 << 12); + if (pci_read_config32(PCI_DEV(0, 0x00,0), 0xe4) & 0x2000 && pci_read_config32(PCI_DEV(0, 0x00,0), 0x54) & 8) + { + MCHBAR32(MMARB1) &= ~(7 << 8); + } + MCHBAR32(MMARB1 +4) |= (3 << 12); + } else { + reg32 &= 0x113ff3ff; + reg32 |= (4 << 29) | (3 << 25) | (1 << 10); - MCHBAR32(SMVREFC) |= (1 << 6); + MCHBAR32(WCC) = reg32; - MCHBAR32(MMARB0) &= ~(3 << 17); - MCHBAR32(MMARB0) |= (1 << 21) | (1 << 16); + MCHBAR32(SMVREFC) |= (1 << 6); - MCHBAR32(MMARB1) &= ~(7 << 8); - MCHBAR32(MMARB1) |= (3 << 8); + MCHBAR32(MMARB0) &= ~(3 << 17); + MCHBAR32(MMARB0) |= (1 << 21) | (1 << 16); + MCHBAR32(MMARB1) &= ~(7 << 8); + MCHBAR32(MMARB1) |= (3 << 8); + } /* Adaptive Idle Timer Control */ MCHBAR32(C0AIT) = 0x000006c4; MCHBAR32(C0AIT+4) = 0x871a066d; @@ -2617,6 +2658,11 @@ static void sdram_power_management(struct sys_info *sysinfo) reg8 |= (1 << 2); pci_write_config8(PCI_DEV(0, 0x2, 0), 0xc1, reg8); +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) == 0x2770) { + MCHBAR16(MIPMC4) |= 0x6000; + MCHBAR16(MIPMC5) |= 0x6000; + MCHBAR16(MIPMC6) |= 0x6000; +}else{ #ifdef C2_SELF_REFRESH_DISABLE if (integrated_graphics) { @@ -2641,7 +2687,7 @@ static void sdram_power_management(struct sys_info *sysinfo) } #endif - +} reg32 = MCHBAR32(PMCFG); reg32 &= ~(3 << 17); reg32 |= (2 << 17); @@ -3040,7 +3086,7 @@ static void sdram_setup_processor_side(void) { if (i945_silicon_revision() == 0) MCHBAR32(FSBPMC3) |= (1 << 2); - +if (pci_read_config16(PCI_DEV(0, 0x00,0), 0x02) != 0x2770) MCHBAR8(0xb00) |= 1; if (i945_silicon_revision() == 0)

1 0

Patch merged into coreboot/master: 6be1a8b AGESA: Drop unused AGESA_MEM_TABLE
by gerrit＠coreboot.org 10 May '15

10 May '15

the following patch was just integrated into master: commit 6be1a8bf084be82b19a561d475c5ad52d5fc987c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri May 8 11:27:19 2015 +0300 AGESA: Drop unused AGESA_MEM_TABLE These tables are not referenced anywhere, thus all comments about adjustments are void. Also drop stub AgesaReadSpd that is all commented out. Change-Id: I12233ea0dc4baaf36a75f359c52cc59c9b6dad79 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/10143 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan(a)koparo.com> Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> See http://review.coreboot.org/10143 for details. -gerrit

1 0

New patch to review for coreboot: c6f2c53 kconfig: handle globbed files backwards
by Patrick Georgi 10 May '15

10 May '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10169 -gerrit commit c6f2c531ed47d2604a7227530f3c7c703e1c4e8b Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sun May 10 18:00:05 2015 +0200 kconfig: handle globbed files backwards They're essentially collected on a stack before they're parsed. So we push them backwards, then parse them in the correct order. Change-Id: Ibf29559389cd19f260d67bae8e0b5ef9f4f58d91 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/kconfig/zconf.l | 11 +- util/kconfig/zconf.lex.c_shipped | 1589 ++++++++++++++++++++++---------------- 2 files changed, 925 insertions(+), 675 deletions(-) diff --git a/util/kconfig/zconf.l b/util/kconfig/zconf.l index e20d9c2..b6bed02 100644 --- a/util/kconfig/zconf.l +++ b/util/kconfig/zconf.l @@ -351,9 +351,14 @@ void zconf_nextfiles(const char *wildcard) return; } - w = g.gl_pathv; - while (*w) - zconf_nextfile(*w++); + /* working through files backwards, since + * we're first pushing them on a stack + * before actually handling them. + */ + for (i = g.gl_pathc; i > 0; i--) { + w = &g.gl_pathv[i - 1]; + zconf_nextfile(*w); + } globfree(&g); } diff --git a/util/kconfig/zconf.lex.c_shipped b/util/kconfig/zconf.lex.c_shipped index bd6328f..b8621df 100644 --- a/util/kconfig/zconf.lex.c_shipped +++ b/util/kconfig/zconf.lex.c_shipped @@ -1,8 +1,12 @@ + +#line 3 "/home/patrick/Source/coreboot/util/kconfig/zconf.lex.c" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + #define yy_create_buffer zconf_create_buffer #define yy_delete_buffer zconf_delete_buffer -#define yy_scan_buffer zconf_scan_buffer -#define yy_scan_string zconf_scan_string -#define yy_scan_bytes zconf_scan_bytes #define yy_flex_debug zconf_flex_debug #define yy_init_buffer zconf_init_buffer #define yy_flush_buffer zconf_flush_buffer @@ -11,77 +15,118 @@ #define yyin zconfin #define yyleng zconfleng #define yylex zconflex +#define yylineno zconflineno #define yyout zconfout #define yyrestart zconfrestart #define yytext zconftext - -/* $OpenBSD: flex.skl,v 1.12 2013/11/04 17:03:32 millert Exp $ */ - -/* A lexical scanner generated by flex */ - -/* Scanner skeleton version: - * $Header: /cvs/src/usr.bin/lex/flex.skl,v 1.12 2013/11/04 17:03:32 millert Exp $ - */ +#define yywrap zconfwrap +#define yyalloc zconfalloc +#define yyrealloc zconfrealloc +#define yyfree zconffree #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 39 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ #include <stdio.h> +#include <string.h> #include <errno.h> +#include <stdlib.h> +/* end standard C headers. */ -/* cfront 1.2 defines "c_plusplus" instead of "__cplusplus" */ -#ifdef c_plusplus -#ifndef __cplusplus -#define __cplusplus -#endif +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 #endif +#include <inttypes.h> +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; -#ifdef __cplusplus +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif -#include <stdlib.h> -#include <unistd.h> +#endif /* ! C99 */ + +#endif /* ! FLEXINT_H */ -/* Use prototypes in function declarations. */ -#define YY_USE_PROTOS +#ifdef __cplusplus /* The "const" storage-class-modifier is valid. */ #define YY_USE_CONST #else /* ! __cplusplus */ -#ifdef __STDC__ +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) -#define YY_USE_PROTOS #define YY_USE_CONST -#endif /* __STDC__ */ +#endif /* defined (__STDC__) */ #endif /* ! __cplusplus */ -#ifdef __TURBOC__ - #pragma warn -rch - #pragma warn -use -#include <io.h> -#include <stdlib.h> -#define YY_USE_CONST -#define YY_USE_PROTOS -#endif - #ifdef YY_USE_CONST #define yyconst const #else #define yyconst #endif - -#ifdef YY_USE_PROTOS -#define YY_PROTO(proto) proto -#else -#define YY_PROTO(proto) () -#endif - /* Returned upon end-of-file. */ #define YY_NULL 0 @@ -96,71 +141,79 @@ * but we do it the disgusting crufty way forced on us by the ()-less * definition of BEGIN. */ -#define BEGIN yy_start = 1 + 2 * +#define BEGIN (yy_start) = 1 + 2 * /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ -#define YY_START ((yy_start - 1) / 2) +#define YY_START (((yy_start) - 1) / 2) #define YYSTATE YY_START /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) /* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE yyrestart( yyin ) +#define YY_NEW_FILE zconfrestart(zconfin ) #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#ifdef __ia64__ +/* On IA-64, the buffer size is 16k, not 8k. + * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. + * Ditto for the __ia64__ case accordingly. + */ +#define YY_BUF_SIZE 32768 +#else #define YY_BUF_SIZE 16384 +#endif /* __ia64__ */ +#endif +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif -extern int yyleng; -extern FILE *yyin, *yyout; +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +extern yy_size_t zconfleng; + +extern FILE *zconfin, *zconfout; #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 -/* The funky do-while in the following #define is used to turn the definition - * int a single C statement (which needs a semi-colon terminator). This - * avoids problems with code like: - * - * if ( condition_holds ) - * yyless( 5 ); - * else - * do_something_else(); - * - * Prior to using the do-while the compiler would get upset at the - * "else" because it interpreted the "if" statement as being all - * done when it reached the ';' after the yyless() call. - */ - -/* Return all but the first 'n' matched characters back to the input stream. */ - + #define YY_LESS_LINENO(n) + #define YY_LINENO_REWIND_TO(ptr) + +/* Return all but the first "n" matched characters back to the input stream. */ #define yyless(n) \ do \ { \ - /* Undo effects of setting up yytext. */ \ - *yy_cp = yy_hold_char; \ + /* Undo effects of setting up zconftext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ YY_RESTORE_YY_MORE_OFFSET \ - yy_c_buf_p = yy_cp = yy_bp + n - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up zconftext again */ \ } \ while ( 0 ) -#define unput(c) yyunput( c, yytext_ptr ) - -/* The following is because we cannot portably get our hands on size_t - * (without autoconf's help, which isn't available because we want - * flex-generated scanners to compile on their own). - */ -typedef unsigned int yy_size_t; - +#define unput(c) yyunput( c, (yytext_ptr) ) +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE struct yy_buffer_state { FILE *yy_input_file; @@ -176,7 +229,7 @@ struct yy_buffer_state /* Number of characters read into yy_ch_buf, not including EOB * characters. */ - int yy_n_chars; + yy_size_t yy_n_chars; /* Whether we "own" the buffer - i.e., we know we created it, * and can realloc() it to grow it, and should free() it to @@ -197,12 +250,16 @@ struct yy_buffer_state */ int yy_at_bol; + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + /* Whether to try to fill the input buffer when we reach the * end of it. */ int yy_fill_buffer; int yy_buffer_status; + #define YY_BUFFER_NEW 0 #define YY_BUFFER_NORMAL 1 /* When an EOF's been seen but there's still some text to process @@ -212,84 +269,114 @@ struct yy_buffer_state * possible backing-up. * * When we actually see the EOF, we change the status to "new" - * (via yyrestart()), so that the user can continue scanning by - * just pointing yyin at a new input file. + * (via zconfrestart()), so that the user can continue scanning by + * just pointing zconfin at a new input file. */ #define YY_BUFFER_EOF_PENDING 2 + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ -static YY_BUFFER_STATE yy_current_buffer = 0; +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ /* We provide macros for accessing buffer states in case in the * future we want to put the buffer states in a more general * "scanner state". + * + * Returns the top of the stack, or NULL. */ -#define YY_CURRENT_BUFFER yy_current_buffer +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] -/* yy_hold_char holds the character lost when yytext is formed. */ +/* yy_hold_char holds the character lost when zconftext is formed. */ static char yy_hold_char; - -static int yy_n_chars; /* number of characters read into yy_ch_buf */ - - -int yyleng; +static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ +yy_size_t zconfleng; /* Points to current character in buffer. */ static char *yy_c_buf_p = (char *) 0; -static int yy_init = 1; /* whether we need to initialize */ +static int yy_init = 0; /* whether we need to initialize */ static int yy_start = 0; /* start state number */ -/* Flag which is used to allow yywrap()'s to do buffer switches - * instead of setting up a fresh yyin. A bit of a hack ... +/* Flag which is used to allow zconfwrap()'s to do buffer switches + * instead of setting up a fresh zconfin. A bit of a hack ... */ static int yy_did_buffer_switch_on_eof; -void yyrestart YY_PROTO(( FILE *input_file )); +void zconfrestart (FILE *input_file ); +void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size ); +void zconf_delete_buffer (YY_BUFFER_STATE b ); +void zconf_flush_buffer (YY_BUFFER_STATE b ); +void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ); +void zconfpop_buffer_state (void ); + +static void zconfensure_buffer_stack (void ); +static void zconf_load_buffer_state (void ); +static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file ); -void yy_switch_to_buffer YY_PROTO(( YY_BUFFER_STATE new_buffer )); -void yy_load_buffer_state YY_PROTO(( void )); -YY_BUFFER_STATE yy_create_buffer YY_PROTO(( FILE *file, int size )); -void yy_delete_buffer YY_PROTO(( YY_BUFFER_STATE b )); -void yy_init_buffer YY_PROTO(( YY_BUFFER_STATE b, FILE *file )); -void yy_flush_buffer YY_PROTO(( YY_BUFFER_STATE b )); -#define YY_FLUSH_BUFFER yy_flush_buffer( yy_current_buffer ) +#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER ) -YY_BUFFER_STATE yy_scan_buffer YY_PROTO(( char *base, yy_size_t size )); -YY_BUFFER_STATE yy_scan_string YY_PROTO(( yyconst char *yy_str )); -YY_BUFFER_STATE yy_scan_bytes YY_PROTO(( yyconst char *bytes, int len )); +YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,yy_size_t len ); -static void *yy_flex_alloc YY_PROTO(( yy_size_t )); -static void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )); -static void yy_flex_free YY_PROTO(( void * )); +void *zconfalloc (yy_size_t ); +void *zconfrealloc (void *,yy_size_t ); +void zconffree (void * ); -#define yy_new_buffer yy_create_buffer +#define yy_new_buffer zconf_create_buffer #define yy_set_interactive(is_interactive) \ { \ - if ( ! yy_current_buffer ) \ - yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); \ - yy_current_buffer->yy_is_interactive = is_interactive; \ + if ( ! YY_CURRENT_BUFFER ){ \ + zconfensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } #define yy_set_bol(at_bol) \ { \ - if ( ! yy_current_buffer ) \ - yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); \ - yy_current_buffer->yy_at_bol = at_bol; \ + if ( ! YY_CURRENT_BUFFER ){\ + zconfensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } -#define YY_AT_BOL() (yy_current_buffer->yy_at_bol) +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) +/* Begin user sect3 */ -#define yywrap() 1 +#define zconfwrap() 1 #define YY_SKIP_YYWRAP + typedef unsigned char YY_CHAR; -FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0; + typedef int yy_state_type; -extern char *yytext; -#define yytext_ptr yytext -static yyconst short yy_nxt[][17] = + +extern int zconflineno; + +int zconflineno = 1; + +extern char *zconftext; +#define yytext_ptr zconftext + +static yyconst flex_int16_t yy_nxt[][17] = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -610,25 +697,31 @@ static yyconst short yy_nxt[][17] = } ; - -static yy_state_type yy_get_previous_state YY_PROTO(( void )); -static yy_state_type yy_try_NUL_trans YY_PROTO(( yy_state_type current_state )); -static int yy_get_next_buffer YY_PROTO(( void )); -static void yy_fatal_error YY_PROTO(( yyconst char msg[] )); +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); /* Done after the current pattern has been matched and before the - * corresponding action - sets up yytext. + * corresponding action - sets up zconftext. */ #define YY_DO_BEFORE_ACTION \ - yytext_ptr = yy_bp; \ - yyleng = (int) (yy_cp - yy_bp); \ - yy_hold_char = *yy_cp; \ + (yytext_ptr) = yy_bp; \ + zconfleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ - yy_c_buf_p = yy_cp; + (yy_c_buf_p) = yy_cp; #define YY_NUM_RULES 33 #define YY_END_OF_BUFFER 34 -static yyconst short int yy_accept[61] = +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[61] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 34, 5, 4, 2, 3, 7, 8, 6, 32, 29, @@ -638,7 +731,7 @@ static yyconst short int yy_accept[61] = 26, 25, 15, 20, 9, 19, 19, 21, 10, 18 } ; -static yyconst int yy_ec[256] = +static yyconst flex_int32_t yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -670,6 +763,9 @@ static yyconst int yy_ec[256] = 1, 1, 1, 1, 1 } ; +extern int zconf_flex_debug; +int zconf_flex_debug = 0; + /* The intent behind this definition is that it'll catch * any uses of REJECT which flex missed. */ @@ -677,14 +773,8 @@ static yyconst int yy_ec[256] = #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET -char *yytext; -#define INITIAL 0 -#define YY_NEVER_INTERACTIVE 1 +char *zconftext; #define YY_NO_INPUT 1 -#define COMMAND 1 -#define HELP 2 -#define STRING 3 -#define PARAM 4 /* * Copyright (C) 2002 Roman Zippel <zippel(a)linux-m68k.org> @@ -751,85 +841,103 @@ static void alloc_string(const char *str, int size) text[size] = 0; } +#define INITIAL 0 +#define COMMAND 1 +#define HELP 2 +#define STRING 3 +#define PARAM 4 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include <unistd.h> +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int zconflex_destroy (void ); + +int zconfget_debug (void ); + +void zconfset_debug (int debug_flag ); + +YY_EXTRA_TYPE zconfget_extra (void ); + +void zconfset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *zconfget_in (void ); + +void zconfset_in (FILE * in_str ); + +FILE *zconfget_out (void ); + +void zconfset_out (FILE * out_str ); + +yy_size_t zconfget_leng (void ); + +char *zconfget_text (void ); + +int zconfget_lineno (void ); + +void zconfset_lineno (int line_number ); + /* Macros after this point can all be overridden by user definitions in * section 1. */ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus -extern "C" int yywrap YY_PROTO(( void )); +extern "C" int zconfwrap (void ); #else -extern int yywrap YY_PROTO(( void )); -#endif +extern int zconfwrap (void ); #endif - -#ifndef YY_NO_UNPUT -static void yyunput YY_PROTO(( int c, char *buf_ptr )); #endif + static void yyunput (int c,char *buf_ptr ); + #ifndef yytext_ptr -static void yy_flex_strncpy YY_PROTO(( char *, yyconst char *, int )); +static void yy_flex_strncpy (char *,yyconst char *,int ); #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen YY_PROTO(( yyconst char * )); +static int yy_flex_strlen (yyconst char * ); #endif #ifndef YY_NO_INPUT -#ifdef __cplusplus -static int yyinput YY_PROTO(( void )); -#else -static int input YY_PROTO(( void )); -#endif -#endif - -#if defined(YY_STACK_USED) && YY_STACK_USED -static int yy_start_stack_ptr = 0; -static int yy_start_stack_depth = 0; -static int *yy_start_stack = 0; -#ifndef YY_NO_PUSH_STATE -static void yy_push_state YY_PROTO(( int new_state )); -#endif -#ifndef YY_NO_POP_STATE -static void yy_pop_state YY_PROTO(( void )); -#endif -#ifndef YY_NO_TOP_STATE -static int yy_top_state YY_PROTO(( void )); -#endif +#ifdef __cplusplus +static int yyinput (void ); #else -#define YY_NO_PUSH_STATE 1 -#define YY_NO_POP_STATE 1 -#define YY_NO_TOP_STATE 1 +static int input (void ); #endif -#ifdef YY_MALLOC_DECL -YY_MALLOC_DECL -#else -#ifdef __STDC__ -#ifndef __cplusplus -#include <stdlib.h> -#endif -#else -/* Just try to get by without declaring the routines. This will fail - * miserably on non-ANSI systems for which sizeof(size_t) != sizeof(int) - * or sizeof(void*) != sizeof(int). - */ -#endif #endif /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE +#ifdef __ia64__ +/* On IA-64, the buffer size is 16k, not 8k */ +#define YY_READ_BUF_SIZE 16384 +#else #define YY_READ_BUF_SIZE 8192 +#endif /* __ia64__ */ #endif /* Copy whatever the last rule matched to the standard output. */ - #ifndef ECHO /* This used to be an fputs(), but since the string might contain NUL's, * we now use fwrite(). */ -#define ECHO (void) fwrite( yytext, yyleng, 1, yyout ) +#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0) #endif /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, @@ -837,8 +945,19 @@ YY_MALLOC_DECL */ #ifndef YY_INPUT #define YY_INPUT(buf,result,max_size) \ - if ( (result = read( fileno(yyin), (char *) buf, max_size )) < 0 ) \ - YY_FATAL_ERROR( "input in flex scanner failed" ); + errno=0; \ + while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(zconfin); \ + }\ +\ + #endif /* No semi-colon after return; correct usage is to write "yyterminate();" - @@ -859,14 +978,20 @@ YY_MALLOC_DECL #define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) #endif +/* end tables serialization structures and prototypes */ + /* Default declaration of generated scanner - a define so the user can * easily add parameters. */ #ifndef YY_DECL -#define YY_DECL int yylex YY_PROTO(( void )) -#endif +#define YY_DECL_IS_OURS 1 + +extern int zconflex (void); + +#define YY_DECL int zconflex (void) +#endif /* !YY_DECL */ -/* Code executed at the beginning of each rule, after yytext and yyleng +/* Code executed at the beginning of each rule, after zconftext and zconfleng * have been set up. */ #ifndef YY_USER_ACTION @@ -881,56 +1006,60 @@ YY_MALLOC_DECL #define YY_RULE_SETUP \ YY_USER_ACTION +/** The main scanner function which does all the work. + */ YY_DECL - { +{ register yy_state_type yy_current_state; register char *yy_cp, *yy_bp; register int yy_act; - - - int str = 0; - int ts, i; - - - if ( yy_init ) + + if ( !(yy_init) ) { - yy_init = 0; + (yy_init) = 1; #ifdef YY_USER_INIT YY_USER_INIT; #endif - if ( ! yy_start ) - yy_start = 1; /* first start state */ + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ - if ( ! yyin ) - yyin = stdin; + if ( ! zconfin ) + zconfin = stdin; - if ( ! yyout ) - yyout = stdout; + if ( ! zconfout ) + zconfout = stdout; - if ( ! yy_current_buffer ) - yy_current_buffer = - yy_create_buffer( yyin, YY_BUF_SIZE ); + if ( ! YY_CURRENT_BUFFER ) { + zconfensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + zconf_create_buffer(zconfin,YY_BUF_SIZE ); + } - yy_load_buffer_state(); + zconf_load_buffer_state( ); } + { + + int str = 0; + int ts, i; + while ( 1 ) /* loops until end-of-file is reached */ { - yy_cp = yy_c_buf_p; + yy_cp = (yy_c_buf_p); - /* Support of yytext. */ - *yy_cp = yy_hold_char; + /* Support of zconftext. */ + *yy_cp = (yy_hold_char); /* yy_bp points to the position in yy_ch_buf of the start of * the current run. */ yy_bp = yy_cp; - yy_current_state = yy_start; + yy_current_state = (yy_start); yy_match: - while ( (yy_current_state = yy_nxt[yy_current_state][yy_ec[YY_SC_TO_UI(*yy_cp)]]) > 0 ) + while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)] ]) > 0 ) ++yy_cp; yy_current_state = -yy_current_state; @@ -940,14 +1069,14 @@ yy_find_action: YY_DO_BEFORE_ACTION; - do_action: /* This label is used only to access EOF actions. */ - switch ( yy_act ) { /* beginning of action switch */ case 1: +/* rule 1 can match eol */ case 2: +/* rule 2 can match eol */ YY_RULE_SETUP { current_file->lineno++; @@ -967,7 +1096,7 @@ YY_RULE_SETUP case 5: YY_RULE_SETUP { - unput(yytext[0]); + unput(zconftext[0]); BEGIN(COMMAND); } YY_BREAK @@ -975,7 +1104,7 @@ YY_RULE_SETUP case 6: YY_RULE_SETUP { - const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); + const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); BEGIN(PARAM); current_pos.file = current_file; current_pos.lineno = current_file->lineno; @@ -983,7 +1112,7 @@ YY_RULE_SETUP zconflval.id = id; return id->token; } - alloc_string(yytext, yyleng); + alloc_string(zconftext, zconfleng); zconflval.string = text; return T_WORD; } @@ -993,6 +1122,7 @@ YY_RULE_SETUP YY_BREAK case 8: +/* rule 8 can match eol */ YY_RULE_SETUP { BEGIN(INITIAL); @@ -1001,7 +1131,6 @@ YY_RULE_SETUP } YY_BREAK - case 9: YY_RULE_SETUP return T_AND; @@ -1033,12 +1162,13 @@ return T_UNEQUAL; case 16: YY_RULE_SETUP { - str = yytext[0]; + str = zconftext[0]; new_string(); BEGIN(STRING); } YY_BREAK case 17: +/* rule 17 can match eol */ YY_RULE_SETUP BEGIN(INITIAL); current_file->lineno++; return T_EOL; YY_BREAK @@ -1049,12 +1179,12 @@ YY_RULE_SETUP case 19: YY_RULE_SETUP { - const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); + const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); if (id && id->flags & TF_PARAM) { zconflval.id = id; return id->token; } - alloc_string(yytext, yyleng); + alloc_string(zconftext, zconfleng); zconflval.string = text; return T_WORD; } @@ -1064,6 +1194,7 @@ YY_RULE_SETUP /* comment */ YY_BREAK case 21: +/* rule 21 can match eol */ YY_RULE_SETUP current_file->lineno++; YY_BREAK @@ -1077,14 +1208,15 @@ case YY_STATE_EOF(PARAM): } YY_BREAK - case 23: -*yy_cp = yy_hold_char; /* undo effects of setting up yytext */ -yy_c_buf_p = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up yytext again */ +/* rule 23 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +YY_LINENO_REWIND_TO(yy_cp - 1); +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ YY_RULE_SETUP { - append_string(yytext, yyleng); + append_string(zconftext, zconfleng); zconflval.string = text; return T_WORD_QUOTE; } @@ -1092,16 +1224,18 @@ YY_RULE_SETUP case 24: YY_RULE_SETUP { - append_string(yytext, yyleng); + append_string(zconftext, zconfleng); } YY_BREAK case 25: -*yy_cp = yy_hold_char; /* undo effects of setting up yytext */ -yy_c_buf_p = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up yytext again */ +/* rule 25 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +YY_LINENO_REWIND_TO(yy_cp - 1); +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ YY_RULE_SETUP { - append_string(yytext + 1, yyleng - 1); + append_string(zconftext + 1, zconfleng - 1); zconflval.string = text; return T_WORD_QUOTE; } @@ -1109,21 +1243,22 @@ YY_RULE_SETUP case 26: YY_RULE_SETUP { - append_string(yytext + 1, yyleng - 1); + append_string(zconftext + 1, zconfleng - 1); } YY_BREAK case 27: YY_RULE_SETUP { - if (str == yytext[0]) { + if (str == zconftext[0]) { BEGIN(PARAM); zconflval.string = text; return T_WORD_QUOTE; } else - append_string(yytext, 1); + append_string(zconftext, 1); } YY_BREAK case 28: +/* rule 28 can match eol */ YY_RULE_SETUP { printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); @@ -1138,13 +1273,12 @@ case YY_STATE_EOF(STRING): } YY_BREAK - case 29: YY_RULE_SETUP { ts = 0; - for (i = 0; i < yyleng; i++) { - if (yytext[i] == '\t') + for (i = 0; i < zconfleng; i++) { + if (zconftext[i] == '\t') ts = (ts & ~7) + 8; else ts++; @@ -1165,9 +1299,11 @@ YY_RULE_SETUP } YY_BREAK case 30: -*yy_cp = yy_hold_char; /* undo effects of setting up yytext */ -yy_c_buf_p = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up yytext again */ +/* rule 30 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +YY_LINENO_REWIND_TO(yy_cp - 1); +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ YY_RULE_SETUP { current_file->lineno++; @@ -1176,6 +1312,7 @@ YY_RULE_SETUP } YY_BREAK case 31: +/* rule 31 can match eol */ YY_RULE_SETUP { current_file->lineno++; @@ -1185,12 +1322,12 @@ YY_RULE_SETUP case 32: YY_RULE_SETUP { - while (yyleng) { - if ((yytext[yyleng-1] != ' ') && (yytext[yyleng-1] != '\t')) + while (zconfleng) { + if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t')) break; - yyleng--; + zconfleng--; } - append_string(yytext, yyleng); + append_string(zconftext, zconfleng); if (!first_ts) first_ts = last_ts; } @@ -1209,7 +1346,7 @@ case YY_STATE_EOF(COMMAND): zconf_endfile(); return T_EOL; } - fclose(yyin); + fclose(zconfin); yyterminate(); } YY_BREAK @@ -1221,26 +1358,26 @@ YY_FATAL_ERROR( "flex scanner jammed" ); case YY_END_OF_BUFFER: { /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - yytext_ptr) - 1; + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = yy_hold_char; + *yy_cp = (yy_hold_char); YY_RESTORE_YY_MORE_OFFSET - if ( yy_current_buffer->yy_buffer_status == YY_BUFFER_NEW ) + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) { /* We're scanning a new file or input source. It's * possible that this happened because the user - * just pointed yyin at a new source and called - * yylex(). If so, then we have to assure - * consistency between yy_current_buffer and our + * just pointed zconfin at a new source and called + * zconflex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our * globals. Here is the right place to do so, because * this is the first action (other than possibly a * back-up) that will match for the new input source. */ - yy_n_chars = yy_current_buffer->yy_n_chars; - yy_current_buffer->yy_input_file = yyin; - yy_current_buffer->yy_buffer_status = YY_BUFFER_NORMAL; + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; } /* Note that here we test for yy_c_buf_p "<=" to the position @@ -1250,13 +1387,13 @@ YY_FATAL_ERROR( "flex scanner jammed" ); * end-of-buffer state). Contrast this with the test * in input(). */ - if ( yy_c_buf_p <= &yy_current_buffer->yy_ch_buf[yy_n_chars] ) + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) { /* This was really a NUL. */ yy_state_type yy_next_state; - yy_c_buf_p = yytext_ptr + yy_amount_of_matched_text; + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - yy_current_state = yy_get_previous_state(); + yy_current_state = yy_get_previous_state( ); /* Okay, we're now positioned to make the NUL * transition. We couldn't have @@ -1269,41 +1406,41 @@ YY_FATAL_ERROR( "flex scanner jammed" ); yy_next_state = yy_try_NUL_trans( yy_current_state ); - yy_bp = yytext_ptr + YY_MORE_ADJ; + yy_bp = (yytext_ptr) + YY_MORE_ADJ; if ( yy_next_state ) { /* Consume the NUL. */ - yy_cp = ++yy_c_buf_p; + yy_cp = ++(yy_c_buf_p); yy_current_state = yy_next_state; goto yy_match; } else { - yy_cp = yy_c_buf_p; + yy_cp = (yy_c_buf_p); goto yy_find_action; } } - else switch ( yy_get_next_buffer() ) + else switch ( yy_get_next_buffer( ) ) { case EOB_ACT_END_OF_FILE: { - yy_did_buffer_switch_on_eof = 0; + (yy_did_buffer_switch_on_eof) = 0; - if ( yywrap() ) + if ( zconfwrap( ) ) { /* Note: because we've taken care in * yy_get_next_buffer() to have set up - * yytext, we can now set up + * zconftext, we can now set up * yy_c_buf_p so that if some total * hoser (like flex itself) wants to * call the scanner after we return the * YY_NULL, it'll still work - another * YY_NULL will get returned. */ - yy_c_buf_p = yytext_ptr + YY_MORE_ADJ; + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; yy_act = YY_STATE_EOF(YY_START); goto do_action; @@ -1311,30 +1448,30 @@ YY_FATAL_ERROR( "flex scanner jammed" ); else { - if ( ! yy_did_buffer_switch_on_eof ) + if ( ! (yy_did_buffer_switch_on_eof) ) YY_NEW_FILE; } break; } case EOB_ACT_CONTINUE_SCAN: - yy_c_buf_p = - yytext_ptr + yy_amount_of_matched_text; + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; - yy_current_state = yy_get_previous_state(); + yy_current_state = yy_get_previous_state( ); - yy_cp = yy_c_buf_p; - yy_bp = yytext_ptr + YY_MORE_ADJ; + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; goto yy_match; case EOB_ACT_LAST_MATCH: - yy_c_buf_p = - &yy_current_buffer->yy_ch_buf[yy_n_chars]; + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - yy_current_state = yy_get_previous_state(); + yy_current_state = yy_get_previous_state( ); - yy_cp = yy_c_buf_p; - yy_bp = yytext_ptr + YY_MORE_ADJ; + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; goto yy_find_action; } break; @@ -1345,8 +1482,8 @@ YY_FATAL_ERROR( "flex scanner jammed" ); "fatal flex scanner internal error--no action found" ); } /* end of action switch */ } /* end of scanning one token */ - } /* end of yylex */ - + } /* end of user's declarations */ +} /* end of zconflex */ /* yy_get_next_buffer - try to read in a new buffer * @@ -1355,21 +1492,20 @@ YY_FATAL_ERROR( "flex scanner jammed" ); * EOB_ACT_CONTINUE_SCAN - continue scanning from current position * EOB_ACT_END_OF_FILE - end of file */ - -static int yy_get_next_buffer YY_PROTO(( void )) - { - register char *dest = yy_current_buffer->yy_ch_buf; - register char *source = yytext_ptr; +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); register int number_to_move, i; int ret_val; - if ( yy_c_buf_p > &yy_current_buffer->yy_ch_buf[yy_n_chars + 1] ) + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) YY_FATAL_ERROR( "fatal flex scanner internal error--end of buffer missed" ); - if ( yy_current_buffer->yy_fill_buffer == 0 ) + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) { /* Don't try to fill the buffer, so this is an EOF. */ - if ( yy_c_buf_p - yytext_ptr - YY_MORE_ADJ == 1 ) + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) { /* We matched a single character, the EOB, so * treat this as a final EOF. @@ -1389,38 +1525,34 @@ static int yy_get_next_buffer YY_PROTO(( void )) /* Try to read more data. */ /* First move last chars to start of buffer. */ - number_to_move = (int) (yy_c_buf_p - yytext_ptr) - 1; + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); - if ( yy_current_buffer->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) /* don't do the read, it's not guaranteed to return an EOF, * just force an EOF */ - yy_current_buffer->yy_n_chars = yy_n_chars = 0; + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; else { - int num_to_read = - yy_current_buffer->yy_buf_size - number_to_move - 1; + yy_size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; while ( num_to_read <= 0 ) { /* Not enough room in the buffer - grow it. */ -#ifdef YY_USES_REJECT - YY_FATAL_ERROR( -"input buffer overflow, can't enlarge buffer because scanner uses REJECT" ); -#else /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = yy_current_buffer; + YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE; int yy_c_buf_p_offset = - (int) (yy_c_buf_p - b->yy_ch_buf); + (int) ((yy_c_buf_p) - b->yy_ch_buf); if ( b->yy_is_our_buffer ) { - int new_size = b->yy_buf_size * 2; + yy_size_t new_size = b->yy_buf_size * 2; if ( new_size <= 0 ) b->yy_buf_size += b->yy_buf_size / 8; @@ -1429,8 +1561,7 @@ static int yy_get_next_buffer YY_PROTO(( void )) b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ - yy_flex_realloc( (void *) b->yy_ch_buf, - b->yy_buf_size + 2 ); + zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); } else /* Can't grow it, we don't own it. */ @@ -1440,35 +1571,35 @@ static int yy_get_next_buffer YY_PROTO(( void )) YY_FATAL_ERROR( "fatal error - scanner input buffer overflow" ); - yy_c_buf_p = &b->yy_ch_buf[yy_c_buf_p_offset]; + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - num_to_read = yy_current_buffer->yy_buf_size - + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; -#endif + } if ( num_to_read > YY_READ_BUF_SIZE ) num_to_read = YY_READ_BUF_SIZE; /* Read in more data. */ - YY_INPUT( (&yy_current_buffer->yy_ch_buf[number_to_move]), - yy_n_chars, num_to_read ); + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); - yy_current_buffer->yy_n_chars = yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); } - if ( yy_n_chars == 0 ) + if ( (yy_n_chars) == 0 ) { if ( number_to_move == YY_MORE_ADJ ) { ret_val = EOB_ACT_END_OF_FILE; - yyrestart( yyin ); + zconfrestart(zconfin ); } else { ret_val = EOB_ACT_LAST_MATCH; - yy_current_buffer->yy_buffer_status = + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_EOF_PENDING; } } @@ -1476,128 +1607,120 @@ static int yy_get_next_buffer YY_PROTO(( void )) else ret_val = EOB_ACT_CONTINUE_SCAN; - yy_n_chars += number_to_move; - yy_current_buffer->yy_ch_buf[yy_n_chars] = YY_END_OF_BUFFER_CHAR; - yy_current_buffer->yy_ch_buf[yy_n_chars + 1] = YY_END_OF_BUFFER_CHAR; + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } - yytext_ptr = &yy_current_buffer->yy_ch_buf[0]; + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - return ret_val; - } + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + return ret_val; +} /* yy_get_previous_state - get the state just before the EOB char was reached */ -static yy_state_type yy_get_previous_state YY_PROTO(( void )) - { + static yy_state_type yy_get_previous_state (void) +{ register yy_state_type yy_current_state; register char *yy_cp; + + yy_current_state = (yy_start); - yy_current_state = yy_start; - - for ( yy_cp = yytext_ptr + YY_MORE_ADJ; yy_cp < yy_c_buf_p; ++yy_cp ) + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) { yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)]; } return yy_current_state; - } - +} /* yy_try_NUL_trans - try to make a transition on the NUL character * * synopsis * next_state = yy_try_NUL_trans( current_state ); */ - -#ifdef YY_USE_PROTOS -static yy_state_type yy_try_NUL_trans( yy_state_type yy_current_state ) -#else -static yy_state_type yy_try_NUL_trans( yy_current_state ) -yy_state_type yy_current_state; -#endif - { + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ register int yy_is_jam; - + yy_current_state = yy_nxt[yy_current_state][1]; yy_is_jam = (yy_current_state <= 0); - return yy_is_jam ? 0 : yy_current_state; - } - + return yy_is_jam ? 0 : yy_current_state; +} -#ifndef YY_NO_UNPUT -#ifdef YY_USE_PROTOS -static void yyunput( int c, register char *yy_bp ) -#else -static void yyunput( c, yy_bp ) -int c; -register char *yy_bp; -#endif - { - register char *yy_cp = yy_c_buf_p; + static void yyunput (int c, register char * yy_bp ) +{ + register char *yy_cp; + + yy_cp = (yy_c_buf_p); - /* undo effects of setting up yytext */ - *yy_cp = yy_hold_char; + /* undo effects of setting up zconftext */ + *yy_cp = (yy_hold_char); - if ( yy_cp < yy_current_buffer->yy_ch_buf + 2 ) + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) { /* need to shift things up to make room */ /* +2 for EOB chars. */ - register int number_to_move = yy_n_chars + 2; - register char *dest = &yy_current_buffer->yy_ch_buf[ - yy_current_buffer->yy_buf_size + 2]; + register yy_size_t number_to_move = (yy_n_chars) + 2; + register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; register char *source = - &yy_current_buffer->yy_ch_buf[number_to_move]; + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; - while ( source > yy_current_buffer->yy_ch_buf ) + while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) *--dest = *--source; yy_cp += (int) (dest - source); yy_bp += (int) (dest - source); - yy_current_buffer->yy_n_chars = - yy_n_chars = yy_current_buffer->yy_buf_size; + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; - if ( yy_cp < yy_current_buffer->yy_ch_buf + 2 ) + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) YY_FATAL_ERROR( "flex scanner push-back overflow" ); } *--yy_cp = (char) c; - - yytext_ptr = yy_bp; - yy_hold_char = *yy_cp; - yy_c_buf_p = yy_cp; - } -#endif /* ifndef YY_NO_UNPUT */ - + (yytext_ptr) = yy_bp; + (yy_hold_char) = *yy_cp; + (yy_c_buf_p) = yy_cp; +} #ifndef YY_NO_INPUT #ifdef __cplusplus -static int yyinput YY_PROTO(( void )) + static int yyinput (void) #else -static int input YY_PROTO(( void )) + static int input (void) #endif - { - int c; - *yy_c_buf_p = yy_hold_char; +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); - if ( *yy_c_buf_p == YY_END_OF_BUFFER_CHAR ) + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) { /* yy_c_buf_p now points to the character we want to return. * If this occurs *before* the EOB characters, then it's a * valid NUL; if not, then we've hit the end of the buffer. */ - if ( yy_c_buf_p < &yy_current_buffer->yy_ch_buf[yy_n_chars] ) + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) /* This was really a NUL. */ - *yy_c_buf_p = '\0'; + *(yy_c_buf_p) = '\0'; else { /* need more input */ - int offset = yy_c_buf_p - yytext_ptr; - ++yy_c_buf_p; + yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); - switch ( yy_get_next_buffer() ) + switch ( yy_get_next_buffer( ) ) { case EOB_ACT_LAST_MATCH: /* This happens because yy_g_n_b() @@ -1611,16 +1734,16 @@ static int input YY_PROTO(( void )) */ /* Reset buffer status. */ - yyrestart( yyin ); + zconfrestart(zconfin ); - /* fall through */ + /*FALLTHROUGH*/ case EOB_ACT_END_OF_FILE: { - if ( yywrap() ) + if ( zconfwrap( ) ) return EOF; - if ( ! yy_did_buffer_switch_on_eof ) + if ( ! (yy_did_buffer_switch_on_eof) ) YY_NEW_FILE; #ifdef __cplusplus return yyinput(); @@ -1630,176 +1753,165 @@ static int input YY_PROTO(( void )) } case EOB_ACT_CONTINUE_SCAN: - yy_c_buf_p = yytext_ptr + offset; + (yy_c_buf_p) = (yytext_ptr) + offset; break; } } } - c = *(unsigned char *) yy_c_buf_p; /* cast for 8-bit char's */ - *yy_c_buf_p = '\0'; /* preserve yytext */ - yy_hold_char = *++yy_c_buf_p; - + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve zconftext */ + (yy_hold_char) = *++(yy_c_buf_p); return c; - } +} #endif /* ifndef YY_NO_INPUT */ - -#ifdef YY_USE_PROTOS -void yyrestart( FILE *input_file ) -#else -void yyrestart( input_file ) -FILE *input_file; -#endif - { - if ( ! yy_current_buffer ) - yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); - - yy_init_buffer( yy_current_buffer, input_file ); - yy_load_buffer_state(); +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void zconfrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + zconfensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + zconf_create_buffer(zconfin,YY_BUF_SIZE ); } + zconf_init_buffer(YY_CURRENT_BUFFER,input_file ); + zconf_load_buffer_state( ); +} -#ifdef YY_USE_PROTOS -void yy_switch_to_buffer( YY_BUFFER_STATE new_buffer ) -#else -void yy_switch_to_buffer( new_buffer ) -YY_BUFFER_STATE new_buffer; -#endif - { - if ( yy_current_buffer == new_buffer ) +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * zconfpop_buffer_state(); + * zconfpush_buffer_state(new_buffer); + */ + zconfensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) return; - if ( yy_current_buffer ) + if ( YY_CURRENT_BUFFER ) { /* Flush out information for old buffer. */ - *yy_c_buf_p = yy_hold_char; - yy_current_buffer->yy_buf_pos = yy_c_buf_p; - yy_current_buffer->yy_n_chars = yy_n_chars; + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); } - yy_current_buffer = new_buffer; - yy_load_buffer_state(); + YY_CURRENT_BUFFER_LVALUE = new_buffer; + zconf_load_buffer_state( ); /* We don't actually know whether we did this switch during - * EOF (yywrap()) processing, but the only time this flag - * is looked at is after yywrap() is called, so it's safe + * EOF (zconfwrap()) processing, but the only time this flag + * is looked at is after zconfwrap() is called, so it's safe * to go ahead and always set it. */ - yy_did_buffer_switch_on_eof = 1; - } - - -#ifdef YY_USE_PROTOS -void yy_load_buffer_state( void ) -#else -void yy_load_buffer_state() -#endif - { - yy_n_chars = yy_current_buffer->yy_n_chars; - yytext_ptr = yy_c_buf_p = yy_current_buffer->yy_buf_pos; - yyin = yy_current_buffer->yy_input_file; - yy_hold_char = *yy_c_buf_p; - } + (yy_did_buffer_switch_on_eof) = 1; +} +static void zconf_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} -#ifdef YY_USE_PROTOS -YY_BUFFER_STATE yy_create_buffer( FILE *file, int size ) -#else -YY_BUFFER_STATE yy_create_buffer( file, size ) -FILE *file; -int size; -#endif - { +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size ) +{ YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) yy_flex_alloc( sizeof( struct yy_buffer_state ) ); + + b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ - b->yy_ch_buf = (char *) yy_flex_alloc( b->yy_buf_size + 2 ); + b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2 ); if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); b->yy_is_our_buffer = 1; - yy_init_buffer( b, file ); + zconf_init_buffer(b,file ); return b; - } - +} -#ifdef YY_USE_PROTOS -void yy_delete_buffer( YY_BUFFER_STATE b ) -#else -void yy_delete_buffer( b ) -YY_BUFFER_STATE b; -#endif - { +/** Destroy the buffer. + * @param b a buffer created with zconf_create_buffer() + * + */ + void zconf_delete_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) return; - if ( b == yy_current_buffer ) - yy_current_buffer = (YY_BUFFER_STATE) 0; + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; if ( b->yy_is_our_buffer ) - yy_flex_free( (void *) b->yy_ch_buf ); - - yy_flex_free( (void *) b ); - } - + zconffree((void *) b->yy_ch_buf ); -#ifndef YY_ALWAYS_INTERACTIVE -#ifndef YY_NEVER_INTERACTIVE -#include <unistd.h> -#endif -#endif - -#ifdef YY_USE_PROTOS -void yy_init_buffer( YY_BUFFER_STATE b, FILE *file ) -#else -void yy_init_buffer( b, file ) -YY_BUFFER_STATE b; -FILE *file; -#endif + zconffree((void *) b ); +} +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a zconfrestart() or at EOF. + */ + static void zconf_init_buffer (YY_BUFFER_STATE b, FILE * file ) - { +{ int oerrno = errno; - - yy_flush_buffer( b ); + + zconf_flush_buffer(b ); b->yy_input_file = file; b->yy_fill_buffer = 1; -#if defined(YY_ALWAYS_INTERACTIVE) && YY_ALWAYS_INTERACTIVE - b->yy_is_interactive = 1; -#else -#if defined(YY_NEVER_INTERACTIVE) && YY_NEVER_INTERACTIVE - b->yy_is_interactive = 0; -#else - b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; -#endif -#endif + /* If b is the current buffer, then zconf_init_buffer was _probably_ + * called from zconfrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = 0; + errno = oerrno; - } - - -#ifdef YY_USE_PROTOS -void yy_flush_buffer( YY_BUFFER_STATE b ) -#else -void yy_flush_buffer( b ) -YY_BUFFER_STATE b; -#endif +} - { - if ( ! b ) +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void zconf_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) return; b->yy_n_chars = 0; @@ -1816,31 +1928,127 @@ YY_BUFFER_STATE b; b->yy_at_bol = 1; b->yy_buffer_status = YY_BUFFER_NEW; - if ( b == yy_current_buffer ) - yy_load_buffer_state(); + if ( b == YY_CURRENT_BUFFER ) + zconf_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + zconfensure_buffer_stack(); + + /* This block is copied from zconf_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from zconf_switch_to_buffer. */ + zconf_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void zconfpop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + zconf_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + zconf_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void zconfensure_buffer_stack (void) +{ + yy_size_t num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; } + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ -#ifndef YY_NO_SCAN_BUFFER -#ifdef YY_USE_PROTOS -YY_BUFFER_STATE yy_scan_buffer( char *base, yy_size_t size ) -#else -YY_BUFFER_STATE yy_scan_buffer( base, size ) -char *base; -yy_size_t size; -#endif - { - YY_BUFFER_STATE b; + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + if ( size < 2 || base[size-2] != YY_END_OF_BUFFER_CHAR || base[size-1] != YY_END_OF_BUFFER_CHAR ) /* They forgot to leave room for the EOB's. */ return 0; - b = (YY_BUFFER_STATE) yy_flex_alloc( sizeof( struct yy_buffer_state ) ); + b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" ); b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; @@ -1852,58 +2060,53 @@ yy_size_t size; b->yy_fill_buffer = 0; b->yy_buffer_status = YY_BUFFER_NEW; - yy_switch_to_buffer( b ); + zconf_switch_to_buffer(b ); return b; - } -#endif - - -#ifndef YY_NO_SCAN_STRING -#ifdef YY_USE_PROTOS -YY_BUFFER_STATE yy_scan_string( yyconst char *yy_str ) -#else -YY_BUFFER_STATE yy_scan_string( yy_str ) -yyconst char *yy_str; -#endif - { - int len; - for ( len = 0; yy_str[len]; ++len ) - ; - - return yy_scan_bytes( yy_str, len ); - } -#endif +} +/** Setup the input buffer state to scan a string. The next call to zconflex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * zconf_scan_bytes() instead. + */ +YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr ) +{ + + return zconf_scan_bytes(yystr,strlen(yystr) ); +} -#ifndef YY_NO_SCAN_BYTES -#ifdef YY_USE_PROTOS -YY_BUFFER_STATE yy_scan_bytes( yyconst char *bytes, int len ) -#else -YY_BUFFER_STATE yy_scan_bytes( bytes, len ) -yyconst char *bytes; -int len; -#endif - { +/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will + * scan from a @e copy of @a bytes. + * @param yybytes the byte buffer to scan + * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) +{ YY_BUFFER_STATE b; char *buf; yy_size_t n; - int i; - + yy_size_t i; + /* Get memory for full buffer, including space for trailing EOB's. */ - n = len + 2; - buf = (char *) yy_flex_alloc( n ); + n = _yybytes_len + 2; + buf = (char *) zconfalloc(n ); if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" ); - for ( i = 0; i < len; ++i ) - buf[i] = bytes[i]; + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; - buf[len] = buf[len+1] = YY_END_OF_BUFFER_CHAR; + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - b = yy_scan_buffer( buf, n ); + b = zconf_scan_buffer(buf,n ); if ( ! b ) - YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" ); /* It's okay to grow etc. this buffer, and we should throw it * away when we're done. @@ -1911,148 +2114,196 @@ int len; b->yy_is_our_buffer = 1; return b; - } +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 #endif +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} -#ifndef YY_NO_PUSH_STATE -#ifdef YY_USE_PROTOS -static void yy_push_state( int new_state ) -#else -static void yy_push_state( new_state ) -int new_state; -#endif - { - if ( yy_start_stack_ptr >= yy_start_stack_depth ) - { - yy_size_t new_size; +/* Redefine yyless() so it works in section 3 code. */ - yy_start_stack_depth += YY_START_STACK_INCR; - new_size = yy_start_stack_depth * sizeof( int ); +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up zconftext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + zconftext[zconfleng] = (yy_hold_char); \ + (yy_c_buf_p) = zconftext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + zconfleng = yyless_macro_arg; \ + } \ + while ( 0 ) - if ( ! yy_start_stack ) - yy_start_stack = (int *) yy_flex_alloc( new_size ); +/* Accessor methods (get/set functions) to struct members. */ - else - yy_start_stack = (int *) yy_flex_realloc( - (void *) yy_start_stack, new_size ); +/** Get the current line number. + * + */ +int zconfget_lineno (void) +{ + + return zconflineno; +} - if ( ! yy_start_stack ) - YY_FATAL_ERROR( - "out of memory expanding start-condition stack" ); - } +/** Get the input stream. + * + */ +FILE *zconfget_in (void) +{ + return zconfin; +} - yy_start_stack[yy_start_stack_ptr++] = YY_START; +/** Get the output stream. + * + */ +FILE *zconfget_out (void) +{ + return zconfout; +} - BEGIN(new_state); - } -#endif +/** Get the length of the current token. + * + */ +yy_size_t zconfget_leng (void) +{ + return zconfleng; +} +/** Get the current token. + * + */ -#ifndef YY_NO_POP_STATE -static void yy_pop_state YY_PROTO(( void )) - { - if ( --yy_start_stack_ptr < 0 ) - YY_FATAL_ERROR( "start-condition stack underflow" ); +char *zconfget_text (void) +{ + return zconftext; +} - BEGIN(yy_start_stack[yy_start_stack_ptr]); - } -#endif +/** Set the current line number. + * @param line_number + * + */ +void zconfset_lineno (int line_number ) +{ + + zconflineno = line_number; +} +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see zconf_switch_to_buffer + */ +void zconfset_in (FILE * in_str ) +{ + zconfin = in_str ; +} -#ifndef YY_NO_TOP_STATE -static int yy_top_state YY_PROTO(( void )) - { - return yy_start_stack[yy_start_stack_ptr - 1]; - } -#endif +void zconfset_out (FILE * out_str ) +{ + zconfout = out_str ; +} -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif +int zconfget_debug (void) +{ + return zconf_flex_debug; +} + +void zconfset_debug (int bdebug ) +{ + zconf_flex_debug = bdebug ; +} -#ifdef YY_USE_PROTOS -static void yy_fatal_error( yyconst char msg[] ) +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from zconflex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + zconfin = stdin; + zconfout = stdout; #else -static void yy_fatal_error( msg ) -char msg[]; + zconfin = (FILE *) 0; + zconfout = (FILE *) 0; #endif - { - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); - } + /* For future reference: Set errno on error, since we are called by + * zconflex_init() + */ + return 0; +} +/* zconflex_destroy is for both reentrant and non-reentrant scanners. */ +int zconflex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + zconf_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + zconfpop_buffer_state(); + } -/* Redefine yyless() so it works in section 3 code. */ + /* Destroy the stack itself. */ + zconffree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up yytext. */ \ - yytext[yyleng] = yy_hold_char; \ - yy_c_buf_p = yytext + n; \ - yy_hold_char = *yy_c_buf_p; \ - *yy_c_buf_p = '\0'; \ - yyleng = n; \ - } \ - while ( 0 ) + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * zconflex() is called, initialization will occur. */ + yy_init_globals( ); + return 0; +} -/* Internal utility routines. */ +/* + * Internal utility routines. + */ #ifndef yytext_ptr -#ifdef YY_USE_PROTOS -static void yy_flex_strncpy( char *s1, yyconst char *s2, int n ) -#else -static void yy_flex_strncpy( s1, s2, n ) -char *s1; -yyconst char *s2; -int n; -#endif - { +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ register int i; for ( i = 0; i < n; ++i ) s1[i] = s2[i]; - } +} #endif #ifdef YY_NEED_STRLEN -#ifdef YY_USE_PROTOS -static int yy_flex_strlen( yyconst char *s ) -#else -static int yy_flex_strlen( s ) -yyconst char *s; -#endif - { +static int yy_flex_strlen (yyconst char * s ) +{ register int n; for ( n = 0; s[n]; ++n ) ; return n; - } +} #endif - -#ifdef YY_USE_PROTOS -static void *yy_flex_alloc( yy_size_t size ) -#else -static void *yy_flex_alloc( size ) -yy_size_t size; -#endif - { +void *zconfalloc (yy_size_t size ) +{ return (void *) malloc( size ); - } +} -#ifdef YY_USE_PROTOS -static void *yy_flex_realloc( void *ptr, yy_size_t size ) -#else -static void *yy_flex_realloc( ptr, size ) -void *ptr; -yy_size_t size; -#endif - { +void *zconfrealloc (void * ptr, yy_size_t size ) +{ /* The cast to (char *) in the following accommodates both * implementations that use char* generic pointers, and those * that use void* generic pointers. It works with the latter @@ -2061,25 +2312,14 @@ yy_size_t size; * as though doing an assignment. */ return (void *) realloc( (char *) ptr, size ); - } +} -#ifdef YY_USE_PROTOS -static void yy_flex_free( void *ptr ) -#else -static void yy_flex_free( ptr ) -void *ptr; -#endif - { - free( ptr ); - } +void zconffree (void * ptr ) +{ + free( (char *) ptr ); /* see zconfrealloc() for (char *) cast */ +} -#if defined(YY_MAIN) && YY_MAIN -int main() - { - yylex(); - return 0; - } -#endif +#define YYTABLES_NAME "yytables" void zconf_starthelp(void) { @@ -2094,7 +2334,6 @@ static void zconf_endhelp(void) BEGIN(INITIAL); } - /* * Try to open specified file with following names: * ./name @@ -2121,8 +2360,8 @@ FILE *zconf_fopen(const char *name) void zconf_initscan(const char *name) { - yyin = zconf_fopen(name); - if (!yyin) { + zconfin = zconf_fopen(name); + if (!zconfin) { printf("can't find file %s\n", name); exit(1); } @@ -2142,13 +2381,13 @@ void zconf_nextfile(const char *name) memset(buf, 0, sizeof(*buf)); current_buf->state = YY_CURRENT_BUFFER; - yyin = zconf_fopen(file->name); - if (!yyin) { + zconfin = zconf_fopen(file->name); + if (!zconfin) { printf("%s:%d: can't open file \"%s\"\n", zconf_curname(), zconf_lineno(), file->name); exit(1); } - yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE)); + zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE)); buf->parent = current_buf; current_buf = buf; @@ -2190,9 +2429,14 @@ void zconf_nextfiles(const char *wildcard) return; } - w = g.gl_pathv; - while (*w) - zconf_nextfile(*w++); + /* working through files backwards, since + * we're first pushing them on a stack + * before actually handling them. + */ + for (i = g.gl_pathc; i > 0; i--) { + w = &g.gl_pathv[i - 1]; + zconf_nextfile(*w); + } globfree(&g); } @@ -2205,9 +2449,9 @@ static void zconf_endfile(void) parent = current_buf->parent; if (parent) { - fclose(yyin); - yy_delete_buffer(YY_CURRENT_BUFFER); - yy_switch_to_buffer(parent->state); + fclose(zconfin); + zconf_delete_buffer(YY_CURRENT_BUFFER); + zconf_switch_to_buffer(parent->state); } free(current_buf); current_buf = parent; @@ -2222,3 +2466,4 @@ const char *zconf_curname(void) { return current_pos.file ? current_pos.file->name : "<none>"; } +

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coreboot-gerrit May 2015