coreboot-gerrit May 2015

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Patch set updated for coreboot: 4b1d869 assets: abstract away the firmware assets used for booting
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10264 -gerrit commit 4b1d8692dbcc46698b85c2047180f2b67d2c9099 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed May 20 12:08:55 2015 -0500 assets: abstract away the firmware assets used for booting As there can be more than one source of firmware assets this patch generalizes the notion of locating a particular asset. struct asset is added along with some helper functions for working on assets as a first class citizen. Change-Id: I2ce575d1e5259aed4c34c3dcfd438abe9db1d7b9 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm64/boot.c | 2 +- src/arch/x86/boot/boot.c | 2 +- src/include/assets.h | 90 +++++++++++++++++++++ src/include/program_loading.h | 54 ++++++++----- src/lib/Makefile.inc | 4 + src/lib/assets.c | 92 ++++++++++++++++++++++ src/lib/cbfs.c | 8 +- src/lib/prog_loaders.c | 90 ++------------------- src/lib/rmodule.c | 6 +- src/lib/selfboot.c | 9 ++- src/soc/intel/baytrail/refcode.c | 6 +- src/soc/intel/broadwell/refcode.c | 6 +- .../google/chromeos/vboot2/vboot_loader.c | 48 +++++------ 13 files changed, 268 insertions(+), 149 deletions(-) diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 226d8d7..03ad053 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -73,7 +73,7 @@ void arch_prog_run(struct prog *prog) void (*doit)(void *); void *arg; - if (ENV_RAMSTAGE && prog->type == PROG_PAYLOAD) { + if (ENV_RAMSTAGE && prog_type(prog) == ASSET_PAYLOAD) { run_payload(prog); return; } diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 0ff8a6c..d86a6c3 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -125,7 +125,7 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) static void try_payload(struct prog *prog) { - if (prog->type == PROG_PAYLOAD) { + if (prog_type(prog) == ASSET_PAYLOAD) { if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) jmp_payload_no_bounce_buffer(prog_entry(prog)); else diff --git a/src/include/assets.h b/src/include/assets.h new file mode 100644 index 0000000..7b08054 --- /dev/null +++ b/src/include/assets.h @@ -0,0 +1,90 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#ifndef ASSETS_H +#define ASSETS_H + +#include <region.h> + +/* An asset represents data used to boot the system. It can be found within + * CBFS or some other mechanism. While CBFS can be a source of an asset, note + * that using the asset API implies querying of other sources. */ + +enum asset_type { + ASSET_UNKNOWN, + ASSET_VERSTAGE, + ASSET_ROMSTAGE, + ASSET_RAMSTAGE, + ASSET_REFCODE, + ASSET_PAYLOAD, +}; + +struct asset { + enum asset_type type; + const char *name; + struct region_device rdev; +}; + +static inline const char *asset_name(const struct asset *asset) +{ + return asset->name; +} + +static inline enum asset_type asset_type(const struct asset *asset) +{ + return asset->type; +} + +static struct region_device *asset_rdev(struct asset *asset) +{ + return &asset->rdev; +} + +static inline size_t asset_size(const struct asset *asset) +{ + return region_device_sz(&asset->rdev); +} + +/* Returns NULL on error. */ +static inline void *asset_mmap(const struct asset *asset) +{ + return rdev_mmap_full(&asset->rdev); +} + +#define ASSET_INIT(type_, name_) \ + { \ + .type = (type_), \ + .name = (name_), \ + } + +/* Locate the asset as described by the parameter. It will query all known + * asset providers. Returns 0 on success. < 0 on error. */ +int asset_locate(struct asset *asset); + +struct asset_provider { + const char *name; + /* Determines if the provider is the active one. If so returns 1 else 0 + * or < 0 on error. */ + int (*is_active)(struct asset *asset); + /* Returns < 0 on error or 0 on success. This function locates + * the rdev representing the file data associated with the passed in + * prog. */ + int (*locate)(struct asset *asset); +}; + +#endif /* ASSETS_H */ diff --git a/src/include/program_loading.h b/src/include/program_loading.h index d8e7de3..49a36fa 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -22,7 +22,7 @@ #include <stdint.h> #include <stddef.h> -#include <region.h> +#include <assets.h> enum { /* Last segment of program. Can be used to take different actions for @@ -34,39 +34,49 @@ enum { * set on the last segment loaded. */ void arch_segment_loaded(uintptr_t start, size_t size, int flags); -enum prog_type { - PROG_VERSTAGE, - PROG_ROMSTAGE, - PROG_RAMSTAGE, - PROG_REFCODE, - PROG_PAYLOAD, -}; - /* Representation of a program. */ struct prog { - enum prog_type type; - const char *name; - /* Source of program content to load. After loading program it - * represents the memory region of the stages and payload. For - * achitectures that use a bounce buffer then it would represent - * the bounce buffer. */ - struct region_device rdev; + /* The region_device within the asset is the source of program content + * to load. After loading program it represents the memory region of + * the stages and payload. For achitectures that use a bounce buffer + * then it would represent the bounce buffer. */ + struct asset asset; /* Entry to program with optional argument. It's up to the architecture * to decide if argument is passed. */ void (*entry)(void *); void *arg; }; +#define PROG_INIT(type_, name_) \ + { \ + .asset = ASSET_INIT(type_, name_), \ + } + +static inline const char *prog_name(const struct prog *prog) +{ + return asset_name(&prog->asset); +} + +static inline enum asset_type prog_type(const struct prog *prog) +{ + return asset_type(&prog->asset); +} + +static inline struct region_device *prog_rdev(struct prog *prog) +{ + return asset_rdev(&prog->asset); +} + /* Only valid for loaded programs. */ static inline size_t prog_size(const struct prog *prog) { - return region_device_sz(&prog->rdev); + return asset_size(&prog->asset); } /* Only valid for loaded programs. */ static inline void *prog_start(const struct prog *prog) { - return rdev_mmap_full(&prog->rdev); + return asset_mmap(&prog->asset); } static inline void *prog_entry(const struct prog *prog) @@ -85,7 +95,7 @@ extern const struct mem_region_device addrspace_32bit; static inline void prog_memory_init(struct prog *prog, uintptr_t ptr, size_t size) { - rdev_chain(&prog->rdev, &addrspace_32bit.rdev, ptr, size); + rdev_chain(&prog->asset.rdev, &addrspace_32bit.rdev, ptr, size); } static inline void prog_set_area(struct prog *prog, void *start, size_t size) @@ -100,7 +110,11 @@ static inline void prog_set_entry(struct prog *prog, void *e, void *arg) } /* Locate the identified program to run. Return 0 on success. < 0 on error. */ -int prog_locate(struct prog *prog); +static inline int prog_locate(struct prog *prog) +{ + return asset_locate(&prog->asset); +} + /* Run the program described by prog. */ void prog_run(struct prog *prog); /* Per architecture implementation running a program. */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 4a0301e..a5d227b 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -18,6 +18,7 @@ # subdirs-y += loaders +bootblock-y += assets.c bootblock-y += prog_loaders.c bootblock-y += prog_ops.c bootblock-y += cbfs.c @@ -36,6 +37,7 @@ bootblock-y += region.c bootblock-y += boot_device.c bootblock-y += fmap.c +verstage-y += assets.c verstage-y += prog_loaders.c verstage-y += prog_ops.c verstage-y += delay.c @@ -60,6 +62,7 @@ verstage-$(CONFIG_GENERIC_UDELAY) += timer.c verstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c verstage-y += mem_pool.c +romstage-y += assets.c romstage-y += prog_loaders.c romstage-y += prog_ops.c romstage-y += memchr.c @@ -92,6 +95,7 @@ endif romstage-$(CONFIG_GENERIC_UDELAY) += timer.c +ramstage-y += assets.c ramstage-y += prog_loaders.c ramstage-y += prog_ops.c ramstage-y += hardwaremain.c diff --git a/src/lib/assets.c b/src/lib/assets.c new file mode 100644 index 0000000..781c326 --- /dev/null +++ b/src/lib/assets.c @@ -0,0 +1,92 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + + +#include <assets.h> +#include <boot_device.h> +#include <cbfs.h> +#include <console/console.h> +#include <rules.h> +#include <stdlib.h> + +#define DEFAULT_CBFS_PROVIDER_PRESENT \ + (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) + +#if DEFAULT_CBFS_PROVIDER_PRESENT +static int cbfs_boot_asset_locate(struct asset *asset) +{ + return cbfs_boot_locate(&asset->rdev, asset->name, NULL); +} + +static const struct asset_provider cbfs_default_provider = { + .locate = cbfs_boot_asset_locate, +}; +#endif + +extern const struct asset_provider vboot_provider; + +static const struct asset_provider *providers[] = { +#if CONFIG_VBOOT_VERIFY_FIRMWARE + &vboot_provider, +#endif +#if DEFAULT_CBFS_PROVIDER_PRESENT + &cbfs_default_provider, +#endif +}; + +int asset_locate(struct asset *asset) +{ + int i; + + boot_device_init(); + + for (i = 0; i < ARRAY_SIZE(providers); i++) { + /* Default provider state is active. */ + int ret = 1; + const struct asset_provider *ops; + + ops = providers[i]; + + if (ops->is_active != NULL) + ret = ops->is_active(asset); + + if (ret == 0) { + printk(BIOS_DEBUG, "%s provider inactive.\n", + ops->name); + continue; + } else if (ret < 0) { + printk(BIOS_DEBUG, "%s provider failure.\n", + ops->name); + continue; + } + + printk(BIOS_DEBUG, "%s provider active.\n", ops->name); + + if (ops->locate(asset)) + continue; + + printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", + asset->name, region_device_offset(&asset->rdev), + region_device_sz(&asset->rdev)); + + return 0; + } + + return -1; +} diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 23dfee7..3e83765 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -188,12 +188,10 @@ void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device) void *cbfs_boot_load_stage_by_name(const char *name) { - struct prog stage = { - .name = name, - }; + struct prog stage = PROG_INIT(ASSET_UNKNOWN, name); uint32_t type = CBFS_TYPE_STAGE; - if (cbfs_boot_locate(&stage.rdev, name, &type)) + if (cbfs_boot_locate(&stage.asset.rdev, name, &type)) return NULL; if (cbfs_prog_stage_load(&stage)) @@ -209,7 +207,7 @@ int cbfs_prog_stage_load(struct prog *pstage) void *entry; size_t fsize; size_t foffset; - const struct region_device *fh = &pstage->rdev; + const struct region_device *fh = &pstage->asset.rdev; if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return 0; diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 7799994..ec5eeb8 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -20,7 +20,6 @@ #include <stdlib.h> #include <arch/stages.h> -#include <boot_device.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -38,83 +37,10 @@ /* Only can represent up to 1 byte less than size_t. */ const struct mem_region_device addrspace_32bit = MEM_REGION_DEV_INIT(0, ~0UL); -#define DEFAULT_CBFS_LOADER_PRESENT \ - (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) - -#if DEFAULT_CBFS_LOADER_PRESENT -static int cbfs_boot_prog_locate(struct prog *prog) -{ - return cbfs_boot_locate(&prog->rdev, prog->name, NULL); -} - -static const struct prog_loader_ops cbfs_default_loader = { - .locate = cbfs_boot_prog_locate, -}; -#endif - -extern const struct prog_loader_ops vboot_loader; - -static const struct prog_loader_ops *loaders[] = { -#if CONFIG_VBOOT_VERIFY_FIRMWARE - &vboot_loader, -#endif -#if DEFAULT_CBFS_LOADER_PRESENT - &cbfs_default_loader, -#endif -}; - -int prog_locate(struct prog *prog) -{ - int i; - - boot_device_init(); - - for (i = 0; i < ARRAY_SIZE(loaders); i++) { - /* Default loader state is active. */ - int ret = 1; - const struct prog_loader_ops *ops; - - ops = loaders[i]; - - if (ops->is_loader_active != NULL) - ret = ops->is_loader_active(prog); - - if (ret == 0) { - printk(BIOS_DEBUG, "%s loader inactive.\n", - ops->name); - continue; - } else if (ret < 0) { - printk(BIOS_DEBUG, "%s loader failure.\n", - ops->name); - continue; - } - - printk(BIOS_DEBUG, "%s loader active.\n", ops->name); - - if (ops->locate(prog)) - continue; - - printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", - prog->name, region_device_offset(&prog->rdev), - region_device_sz(&prog->rdev)); - - return 0; - } - - return -1; -} - void run_romstage(void) { - struct prog romstage = { - .name = CONFIG_CBFS_PREFIX "/romstage", - .type = PROG_ROMSTAGE, - }; - - /* The only time the default CBFS loader isn't present is during - * VERSTAGE in which it returns back to the calling stage. */ - if (!DEFAULT_CBFS_LOADER_PRESENT) - return; + struct prog romstage = + PROG_INIT(ASSET_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); if (prog_locate(&romstage)) goto fail; @@ -166,10 +92,8 @@ static int load_relocatable_ramstage(struct prog *ramstage) void run_ramstage(void) { - struct prog ramstage = { - .name = CONFIG_CBFS_PREFIX "/ramstage", - .type = PROG_RAMSTAGE, - }; + struct prog ramstage = + PROG_INIT(ASSET_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); /* Only x86 systems currently take the same firmware path on resume. */ if (IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) @@ -197,10 +121,8 @@ fail: die("Ramstage was not loaded!\n"); } -static struct prog global_payload = { - .name = CONFIG_CBFS_PREFIX "/payload", - .type = PROG_PAYLOAD, -}; +static struct prog global_payload = + PROG_INIT(ASSET_PAYLOAD, CONFIG_CBFS_PREFIX "/payload"); void __attribute__((weak)) mirror_payload(struct prog *payload) { diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index e986590..ed7978a 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -264,10 +264,10 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) void *rmod_loc; struct region_device *fh; - if (rsl->prog == NULL || rsl->prog->name == NULL) + if (rsl->prog == NULL || prog_name(rsl->prog) == NULL) return -1; - fh = &rsl->prog->rdev; + fh = prog_rdev(rsl->prog); if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return -1; @@ -284,7 +284,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) rmod_loc = &stage_region[rmodule_offset]; printk(BIOS_INFO, "Decompressing stage %s @ 0x%p (%d bytes)\n", - rsl->prog->name, rmod_loc, stage.memlen); + prog_name(rsl->prog), rmod_loc, stage.memlen); if (stage.compression == CBFS_COMPRESS_NONE) { if (rdev_readat(fh, rmod_loc, sizeof(stage), stage.len) != diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index abe1df5..f8a3918 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -454,7 +454,7 @@ void *selfload(struct prog *payload) struct segment head; void *data; - data = rdev_mmap_full(&payload->rdev); + data = rdev_mmap_full(prog_rdev(payload)); if (data == NULL) return NULL; @@ -469,7 +469,10 @@ void *selfload(struct prog *payload) printk(BIOS_SPEW, "Loaded segments\n"); - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); + + /* Update the payload's area with the bounce buffer information. */ + prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); /* Update the payload's area with the bounce buffer information. */ prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); @@ -477,6 +480,6 @@ void *selfload(struct prog *payload) return (void *)entry; out: - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); return NULL; } diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 618fefd..278351e 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -48,10 +48,8 @@ static efi_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index f39fa92..8e2c468 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -44,10 +44,8 @@ static pei_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index c6a75bd..00e4110 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -17,10 +17,10 @@ * Foundation, Inc. */ +#include <assets.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> -#include <program_loading.h> #include <rmodule.h> #include <rules.h> #include <string.h> @@ -79,7 +79,7 @@ static void init_vb2_working_data(void) wd->buffer_size = work_size - wd->buffer_offset; } -static int vboot_loader_active(struct prog *prog) +static int vboot_active(struct asset *asset) { struct vb2_working_data *wd; int run_verification; @@ -90,15 +90,15 @@ static int vboot_loader_active(struct prog *prog) init_vb2_working_data(); verstage_main(); } else if (verstage_should_load()) { - struct prog verstage = { - .type = PROG_VERSTAGE, - .name = CONFIG_CBFS_PREFIX "/verstage", - }; + struct prog verstage = + PROG_INIT(ASSET_VERSTAGE, + CONFIG_CBFS_PREFIX "/verstage"); printk(BIOS_DEBUG, "VBOOT: Loading verstage.\n"); /* load verstage from RO */ - if (cbfs_boot_locate(&verstage.rdev, verstage.name, NULL) || + if (cbfs_boot_locate(prog_rdev(&verstage), + prog_name(&verstage), NULL) || cbfs_prog_stage_load(&verstage)) die("failed to load verstage"); @@ -126,22 +126,22 @@ static int vboot_loader_active(struct prog *prog) } static int vboot_locate_by_components(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct vboot_components *fw_info; size_t metadata_sz; size_t offset; size_t size; - struct region_device *fw = &prog->rdev; + struct region_device *fw = asset_rdev(asset); int fw_index = 0; - if (prog->type == PROG_ROMSTAGE) + if (asset_type(asset) == ASSET_ROMSTAGE) fw_index = CONFIG_VBOOT_ROMSTAGE_INDEX; - else if (prog->type == PROG_RAMSTAGE) + else if (asset_type(asset) == ASSET_RAMSTAGE) fw_index = CONFIG_VBOOT_RAMSTAGE_INDEX; - else if (prog->type == PROG_PAYLOAD) + else if (asset_type(asset) == ASSET_PAYLOAD) fw_index = CONFIG_VBOOT_BOOT_LOADER_INDEX; - else if (prog->type == PROG_REFCODE) + else if (asset_type(asset) == ASSET_REFCODE) fw_index = CONFIG_VBOOT_REFCODE_INDEX; else die("Invalid program type for vboot."); @@ -175,7 +175,7 @@ static int vboot_locate_by_components(const struct region_device *fw_main, } static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct cbfsd cbfs; struct region_device rdev; @@ -190,21 +190,21 @@ static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, cbfs.rdev = &rdev; cbfs.align = props.align; - return cbfs_locate(&prog->rdev, &cbfs, prog->name, NULL); + return cbfs_locate(asset_rdev(asset), &cbfs, asset_name(asset), NULL); } -static int vboot_prog_locate(const struct region_device *fw_main, - struct prog *prog) +static int vboot_asset_locate(const struct region_device *fw_main, + struct asset *asset) { if (IS_ENABLED(CONFIG_MULTIPLE_CBFS_INSTANCES)) - return vboot_locate_by_multi_cbfs(fw_main, prog); + return vboot_locate_by_multi_cbfs(fw_main, asset); else - return vboot_locate_by_components(fw_main, prog); + return vboot_locate_by_components(fw_main, asset); } -/* This function is only called when vboot_loader_active() returns 1. That +/* This function is only called when vboot_active() returns 1. That * means we are taking vboot paths. */ -static int vboot_locate(struct prog *prog) +static int vboot_locate(struct asset *asset) { struct vb2_working_data *wd; struct region_device fw_main; @@ -219,11 +219,11 @@ static int vboot_locate(struct prog *prog) if (vb2_get_selected_region(wd, &fw_main)) die("failed to reference selected region\n"); - return vboot_prog_locate(&fw_main, prog); + return vboot_asset_locate(&fw_main, asset); } -const struct prog_loader_ops vboot_loader = { +const struct asset_provider vboot_provider = { .name = "VBOOT", - .is_loader_active = vboot_loader_active, + .is_active = vboot_active, .locate = vboot_locate, };

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Patch set updated for coreboot: 87a66cc assets: abstract away the firmware assets used for booting
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10264 -gerrit commit 87a66ccca647a6a39fe90fe946686bba94b3fdbc Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed May 20 12:08:55 2015 -0500 assets: abstract away the firmware assets used for booting As there can be more than one source of firmware assets this patch generalizes the notion of locating a particular asset. struct asset is added along with some helper functions for working on assets as a first class citizen. Change-Id: I2ce575d1e5259aed4c34c3dcfd438abe9db1d7b9 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm64/boot.c | 2 +- src/arch/x86/boot/boot.c | 2 +- src/include/assets.h | 90 +++++++++++++++++++++ src/include/program_loading.h | 54 ++++++++----- src/lib/Makefile.inc | 4 + src/lib/assets.c | 93 ++++++++++++++++++++++ src/lib/cbfs.c | 8 +- src/lib/prog_loaders.c | 90 ++------------------- src/lib/rmodule.c | 6 +- src/lib/selfboot.c | 9 ++- src/soc/intel/baytrail/refcode.c | 6 +- src/soc/intel/broadwell/refcode.c | 6 +- .../google/chromeos/vboot2/vboot_loader.c | 48 +++++------ 13 files changed, 269 insertions(+), 149 deletions(-) diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 226d8d7..03ad053 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -73,7 +73,7 @@ void arch_prog_run(struct prog *prog) void (*doit)(void *); void *arg; - if (ENV_RAMSTAGE && prog->type == PROG_PAYLOAD) { + if (ENV_RAMSTAGE && prog_type(prog) == ASSET_PAYLOAD) { run_payload(prog); return; } diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 0ff8a6c..d86a6c3 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -125,7 +125,7 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) static void try_payload(struct prog *prog) { - if (prog->type == PROG_PAYLOAD) { + if (prog_type(prog) == ASSET_PAYLOAD) { if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) jmp_payload_no_bounce_buffer(prog_entry(prog)); else diff --git a/src/include/assets.h b/src/include/assets.h new file mode 100644 index 0000000..efd63b5 --- /dev/null +++ b/src/include/assets.h @@ -0,0 +1,90 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#ifndef ASSETS_H +#define ASSETS_H + +#include <region.h> + +/* An asset represnts data used to boot the system. It can be found within + * CBFS or some other mechanism. While CBFS can be a source of an asset not + * that using the asset API implies querying of other sources. */ + +enum asset_type { + ASSET_UNKNOWN, + ASSET_VERSTAGE, + ASSET_ROMSTAGE, + ASSET_RAMSTAGE, + ASSET_REFCODE, + ASSET_PAYLOAD, +}; + +struct asset { + enum asset_type type; + const char *name; + struct region_device rdev; +}; + +static inline const char *asset_name(const struct asset *asset) +{ + return asset->name; +} + +static inline enum asset_type asset_type(const struct asset *asset) +{ + return asset->type; +} + +static struct region_device *asset_rdev(struct asset *asset) +{ + return &asset->rdev; +} + +static inline size_t asset_size(const struct asset *asset) +{ + return region_device_sz(&asset->rdev); +} + +/* Returns NULL on error. */ +static inline void *asset_mmap(const struct asset *asset) +{ + return rdev_mmap_full(&asset->rdev); +} + +#define ASSET_INIT(type_, name_) \ + { \ + .type = (type_), \ + .name = (name_), \ + } + +/* Locate the asset as described by the parameter. It will query all known + * asset providers. Returns 0 on succes. < 0 on error. */ +int asset_locate(struct asset *asset); + +struct asset_provider { + const char *name; + /* Determine if the provider is the active one. If so returns 1 else 0 + * or < 0 on error. */ + int (*is_active)(struct asset *asset); + /* Returns < 0 on error or 0 on success. This function locates + * the rdev representing the file data associated with the passed in + * prog. */ + int (*locate)(struct asset *asset); +}; + +#endif /* ASSETS_H */ diff --git a/src/include/program_loading.h b/src/include/program_loading.h index d8e7de3..49a36fa 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -22,7 +22,7 @@ #include <stdint.h> #include <stddef.h> -#include <region.h> +#include <assets.h> enum { /* Last segment of program. Can be used to take different actions for @@ -34,39 +34,49 @@ enum { * set on the last segment loaded. */ void arch_segment_loaded(uintptr_t start, size_t size, int flags); -enum prog_type { - PROG_VERSTAGE, - PROG_ROMSTAGE, - PROG_RAMSTAGE, - PROG_REFCODE, - PROG_PAYLOAD, -}; - /* Representation of a program. */ struct prog { - enum prog_type type; - const char *name; - /* Source of program content to load. After loading program it - * represents the memory region of the stages and payload. For - * achitectures that use a bounce buffer then it would represent - * the bounce buffer. */ - struct region_device rdev; + /* The region_device within the asset is the source of program content + * to load. After loading program it represents the memory region of + * the stages and payload. For achitectures that use a bounce buffer + * then it would represent the bounce buffer. */ + struct asset asset; /* Entry to program with optional argument. It's up to the architecture * to decide if argument is passed. */ void (*entry)(void *); void *arg; }; +#define PROG_INIT(type_, name_) \ + { \ + .asset = ASSET_INIT(type_, name_), \ + } + +static inline const char *prog_name(const struct prog *prog) +{ + return asset_name(&prog->asset); +} + +static inline enum asset_type prog_type(const struct prog *prog) +{ + return asset_type(&prog->asset); +} + +static inline struct region_device *prog_rdev(struct prog *prog) +{ + return asset_rdev(&prog->asset); +} + /* Only valid for loaded programs. */ static inline size_t prog_size(const struct prog *prog) { - return region_device_sz(&prog->rdev); + return asset_size(&prog->asset); } /* Only valid for loaded programs. */ static inline void *prog_start(const struct prog *prog) { - return rdev_mmap_full(&prog->rdev); + return asset_mmap(&prog->asset); } static inline void *prog_entry(const struct prog *prog) @@ -85,7 +95,7 @@ extern const struct mem_region_device addrspace_32bit; static inline void prog_memory_init(struct prog *prog, uintptr_t ptr, size_t size) { - rdev_chain(&prog->rdev, &addrspace_32bit.rdev, ptr, size); + rdev_chain(&prog->asset.rdev, &addrspace_32bit.rdev, ptr, size); } static inline void prog_set_area(struct prog *prog, void *start, size_t size) @@ -100,7 +110,11 @@ static inline void prog_set_entry(struct prog *prog, void *e, void *arg) } /* Locate the identified program to run. Return 0 on success. < 0 on error. */ -int prog_locate(struct prog *prog); +static inline int prog_locate(struct prog *prog) +{ + return asset_locate(&prog->asset); +} + /* Run the program described by prog. */ void prog_run(struct prog *prog); /* Per architecture implementation running a program. */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 4a0301e..a5d227b 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -18,6 +18,7 @@ # subdirs-y += loaders +bootblock-y += assets.c bootblock-y += prog_loaders.c bootblock-y += prog_ops.c bootblock-y += cbfs.c @@ -36,6 +37,7 @@ bootblock-y += region.c bootblock-y += boot_device.c bootblock-y += fmap.c +verstage-y += assets.c verstage-y += prog_loaders.c verstage-y += prog_ops.c verstage-y += delay.c @@ -60,6 +62,7 @@ verstage-$(CONFIG_GENERIC_UDELAY) += timer.c verstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c verstage-y += mem_pool.c +romstage-y += assets.c romstage-y += prog_loaders.c romstage-y += prog_ops.c romstage-y += memchr.c @@ -92,6 +95,7 @@ endif romstage-$(CONFIG_GENERIC_UDELAY) += timer.c +ramstage-y += assets.c ramstage-y += prog_loaders.c ramstage-y += prog_ops.c ramstage-y += hardwaremain.c diff --git a/src/lib/assets.c b/src/lib/assets.c new file mode 100644 index 0000000..4681e35 --- /dev/null +++ b/src/lib/assets.c @@ -0,0 +1,93 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + + +#include <assets.h> +#include <boot_device.h> +#include <cbfs.h> +#include <console/console.h> +#include <rules.h> +#include <stdlib.h> + +#define DEFAULT_CBFS_PROVIDER_PRESENT \ + (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) + +#if DEFAULT_CBFS_PROVIDER_PRESENT +static int cbfs_boot_asset_locate(struct asset *asset) +{ + return cbfs_boot_locate(&asset->rdev, asset->name, NULL); +} + +static const struct asset_provider cbfs_default_provider = { + .locate = cbfs_boot_asset_locate, +}; +#endif + +extern const struct asset_provider vboot_provider; + +static const struct asset_provider *providers[] = { +#if CONFIG_VBOOT_VERIFY_FIRMWARE + &vboot_provider, +#endif +#if DEFAULT_CBFS_PROVIDER_PRESENT + &cbfs_default_provider, +#endif +}; + +int asset_locate(struct asset *asset) +{ + int i; + + boot_device_init(); + + for (i = 0; i < ARRAY_SIZE(providers); i++) { + /* Default provider state is active. */ + int ret = 1; + const struct asset_provider *ops; + + ops = providers[i]; + + if (ops->is_active != NULL) + ret = ops->is_active(asset); + + if (ret == 0) { + printk(BIOS_DEBUG, "%s provider inactive.\n", + ops->name); + continue; + } else if (ret < 0) { + printk(BIOS_DEBUG, "%s provider failure.\n", + ops->name); + continue; + } + + printk(BIOS_DEBUG, "%s provider active.\n", ops->name); + + if (ops->locate(asset)) + continue; + + printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", + asset->name, region_device_offset(&asset->rdev), + region_device_sz(&asset->rdev)); + + return 0; + } + + return -1; +} + diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 23dfee7..3e83765 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -188,12 +188,10 @@ void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device) void *cbfs_boot_load_stage_by_name(const char *name) { - struct prog stage = { - .name = name, - }; + struct prog stage = PROG_INIT(ASSET_UNKNOWN, name); uint32_t type = CBFS_TYPE_STAGE; - if (cbfs_boot_locate(&stage.rdev, name, &type)) + if (cbfs_boot_locate(&stage.asset.rdev, name, &type)) return NULL; if (cbfs_prog_stage_load(&stage)) @@ -209,7 +207,7 @@ int cbfs_prog_stage_load(struct prog *pstage) void *entry; size_t fsize; size_t foffset; - const struct region_device *fh = &pstage->rdev; + const struct region_device *fh = &pstage->asset.rdev; if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return 0; diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 7799994..ec5eeb8 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -20,7 +20,6 @@ #include <stdlib.h> #include <arch/stages.h> -#include <boot_device.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -38,83 +37,10 @@ /* Only can represent up to 1 byte less than size_t. */ const struct mem_region_device addrspace_32bit = MEM_REGION_DEV_INIT(0, ~0UL); -#define DEFAULT_CBFS_LOADER_PRESENT \ - (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) - -#if DEFAULT_CBFS_LOADER_PRESENT -static int cbfs_boot_prog_locate(struct prog *prog) -{ - return cbfs_boot_locate(&prog->rdev, prog->name, NULL); -} - -static const struct prog_loader_ops cbfs_default_loader = { - .locate = cbfs_boot_prog_locate, -}; -#endif - -extern const struct prog_loader_ops vboot_loader; - -static const struct prog_loader_ops *loaders[] = { -#if CONFIG_VBOOT_VERIFY_FIRMWARE - &vboot_loader, -#endif -#if DEFAULT_CBFS_LOADER_PRESENT - &cbfs_default_loader, -#endif -}; - -int prog_locate(struct prog *prog) -{ - int i; - - boot_device_init(); - - for (i = 0; i < ARRAY_SIZE(loaders); i++) { - /* Default loader state is active. */ - int ret = 1; - const struct prog_loader_ops *ops; - - ops = loaders[i]; - - if (ops->is_loader_active != NULL) - ret = ops->is_loader_active(prog); - - if (ret == 0) { - printk(BIOS_DEBUG, "%s loader inactive.\n", - ops->name); - continue; - } else if (ret < 0) { - printk(BIOS_DEBUG, "%s loader failure.\n", - ops->name); - continue; - } - - printk(BIOS_DEBUG, "%s loader active.\n", ops->name); - - if (ops->locate(prog)) - continue; - - printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", - prog->name, region_device_offset(&prog->rdev), - region_device_sz(&prog->rdev)); - - return 0; - } - - return -1; -} - void run_romstage(void) { - struct prog romstage = { - .name = CONFIG_CBFS_PREFIX "/romstage", - .type = PROG_ROMSTAGE, - }; - - /* The only time the default CBFS loader isn't present is during - * VERSTAGE in which it returns back to the calling stage. */ - if (!DEFAULT_CBFS_LOADER_PRESENT) - return; + struct prog romstage = + PROG_INIT(ASSET_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); if (prog_locate(&romstage)) goto fail; @@ -166,10 +92,8 @@ static int load_relocatable_ramstage(struct prog *ramstage) void run_ramstage(void) { - struct prog ramstage = { - .name = CONFIG_CBFS_PREFIX "/ramstage", - .type = PROG_RAMSTAGE, - }; + struct prog ramstage = + PROG_INIT(ASSET_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); /* Only x86 systems currently take the same firmware path on resume. */ if (IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) @@ -197,10 +121,8 @@ fail: die("Ramstage was not loaded!\n"); } -static struct prog global_payload = { - .name = CONFIG_CBFS_PREFIX "/payload", - .type = PROG_PAYLOAD, -}; +static struct prog global_payload = + PROG_INIT(ASSET_PAYLOAD, CONFIG_CBFS_PREFIX "/payload"); void __attribute__((weak)) mirror_payload(struct prog *payload) { diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index e986590..ed7978a 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -264,10 +264,10 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) void *rmod_loc; struct region_device *fh; - if (rsl->prog == NULL || rsl->prog->name == NULL) + if (rsl->prog == NULL || prog_name(rsl->prog) == NULL) return -1; - fh = &rsl->prog->rdev; + fh = prog_rdev(rsl->prog); if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return -1; @@ -284,7 +284,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) rmod_loc = &stage_region[rmodule_offset]; printk(BIOS_INFO, "Decompressing stage %s @ 0x%p (%d bytes)\n", - rsl->prog->name, rmod_loc, stage.memlen); + prog_name(rsl->prog), rmod_loc, stage.memlen); if (stage.compression == CBFS_COMPRESS_NONE) { if (rdev_readat(fh, rmod_loc, sizeof(stage), stage.len) != diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index abe1df5..f8a3918 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -454,7 +454,7 @@ void *selfload(struct prog *payload) struct segment head; void *data; - data = rdev_mmap_full(&payload->rdev); + data = rdev_mmap_full(prog_rdev(payload)); if (data == NULL) return NULL; @@ -469,7 +469,10 @@ void *selfload(struct prog *payload) printk(BIOS_SPEW, "Loaded segments\n"); - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); + + /* Update the payload's area with the bounce buffer information. */ + prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); /* Update the payload's area with the bounce buffer information. */ prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); @@ -477,6 +480,6 @@ void *selfload(struct prog *payload) return (void *)entry; out: - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); return NULL; } diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 618fefd..278351e 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -48,10 +48,8 @@ static efi_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index f39fa92..8e2c468 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -44,10 +44,8 @@ static pei_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index c6a75bd..00e4110 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -17,10 +17,10 @@ * Foundation, Inc. */ +#include <assets.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> -#include <program_loading.h> #include <rmodule.h> #include <rules.h> #include <string.h> @@ -79,7 +79,7 @@ static void init_vb2_working_data(void) wd->buffer_size = work_size - wd->buffer_offset; } -static int vboot_loader_active(struct prog *prog) +static int vboot_active(struct asset *asset) { struct vb2_working_data *wd; int run_verification; @@ -90,15 +90,15 @@ static int vboot_loader_active(struct prog *prog) init_vb2_working_data(); verstage_main(); } else if (verstage_should_load()) { - struct prog verstage = { - .type = PROG_VERSTAGE, - .name = CONFIG_CBFS_PREFIX "/verstage", - }; + struct prog verstage = + PROG_INIT(ASSET_VERSTAGE, + CONFIG_CBFS_PREFIX "/verstage"); printk(BIOS_DEBUG, "VBOOT: Loading verstage.\n"); /* load verstage from RO */ - if (cbfs_boot_locate(&verstage.rdev, verstage.name, NULL) || + if (cbfs_boot_locate(prog_rdev(&verstage), + prog_name(&verstage), NULL) || cbfs_prog_stage_load(&verstage)) die("failed to load verstage"); @@ -126,22 +126,22 @@ static int vboot_loader_active(struct prog *prog) } static int vboot_locate_by_components(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct vboot_components *fw_info; size_t metadata_sz; size_t offset; size_t size; - struct region_device *fw = &prog->rdev; + struct region_device *fw = asset_rdev(asset); int fw_index = 0; - if (prog->type == PROG_ROMSTAGE) + if (asset_type(asset) == ASSET_ROMSTAGE) fw_index = CONFIG_VBOOT_ROMSTAGE_INDEX; - else if (prog->type == PROG_RAMSTAGE) + else if (asset_type(asset) == ASSET_RAMSTAGE) fw_index = CONFIG_VBOOT_RAMSTAGE_INDEX; - else if (prog->type == PROG_PAYLOAD) + else if (asset_type(asset) == ASSET_PAYLOAD) fw_index = CONFIG_VBOOT_BOOT_LOADER_INDEX; - else if (prog->type == PROG_REFCODE) + else if (asset_type(asset) == ASSET_REFCODE) fw_index = CONFIG_VBOOT_REFCODE_INDEX; else die("Invalid program type for vboot."); @@ -175,7 +175,7 @@ static int vboot_locate_by_components(const struct region_device *fw_main, } static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct cbfsd cbfs; struct region_device rdev; @@ -190,21 +190,21 @@ static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, cbfs.rdev = &rdev; cbfs.align = props.align; - return cbfs_locate(&prog->rdev, &cbfs, prog->name, NULL); + return cbfs_locate(asset_rdev(asset), &cbfs, asset_name(asset), NULL); } -static int vboot_prog_locate(const struct region_device *fw_main, - struct prog *prog) +static int vboot_asset_locate(const struct region_device *fw_main, + struct asset *asset) { if (IS_ENABLED(CONFIG_MULTIPLE_CBFS_INSTANCES)) - return vboot_locate_by_multi_cbfs(fw_main, prog); + return vboot_locate_by_multi_cbfs(fw_main, asset); else - return vboot_locate_by_components(fw_main, prog); + return vboot_locate_by_components(fw_main, asset); } -/* This function is only called when vboot_loader_active() returns 1. That +/* This function is only called when vboot_active() returns 1. That * means we are taking vboot paths. */ -static int vboot_locate(struct prog *prog) +static int vboot_locate(struct asset *asset) { struct vb2_working_data *wd; struct region_device fw_main; @@ -219,11 +219,11 @@ static int vboot_locate(struct prog *prog) if (vb2_get_selected_region(wd, &fw_main)) die("failed to reference selected region\n"); - return vboot_prog_locate(&fw_main, prog); + return vboot_asset_locate(&fw_main, asset); } -const struct prog_loader_ops vboot_loader = { +const struct asset_provider vboot_provider = { .name = "VBOOT", - .is_loader_active = vboot_loader_active, + .is_active = vboot_active, .locate = vboot_locate, };

1 0

Patch set updated for coreboot: 44476e7 asssets: abstract away the firmware assets used for booting
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10264 -gerrit commit 44476e71e3a2ceaaa9b8c3d45b243f065ea8e715 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed May 20 12:08:55 2015 -0500 asssets: abstract away the firmware assets used for booting As there can be more than one source of firmware assets this patch generalizes the notion of locating a particular asset. struct asset is added along with some helper functions for working on assets as a first class citizen. Change-Id: I2ce575d1e5259aed4c34c3dcfd438abe9db1d7b9 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm64/boot.c | 2 +- src/arch/x86/boot/boot.c | 2 +- src/include/assets.h | 90 +++++++++++++++++++++ src/include/program_loading.h | 54 ++++++++----- src/lib/Makefile.inc | 4 + src/lib/assets.c | 93 ++++++++++++++++++++++ src/lib/cbfs.c | 8 +- src/lib/prog_loaders.c | 90 ++------------------- src/lib/rmodule.c | 6 +- src/lib/selfboot.c | 9 ++- src/soc/intel/baytrail/refcode.c | 6 +- src/soc/intel/broadwell/refcode.c | 6 +- .../google/chromeos/vboot2/vboot_loader.c | 48 +++++------ 13 files changed, 269 insertions(+), 149 deletions(-) diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 226d8d7..03ad053 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -73,7 +73,7 @@ void arch_prog_run(struct prog *prog) void (*doit)(void *); void *arg; - if (ENV_RAMSTAGE && prog->type == PROG_PAYLOAD) { + if (ENV_RAMSTAGE && prog_type(prog) == ASSET_PAYLOAD) { run_payload(prog); return; } diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 0ff8a6c..d86a6c3 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -125,7 +125,7 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) static void try_payload(struct prog *prog) { - if (prog->type == PROG_PAYLOAD) { + if (prog_type(prog) == ASSET_PAYLOAD) { if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) jmp_payload_no_bounce_buffer(prog_entry(prog)); else diff --git a/src/include/assets.h b/src/include/assets.h new file mode 100644 index 0000000..efd63b5 --- /dev/null +++ b/src/include/assets.h @@ -0,0 +1,90 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#ifndef ASSETS_H +#define ASSETS_H + +#include <region.h> + +/* An asset represnts data used to boot the system. It can be found within + * CBFS or some other mechanism. While CBFS can be a source of an asset not + * that using the asset API implies querying of other sources. */ + +enum asset_type { + ASSET_UNKNOWN, + ASSET_VERSTAGE, + ASSET_ROMSTAGE, + ASSET_RAMSTAGE, + ASSET_REFCODE, + ASSET_PAYLOAD, +}; + +struct asset { + enum asset_type type; + const char *name; + struct region_device rdev; +}; + +static inline const char *asset_name(const struct asset *asset) +{ + return asset->name; +} + +static inline enum asset_type asset_type(const struct asset *asset) +{ + return asset->type; +} + +static struct region_device *asset_rdev(struct asset *asset) +{ + return &asset->rdev; +} + +static inline size_t asset_size(const struct asset *asset) +{ + return region_device_sz(&asset->rdev); +} + +/* Returns NULL on error. */ +static inline void *asset_mmap(const struct asset *asset) +{ + return rdev_mmap_full(&asset->rdev); +} + +#define ASSET_INIT(type_, name_) \ + { \ + .type = (type_), \ + .name = (name_), \ + } + +/* Locate the asset as described by the parameter. It will query all known + * asset providers. Returns 0 on succes. < 0 on error. */ +int asset_locate(struct asset *asset); + +struct asset_provider { + const char *name; + /* Determine if the provider is the active one. If so returns 1 else 0 + * or < 0 on error. */ + int (*is_active)(struct asset *asset); + /* Returns < 0 on error or 0 on success. This function locates + * the rdev representing the file data associated with the passed in + * prog. */ + int (*locate)(struct asset *asset); +}; + +#endif /* ASSETS_H */ diff --git a/src/include/program_loading.h b/src/include/program_loading.h index d8e7de3..49a36fa 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -22,7 +22,7 @@ #include <stdint.h> #include <stddef.h> -#include <region.h> +#include <assets.h> enum { /* Last segment of program. Can be used to take different actions for @@ -34,39 +34,49 @@ enum { * set on the last segment loaded. */ void arch_segment_loaded(uintptr_t start, size_t size, int flags); -enum prog_type { - PROG_VERSTAGE, - PROG_ROMSTAGE, - PROG_RAMSTAGE, - PROG_REFCODE, - PROG_PAYLOAD, -}; - /* Representation of a program. */ struct prog { - enum prog_type type; - const char *name; - /* Source of program content to load. After loading program it - * represents the memory region of the stages and payload. For - * achitectures that use a bounce buffer then it would represent - * the bounce buffer. */ - struct region_device rdev; + /* The region_device within the asset is the source of program content + * to load. After loading program it represents the memory region of + * the stages and payload. For achitectures that use a bounce buffer + * then it would represent the bounce buffer. */ + struct asset asset; /* Entry to program with optional argument. It's up to the architecture * to decide if argument is passed. */ void (*entry)(void *); void *arg; }; +#define PROG_INIT(type_, name_) \ + { \ + .asset = ASSET_INIT(type_, name_), \ + } + +static inline const char *prog_name(const struct prog *prog) +{ + return asset_name(&prog->asset); +} + +static inline enum asset_type prog_type(const struct prog *prog) +{ + return asset_type(&prog->asset); +} + +static inline struct region_device *prog_rdev(struct prog *prog) +{ + return asset_rdev(&prog->asset); +} + /* Only valid for loaded programs. */ static inline size_t prog_size(const struct prog *prog) { - return region_device_sz(&prog->rdev); + return asset_size(&prog->asset); } /* Only valid for loaded programs. */ static inline void *prog_start(const struct prog *prog) { - return rdev_mmap_full(&prog->rdev); + return asset_mmap(&prog->asset); } static inline void *prog_entry(const struct prog *prog) @@ -85,7 +95,7 @@ extern const struct mem_region_device addrspace_32bit; static inline void prog_memory_init(struct prog *prog, uintptr_t ptr, size_t size) { - rdev_chain(&prog->rdev, &addrspace_32bit.rdev, ptr, size); + rdev_chain(&prog->asset.rdev, &addrspace_32bit.rdev, ptr, size); } static inline void prog_set_area(struct prog *prog, void *start, size_t size) @@ -100,7 +110,11 @@ static inline void prog_set_entry(struct prog *prog, void *e, void *arg) } /* Locate the identified program to run. Return 0 on success. < 0 on error. */ -int prog_locate(struct prog *prog); +static inline int prog_locate(struct prog *prog) +{ + return asset_locate(&prog->asset); +} + /* Run the program described by prog. */ void prog_run(struct prog *prog); /* Per architecture implementation running a program. */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 4a0301e..a5d227b 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -18,6 +18,7 @@ # subdirs-y += loaders +bootblock-y += assets.c bootblock-y += prog_loaders.c bootblock-y += prog_ops.c bootblock-y += cbfs.c @@ -36,6 +37,7 @@ bootblock-y += region.c bootblock-y += boot_device.c bootblock-y += fmap.c +verstage-y += assets.c verstage-y += prog_loaders.c verstage-y += prog_ops.c verstage-y += delay.c @@ -60,6 +62,7 @@ verstage-$(CONFIG_GENERIC_UDELAY) += timer.c verstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c verstage-y += mem_pool.c +romstage-y += assets.c romstage-y += prog_loaders.c romstage-y += prog_ops.c romstage-y += memchr.c @@ -92,6 +95,7 @@ endif romstage-$(CONFIG_GENERIC_UDELAY) += timer.c +ramstage-y += assets.c ramstage-y += prog_loaders.c ramstage-y += prog_ops.c ramstage-y += hardwaremain.c diff --git a/src/lib/assets.c b/src/lib/assets.c new file mode 100644 index 0000000..4681e35 --- /dev/null +++ b/src/lib/assets.c @@ -0,0 +1,93 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + + +#include <assets.h> +#include <boot_device.h> +#include <cbfs.h> +#include <console/console.h> +#include <rules.h> +#include <stdlib.h> + +#define DEFAULT_CBFS_PROVIDER_PRESENT \ + (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) + +#if DEFAULT_CBFS_PROVIDER_PRESENT +static int cbfs_boot_asset_locate(struct asset *asset) +{ + return cbfs_boot_locate(&asset->rdev, asset->name, NULL); +} + +static const struct asset_provider cbfs_default_provider = { + .locate = cbfs_boot_asset_locate, +}; +#endif + +extern const struct asset_provider vboot_provider; + +static const struct asset_provider *providers[] = { +#if CONFIG_VBOOT_VERIFY_FIRMWARE + &vboot_provider, +#endif +#if DEFAULT_CBFS_PROVIDER_PRESENT + &cbfs_default_provider, +#endif +}; + +int asset_locate(struct asset *asset) +{ + int i; + + boot_device_init(); + + for (i = 0; i < ARRAY_SIZE(providers); i++) { + /* Default provider state is active. */ + int ret = 1; + const struct asset_provider *ops; + + ops = providers[i]; + + if (ops->is_active != NULL) + ret = ops->is_active(asset); + + if (ret == 0) { + printk(BIOS_DEBUG, "%s provider inactive.\n", + ops->name); + continue; + } else if (ret < 0) { + printk(BIOS_DEBUG, "%s provider failure.\n", + ops->name); + continue; + } + + printk(BIOS_DEBUG, "%s provider active.\n", ops->name); + + if (ops->locate(asset)) + continue; + + printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", + asset->name, region_device_offset(&asset->rdev), + region_device_sz(&asset->rdev)); + + return 0; + } + + return -1; +} + diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 23dfee7..3e83765 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -188,12 +188,10 @@ void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device) void *cbfs_boot_load_stage_by_name(const char *name) { - struct prog stage = { - .name = name, - }; + struct prog stage = PROG_INIT(ASSET_UNKNOWN, name); uint32_t type = CBFS_TYPE_STAGE; - if (cbfs_boot_locate(&stage.rdev, name, &type)) + if (cbfs_boot_locate(&stage.asset.rdev, name, &type)) return NULL; if (cbfs_prog_stage_load(&stage)) @@ -209,7 +207,7 @@ int cbfs_prog_stage_load(struct prog *pstage) void *entry; size_t fsize; size_t foffset; - const struct region_device *fh = &pstage->rdev; + const struct region_device *fh = &pstage->asset.rdev; if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return 0; diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 7799994..ec5eeb8 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -20,7 +20,6 @@ #include <stdlib.h> #include <arch/stages.h> -#include <boot_device.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -38,83 +37,10 @@ /* Only can represent up to 1 byte less than size_t. */ const struct mem_region_device addrspace_32bit = MEM_REGION_DEV_INIT(0, ~0UL); -#define DEFAULT_CBFS_LOADER_PRESENT \ - (!ENV_VERSTAGE || (ENV_VERSTAGE && !CONFIG_RETURN_FROM_VERSTAGE)) - -#if DEFAULT_CBFS_LOADER_PRESENT -static int cbfs_boot_prog_locate(struct prog *prog) -{ - return cbfs_boot_locate(&prog->rdev, prog->name, NULL); -} - -static const struct prog_loader_ops cbfs_default_loader = { - .locate = cbfs_boot_prog_locate, -}; -#endif - -extern const struct prog_loader_ops vboot_loader; - -static const struct prog_loader_ops *loaders[] = { -#if CONFIG_VBOOT_VERIFY_FIRMWARE - &vboot_loader, -#endif -#if DEFAULT_CBFS_LOADER_PRESENT - &cbfs_default_loader, -#endif -}; - -int prog_locate(struct prog *prog) -{ - int i; - - boot_device_init(); - - for (i = 0; i < ARRAY_SIZE(loaders); i++) { - /* Default loader state is active. */ - int ret = 1; - const struct prog_loader_ops *ops; - - ops = loaders[i]; - - if (ops->is_loader_active != NULL) - ret = ops->is_loader_active(prog); - - if (ret == 0) { - printk(BIOS_DEBUG, "%s loader inactive.\n", - ops->name); - continue; - } else if (ret < 0) { - printk(BIOS_DEBUG, "%s loader failure.\n", - ops->name); - continue; - } - - printk(BIOS_DEBUG, "%s loader active.\n", ops->name); - - if (ops->locate(prog)) - continue; - - printk(BIOS_DEBUG, "'%s' located at offset: %zx size: %zx\n", - prog->name, region_device_offset(&prog->rdev), - region_device_sz(&prog->rdev)); - - return 0; - } - - return -1; -} - void run_romstage(void) { - struct prog romstage = { - .name = CONFIG_CBFS_PREFIX "/romstage", - .type = PROG_ROMSTAGE, - }; - - /* The only time the default CBFS loader isn't present is during - * VERSTAGE in which it returns back to the calling stage. */ - if (!DEFAULT_CBFS_LOADER_PRESENT) - return; + struct prog romstage = + PROG_INIT(ASSET_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); if (prog_locate(&romstage)) goto fail; @@ -166,10 +92,8 @@ static int load_relocatable_ramstage(struct prog *ramstage) void run_ramstage(void) { - struct prog ramstage = { - .name = CONFIG_CBFS_PREFIX "/ramstage", - .type = PROG_RAMSTAGE, - }; + struct prog ramstage = + PROG_INIT(ASSET_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); /* Only x86 systems currently take the same firmware path on resume. */ if (IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) @@ -197,10 +121,8 @@ fail: die("Ramstage was not loaded!\n"); } -static struct prog global_payload = { - .name = CONFIG_CBFS_PREFIX "/payload", - .type = PROG_PAYLOAD, -}; +static struct prog global_payload = + PROG_INIT(ASSET_PAYLOAD, CONFIG_CBFS_PREFIX "/payload"); void __attribute__((weak)) mirror_payload(struct prog *payload) { diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index e986590..ed7978a 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -264,10 +264,10 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) void *rmod_loc; struct region_device *fh; - if (rsl->prog == NULL || rsl->prog->name == NULL) + if (rsl->prog == NULL || prog_name(rsl->prog) == NULL) return -1; - fh = &rsl->prog->rdev; + fh = prog_rdev(rsl->prog); if (rdev_readat(fh, &stage, 0, sizeof(stage)) != sizeof(stage)) return -1; @@ -284,7 +284,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl) rmod_loc = &stage_region[rmodule_offset]; printk(BIOS_INFO, "Decompressing stage %s @ 0x%p (%d bytes)\n", - rsl->prog->name, rmod_loc, stage.memlen); + prog_name(rsl->prog), rmod_loc, stage.memlen); if (stage.compression == CBFS_COMPRESS_NONE) { if (rdev_readat(fh, rmod_loc, sizeof(stage), stage.len) != diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index abe1df5..f8a3918 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -454,7 +454,7 @@ void *selfload(struct prog *payload) struct segment head; void *data; - data = rdev_mmap_full(&payload->rdev); + data = rdev_mmap_full(prog_rdev(payload)); if (data == NULL) return NULL; @@ -469,7 +469,10 @@ void *selfload(struct prog *payload) printk(BIOS_SPEW, "Loaded segments\n"); - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); + + /* Update the payload's area with the bounce buffer information. */ + prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); /* Update the payload's area with the bounce buffer information. */ prog_set_area(payload, (void *)(uintptr_t)bounce_buffer, bounce_size); @@ -477,6 +480,6 @@ void *selfload(struct prog *payload) return (void *)entry; out: - rdev_munmap(&payload->rdev, data); + rdev_munmap(prog_rdev(payload), data); return NULL; } diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 618fefd..278351e 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -48,10 +48,8 @@ static efi_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index f39fa92..8e2c468 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -44,10 +44,8 @@ static pei_wrapper_entry_t load_refcode_from_cache(void) static efi_wrapper_entry_t load_reference_code(void) { - struct prog prog = { - .type = PROG_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", - }; + struct prog prog = + PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index c6a75bd..00e4110 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -17,10 +17,10 @@ * Foundation, Inc. */ +#include <assets.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> -#include <program_loading.h> #include <rmodule.h> #include <rules.h> #include <string.h> @@ -79,7 +79,7 @@ static void init_vb2_working_data(void) wd->buffer_size = work_size - wd->buffer_offset; } -static int vboot_loader_active(struct prog *prog) +static int vboot_active(struct asset *asset) { struct vb2_working_data *wd; int run_verification; @@ -90,15 +90,15 @@ static int vboot_loader_active(struct prog *prog) init_vb2_working_data(); verstage_main(); } else if (verstage_should_load()) { - struct prog verstage = { - .type = PROG_VERSTAGE, - .name = CONFIG_CBFS_PREFIX "/verstage", - }; + struct prog verstage = + PROG_INIT(ASSET_VERSTAGE, + CONFIG_CBFS_PREFIX "/verstage"); printk(BIOS_DEBUG, "VBOOT: Loading verstage.\n"); /* load verstage from RO */ - if (cbfs_boot_locate(&verstage.rdev, verstage.name, NULL) || + if (cbfs_boot_locate(prog_rdev(&verstage), + prog_name(&verstage), NULL) || cbfs_prog_stage_load(&verstage)) die("failed to load verstage"); @@ -126,22 +126,22 @@ static int vboot_loader_active(struct prog *prog) } static int vboot_locate_by_components(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct vboot_components *fw_info; size_t metadata_sz; size_t offset; size_t size; - struct region_device *fw = &prog->rdev; + struct region_device *fw = asset_rdev(asset); int fw_index = 0; - if (prog->type == PROG_ROMSTAGE) + if (asset_type(asset) == ASSET_ROMSTAGE) fw_index = CONFIG_VBOOT_ROMSTAGE_INDEX; - else if (prog->type == PROG_RAMSTAGE) + else if (asset_type(asset) == ASSET_RAMSTAGE) fw_index = CONFIG_VBOOT_RAMSTAGE_INDEX; - else if (prog->type == PROG_PAYLOAD) + else if (asset_type(asset) == ASSET_PAYLOAD) fw_index = CONFIG_VBOOT_BOOT_LOADER_INDEX; - else if (prog->type == PROG_REFCODE) + else if (asset_type(asset) == ASSET_REFCODE) fw_index = CONFIG_VBOOT_REFCODE_INDEX; else die("Invalid program type for vboot."); @@ -175,7 +175,7 @@ static int vboot_locate_by_components(const struct region_device *fw_main, } static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, - struct prog *prog) + struct asset *asset) { struct cbfsd cbfs; struct region_device rdev; @@ -190,21 +190,21 @@ static int vboot_locate_by_multi_cbfs(const struct region_device *fw_main, cbfs.rdev = &rdev; cbfs.align = props.align; - return cbfs_locate(&prog->rdev, &cbfs, prog->name, NULL); + return cbfs_locate(asset_rdev(asset), &cbfs, asset_name(asset), NULL); } -static int vboot_prog_locate(const struct region_device *fw_main, - struct prog *prog) +static int vboot_asset_locate(const struct region_device *fw_main, + struct asset *asset) { if (IS_ENABLED(CONFIG_MULTIPLE_CBFS_INSTANCES)) - return vboot_locate_by_multi_cbfs(fw_main, prog); + return vboot_locate_by_multi_cbfs(fw_main, asset); else - return vboot_locate_by_components(fw_main, prog); + return vboot_locate_by_components(fw_main, asset); } -/* This function is only called when vboot_loader_active() returns 1. That +/* This function is only called when vboot_active() returns 1. That * means we are taking vboot paths. */ -static int vboot_locate(struct prog *prog) +static int vboot_locate(struct asset *asset) { struct vb2_working_data *wd; struct region_device fw_main; @@ -219,11 +219,11 @@ static int vboot_locate(struct prog *prog) if (vb2_get_selected_region(wd, &fw_main)) die("failed to reference selected region\n"); - return vboot_prog_locate(&fw_main, prog); + return vboot_asset_locate(&fw_main, asset); } -const struct prog_loader_ops vboot_loader = { +const struct asset_provider vboot_provider = { .name = "VBOOT", - .is_loader_active = vboot_loader_active, + .is_active = vboot_active, .locate = vboot_locate, };

1 0

Patch set updated for coreboot: 7e8e74d baytrail: Switch to per-device ACPI
by Vladimir Serbinenko 20 May '15

20 May '15

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7037 -gerrit commit 7e8e74d07e8c1667786553430718f4eaf93025cf Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Oct 8 22:56:27 2014 +0200 baytrail: Switch to per-device ACPI Change-Id: I6a1b1daa291298c85e14f89aa47a0693837cec6f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/google/rambi/acpi_tables.c | 159 +---------------- src/mainboard/intel/bayleybay_fsp/acpi_tables.c | 187 +------------------- src/mainboard/intel/minnowmax/acpi_tables.c | 223 +----------------------- src/mainboard/lenovo/t420s/acpi_tables.c | 12 -- src/mainboard/lenovo/t430s/acpi_tables.c | 12 -- src/mainboard/siemens/mc_tcu3/acpi_tables.c | 187 +------------------- src/soc/intel/baytrail/Kconfig | 1 + src/soc/intel/baytrail/acpi.c | 53 +++--- src/soc/intel/baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/baytrail/include/soc/nvs.h | 1 + src/soc/intel/baytrail/northcluster.c | 2 + src/soc/intel/baytrail/southcluster.c | 30 ++++ src/soc/intel/fsp_baytrail/Kconfig | 1 + src/soc/intel/fsp_baytrail/acpi.c | 93 +++++++--- src/soc/intel/fsp_baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/fsp_baytrail/baytrail/acpi.h | 3 + src/soc/intel/fsp_baytrail/baytrail/nvs.h | 1 + src/soc/intel/fsp_baytrail/northcluster.c | 3 +- src/soc/intel/fsp_baytrail/southcluster.c | 6 + 19 files changed, 148 insertions(+), 832 deletions(-) diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 981116b..6b47a32 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -34,9 +34,7 @@ #include <soc/nvs.h> #include <soc/iomap.h> -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -68,158 +66,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - - printk(BIOS_DEBUG, "ACPI: * DSDT\n"); - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - /* - * We explicitly add these tables later on: - */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET Timers Linux wants an MADT */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ - smm_setup_structures(gnvs, NULL, NULL); - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "current = %lx\n", current); - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c +++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c index 881c143..8e31da2 100644 --- a/src/mainboard/intel/minnowmax/acpi_tables.c +++ b/src/mainboard/intel/minnowmax/acpi_tables.c @@ -36,10 +36,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -62,221 +59,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - -#if IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) - printk(BIOS_DEBUG, "rsdp\n"); - hexdump(BIOS_DEBUG, rsdp, sizeof(acpi_rsdp_t)); - - printk(BIOS_DEBUG, "rsdt\n"); - hexdump(BIOS_DEBUG, rsdt, sizeof(acpi_rsdt_t)); - - printk(BIOS_DEBUG, "hpet\n"); - hexdump(BIOS_DEBUG, hpet, hpet->header.length); - - printk(BIOS_DEBUG, "madt\n"); - hexdump(BIOS_DEBUG, madt, madt->header.length); - - printk(BIOS_DEBUG, "mcfg\n"); - hexdump(BIOS_DEBUG, mcfg, mcfg->header.length); - - printk(BIOS_DEBUG, "dsdt\n"); - hexdump(BIOS_DEBUG, dsdt, dsdt->length); - - if (ssdt != NULL) { - printk(BIOS_DEBUG, "ssdt\n"); - hexdump(BIOS_DEBUG, ssdt, ssdt->length); - } - - if (ssdt2 != NULL) { - printk(BIOS_DEBUG, "ssdt2\n"); - hexdump(BIOS_DEBUG, ssdt2, ssdt2->length); - } - - printk(BIOS_DEBUG, "fadt\n"); - hexdump(BIOS_DEBUG, fadt, fadt->header.length); - - printk(BIOS_DEBUG, "facs\n"); - hexdump(BIOS_DEBUG, facs, facs->length); - -#endif /* IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) */ - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c index 15b9d9a..b8eb335 100644 --- a/src/mainboard/lenovo/t420s/acpi_tables.c +++ b/src/mainboard/lenovo/t420s/acpi_tables.c @@ -64,15 +64,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/lenovo/t430s/acpi_tables.c b/src/mainboard/lenovo/t430s/acpi_tables.c index 407c8f9..1e692cd 100644 --- a/src/mainboard/lenovo/t430s/acpi_tables.c +++ b/src/mainboard/lenovo/t430s/acpi_tables.c @@ -50,15 +50,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c +++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 85631fc..0240830 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select UDELAY_TSC select SOC_INTEL_COMMON + select PER_DEVICE_ACPI_TABLES config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 74e7336..740b39d 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -295,24 +295,20 @@ static acpi_tstate_t baytrail_tss_table[] = { { 13, 125, 0, 0x12, 0 }, }; -static int generate_T_state_entries(int core, int cores_per_package) +static void generate_T_state_entries(int core, int cores_per_package) { - int len; - /* Indicate SW_ALL coordination for T-states */ - len = acpigen_write_TSD_package(core, cores_per_package, SW_ALL); + acpigen_write_TSD_package(core, cores_per_package, SW_ALL); /* Indicate FFixedHW so OS will use MSR */ - len += acpigen_write_empty_PTC(); + acpigen_write_empty_PTC(); /* Set NVS controlled T-state limit */ - len += acpigen_write_TPC("\\TLVL"); + acpigen_write_TPC("\\TLVL"); /* Write TSS table for MSR access */ - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(baytrail_tss_table), baytrail_tss_table); - - return len; } static int calculate_power(int tdp, int p1_ratio, int ratio) @@ -336,9 +332,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -366,16 +361,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -388,14 +383,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -404,14 +399,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -439,7 +434,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -449,15 +444,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -468,23 +460,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index a201c03..946f123 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index 1ba30d5..04df736 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -70,6 +70,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index 97b3bcc..24fb5fb 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -23,6 +23,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <arch/acpi.h> #include <soc/iomap.h> #include <soc/iosf.h> @@ -133,6 +134,7 @@ static void nc_read_resources(device_t dev) static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 8df1f1a..986695f 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -40,6 +40,9 @@ #include <soc/ramstage.h> #include <soc/spi.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> static inline void add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size) @@ -510,9 +513,36 @@ void southcluster_enable_dev(device_t dev) } } +static void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} + + static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = acpi_write_hpet, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 4881d8d..86d5b11 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -49,6 +49,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select ROMSTAGE_RTC_INIT + select PER_DEVICE_ACPI_TABLES config SOC_INTEL_FSP_BAYTRAIL_MD bool diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 11c4493..5d561eb 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -47,6 +47,7 @@ #include <baytrail/msr.h> #include <baytrail/pattrs.h> #include <baytrail/pmc.h> +#include <cpu/cpu.h> #include <cbmem.h> #include "chip.h" @@ -402,9 +403,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -432,16 +432,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -454,14 +454,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -470,14 +470,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -505,7 +505,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -515,15 +515,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -534,23 +531,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } @@ -575,3 +571,56 @@ unsigned long acpi_madt_irq_overrides(unsigned long current) return current; } + +#define ALIGN_CURRENT current = (ALIGN(current, 16)) + +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp) +{ + acpi_header_t *ssdt2; + + current = acpi_write_hpet(current, rsdp); + ALIGN_CURRENT; + + ssdt2 = (acpi_header_t *)current; + memset(ssdt2, 0, sizeof(acpi_header_t)); + acpi_create_serialio_ssdt(ssdt2); + if (ssdt2->length) { + current += ssdt2->length; + acpi_add_table(rsdp, ssdt2); + printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, + ssdt2->length); + ALIGN_CURRENT; + } else { + ssdt2 = NULL; + printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); + } + + printk(BIOS_DEBUG, "current = %lx\n", current); + + return current; +} + +void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} diff --git a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl index 696390d..d2dc021 100644 --- a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/baytrail/acpi.h index aaba61a..ea23974 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h +++ b/src/soc/intel/fsp_baytrail/baytrail/acpi.h @@ -29,5 +29,8 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp); +void southcluster_inject_dsdt(void); #endif /* _BAYTRAIL_ACPI_H_ */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/nvs.h b/src/soc/intel/fsp_baytrail/baytrail/nvs.h index 242f6d3..11ad72e 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/nvs.h +++ b/src/soc/intel/fsp_baytrail/baytrail/nvs.h @@ -68,6 +68,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c index 2238a8a..460d4be 100644 --- a/src/soc/intel/fsp_baytrail/northcluster.c +++ b/src/soc/intel/fsp_baytrail/northcluster.c @@ -32,7 +32,7 @@ #include <cbmem.h> #include <baytrail/baytrail.h> #include <drivers/intel/fsp1_0/fsp_util.h> - +#include <arch/acpi.h> static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; @@ -201,6 +201,7 @@ static void nc_enable(device_t dev) static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c index d515286..a64d00f 100644 --- a/src/soc/intel/fsp_baytrail/southcluster.c +++ b/src/soc/intel/fsp_baytrail/southcluster.c @@ -39,10 +39,14 @@ #include <baytrail/irq.h> #include <baytrail/lpc.h> #include <baytrail/nvs.h> +#include <baytrail/acpi.h> #include <baytrail/pci_devs.h> #include <baytrail/pmc.h> #include <baytrail/ramstage.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> #define ENABLE_ACPI_MODE_IN_COREBOOT 0 #define TEST_SMM_FLASH_LOCKDOWN 0 @@ -598,6 +602,8 @@ void southcluster_enable_dev(device_t dev) static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = southcluster_write_acpi_tables, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev,

1 0

Patch set updated for coreboot: b90a8cd baytrail: Switch to per-device ACPI
by Vladimir Serbinenko 20 May '15

20 May '15

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7037 -gerrit commit b90a8cd6fc35856c21eace422f9771beae119d72 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Oct 8 22:56:27 2014 +0200 baytrail: Switch to per-device ACPI Change-Id: I6a1b1daa291298c85e14f89aa47a0693837cec6f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/google/rambi/acpi_tables.c | 159 +---------------- src/mainboard/intel/bayleybay_fsp/acpi_tables.c | 187 +------------------- src/mainboard/intel/minnowmax/acpi_tables.c | 223 +----------------------- src/mainboard/lenovo/t420s/acpi_tables.c | 12 -- src/mainboard/lenovo/t430s/acpi_tables.c | 12 -- src/mainboard/siemens/mc_tcu3/acpi_tables.c | 187 +------------------- src/soc/intel/baytrail/Kconfig | 1 + src/soc/intel/baytrail/acpi.c | 53 +++--- src/soc/intel/baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/baytrail/include/soc/nvs.h | 1 + src/soc/intel/baytrail/northcluster.c | 14 ++ src/soc/intel/baytrail/southcluster.c | 30 ++++ src/soc/intel/fsp_baytrail/Kconfig | 1 + src/soc/intel/fsp_baytrail/acpi.c | 93 +++++++--- src/soc/intel/fsp_baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/fsp_baytrail/baytrail/acpi.h | 3 + src/soc/intel/fsp_baytrail/baytrail/nvs.h | 1 + src/soc/intel/fsp_baytrail/northcluster.c | 15 +- src/soc/intel/fsp_baytrail/southcluster.c | 6 + 19 files changed, 172 insertions(+), 832 deletions(-) diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 981116b..6b47a32 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -34,9 +34,7 @@ #include <soc/nvs.h> #include <soc/iomap.h> -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -68,158 +66,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - - printk(BIOS_DEBUG, "ACPI: * DSDT\n"); - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - /* - * We explicitly add these tables later on: - */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET Timers Linux wants an MADT */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ - smm_setup_structures(gnvs, NULL, NULL); - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "current = %lx\n", current); - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c +++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c index 881c143..8e31da2 100644 --- a/src/mainboard/intel/minnowmax/acpi_tables.c +++ b/src/mainboard/intel/minnowmax/acpi_tables.c @@ -36,10 +36,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -62,221 +59,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - -#if IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) - printk(BIOS_DEBUG, "rsdp\n"); - hexdump(BIOS_DEBUG, rsdp, sizeof(acpi_rsdp_t)); - - printk(BIOS_DEBUG, "rsdt\n"); - hexdump(BIOS_DEBUG, rsdt, sizeof(acpi_rsdt_t)); - - printk(BIOS_DEBUG, "hpet\n"); - hexdump(BIOS_DEBUG, hpet, hpet->header.length); - - printk(BIOS_DEBUG, "madt\n"); - hexdump(BIOS_DEBUG, madt, madt->header.length); - - printk(BIOS_DEBUG, "mcfg\n"); - hexdump(BIOS_DEBUG, mcfg, mcfg->header.length); - - printk(BIOS_DEBUG, "dsdt\n"); - hexdump(BIOS_DEBUG, dsdt, dsdt->length); - - if (ssdt != NULL) { - printk(BIOS_DEBUG, "ssdt\n"); - hexdump(BIOS_DEBUG, ssdt, ssdt->length); - } - - if (ssdt2 != NULL) { - printk(BIOS_DEBUG, "ssdt2\n"); - hexdump(BIOS_DEBUG, ssdt2, ssdt2->length); - } - - printk(BIOS_DEBUG, "fadt\n"); - hexdump(BIOS_DEBUG, fadt, fadt->header.length); - - printk(BIOS_DEBUG, "facs\n"); - hexdump(BIOS_DEBUG, facs, facs->length); - -#endif /* IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) */ - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c index 15b9d9a..b8eb335 100644 --- a/src/mainboard/lenovo/t420s/acpi_tables.c +++ b/src/mainboard/lenovo/t420s/acpi_tables.c @@ -64,15 +64,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/lenovo/t430s/acpi_tables.c b/src/mainboard/lenovo/t430s/acpi_tables.c index 407c8f9..1e692cd 100644 --- a/src/mainboard/lenovo/t430s/acpi_tables.c +++ b/src/mainboard/lenovo/t430s/acpi_tables.c @@ -50,15 +50,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c +++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 85631fc..0240830 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select UDELAY_TSC select SOC_INTEL_COMMON + select PER_DEVICE_ACPI_TABLES config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 74e7336..740b39d 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -295,24 +295,20 @@ static acpi_tstate_t baytrail_tss_table[] = { { 13, 125, 0, 0x12, 0 }, }; -static int generate_T_state_entries(int core, int cores_per_package) +static void generate_T_state_entries(int core, int cores_per_package) { - int len; - /* Indicate SW_ALL coordination for T-states */ - len = acpigen_write_TSD_package(core, cores_per_package, SW_ALL); + acpigen_write_TSD_package(core, cores_per_package, SW_ALL); /* Indicate FFixedHW so OS will use MSR */ - len += acpigen_write_empty_PTC(); + acpigen_write_empty_PTC(); /* Set NVS controlled T-state limit */ - len += acpigen_write_TPC("\\TLVL"); + acpigen_write_TPC("\\TLVL"); /* Write TSS table for MSR access */ - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(baytrail_tss_table), baytrail_tss_table); - - return len; } static int calculate_power(int tdp, int p1_ratio, int ratio) @@ -336,9 +332,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -366,16 +361,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -388,14 +383,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -404,14 +399,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -439,7 +434,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -449,15 +444,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -468,23 +460,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index a201c03..946f123 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index 1ba30d5..04df736 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -70,6 +70,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index 97b3bcc..acfa983 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -23,6 +23,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <arch/acpi.h> #include <soc/iomap.h> #include <soc/iosf.h> @@ -131,8 +132,21 @@ static void nc_read_resources(device_t dev) chromeos_reserve_ram_oops(dev, index++); } +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 8df1f1a..986695f 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -40,6 +40,9 @@ #include <soc/ramstage.h> #include <soc/spi.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> static inline void add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size) @@ -510,9 +513,36 @@ void southcluster_enable_dev(device_t dev) } } +static void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} + + static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = acpi_write_hpet, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 4881d8d..86d5b11 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -49,6 +49,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select ROMSTAGE_RTC_INIT + select PER_DEVICE_ACPI_TABLES config SOC_INTEL_FSP_BAYTRAIL_MD bool diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 11c4493..5d561eb 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -47,6 +47,7 @@ #include <baytrail/msr.h> #include <baytrail/pattrs.h> #include <baytrail/pmc.h> +#include <cpu/cpu.h> #include <cbmem.h> #include "chip.h" @@ -402,9 +403,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -432,16 +432,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -454,14 +454,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -470,14 +470,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -505,7 +505,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -515,15 +515,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -534,23 +531,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } @@ -575,3 +571,56 @@ unsigned long acpi_madt_irq_overrides(unsigned long current) return current; } + +#define ALIGN_CURRENT current = (ALIGN(current, 16)) + +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp) +{ + acpi_header_t *ssdt2; + + current = acpi_write_hpet(current, rsdp); + ALIGN_CURRENT; + + ssdt2 = (acpi_header_t *)current; + memset(ssdt2, 0, sizeof(acpi_header_t)); + acpi_create_serialio_ssdt(ssdt2); + if (ssdt2->length) { + current += ssdt2->length; + acpi_add_table(rsdp, ssdt2); + printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, + ssdt2->length); + ALIGN_CURRENT; + } else { + ssdt2 = NULL; + printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); + } + + printk(BIOS_DEBUG, "current = %lx\n", current); + + return current; +} + +void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} diff --git a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl index 696390d..d2dc021 100644 --- a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/baytrail/acpi.h index aaba61a..ea23974 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h +++ b/src/soc/intel/fsp_baytrail/baytrail/acpi.h @@ -29,5 +29,8 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp); +void southcluster_inject_dsdt(void); #endif /* _BAYTRAIL_ACPI_H_ */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/nvs.h b/src/soc/intel/fsp_baytrail/baytrail/nvs.h index 242f6d3..11ad72e 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/nvs.h +++ b/src/soc/intel/fsp_baytrail/baytrail/nvs.h @@ -68,6 +68,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c index 2238a8a..ca8873a 100644 --- a/src/soc/intel/fsp_baytrail/northcluster.c +++ b/src/soc/intel/fsp_baytrail/northcluster.c @@ -32,7 +32,7 @@ #include <cbmem.h> #include <baytrail/baytrail.h> #include <drivers/intel/fsp1_0/fsp_util.h> - +#include <arch/acpi.h> static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; @@ -199,8 +199,21 @@ static void nc_enable(device_t dev) print_fsp_info(); } +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c index d515286..a64d00f 100644 --- a/src/soc/intel/fsp_baytrail/southcluster.c +++ b/src/soc/intel/fsp_baytrail/southcluster.c @@ -39,10 +39,14 @@ #include <baytrail/irq.h> #include <baytrail/lpc.h> #include <baytrail/nvs.h> +#include <baytrail/acpi.h> #include <baytrail/pci_devs.h> #include <baytrail/pmc.h> #include <baytrail/ramstage.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> #define ENABLE_ACPI_MODE_IN_COREBOOT 0 #define TEST_SMM_FLASH_LOCKDOWN 0 @@ -598,6 +602,8 @@ void southcluster_enable_dev(device_t dev) static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = southcluster_write_acpi_tables, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev,

1 0

Patch set updated for coreboot: 73b2c32 baytrail: Switch to per-device ACPI
by Vladimir Serbinenko 20 May '15

20 May '15

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7037 -gerrit commit 73b2c3262f472d1f0854610af11c59521860e536 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Oct 8 22:56:27 2014 +0200 baytrail: Switch to per-device ACPI Change-Id: I6a1b1daa291298c85e14f89aa47a0693837cec6f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/google/rambi/acpi_tables.c | 159 +---------------- src/mainboard/intel/bayleybay_fsp/acpi_tables.c | 187 +------------------- src/mainboard/intel/minnowmax/acpi_tables.c | 223 +----------------------- src/mainboard/lenovo/t420s/acpi_tables.c | 12 -- src/mainboard/lenovo/t430s/acpi_tables.c | 12 -- src/mainboard/siemens/mc_tcu3/acpi_tables.c | 187 +------------------- src/soc/intel/baytrail/Kconfig | 1 + src/soc/intel/baytrail/acpi.c | 53 +++--- src/soc/intel/baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/baytrail/include/soc/nvs.h | 1 + src/soc/intel/baytrail/northcluster.c | 14 ++ src/soc/intel/baytrail/southcluster.c | 31 ++++ src/soc/intel/fsp_baytrail/Kconfig | 1 + src/soc/intel/fsp_baytrail/acpi.c | 94 +++++++--- src/soc/intel/fsp_baytrail/acpi/globalnvs.asl | 3 +- src/soc/intel/fsp_baytrail/baytrail/acpi.h | 3 + src/soc/intel/fsp_baytrail/baytrail/nvs.h | 1 + src/soc/intel/fsp_baytrail/northcluster.c | 15 +- src/soc/intel/fsp_baytrail/southcluster.c | 6 + 19 files changed, 174 insertions(+), 832 deletions(-) diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 981116b..6b47a32 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -34,9 +34,7 @@ #include <soc/nvs.h> #include <soc/iomap.h> -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -68,158 +66,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - - printk(BIOS_DEBUG, "ACPI: * DSDT\n"); - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - /* - * We explicitly add these tables later on: - */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET Timers Linux wants an MADT */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ - smm_setup_structures(gnvs, NULL, NULL); - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "current = %lx\n", current); - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c +++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c index 881c143..8e31da2 100644 --- a/src/mainboard/intel/minnowmax/acpi_tables.c +++ b/src/mainboard/intel/minnowmax/acpi_tables.c @@ -36,10 +36,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -62,221 +59,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - -#if IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) - printk(BIOS_DEBUG, "rsdp\n"); - hexdump(BIOS_DEBUG, rsdp, sizeof(acpi_rsdp_t)); - - printk(BIOS_DEBUG, "rsdt\n"); - hexdump(BIOS_DEBUG, rsdt, sizeof(acpi_rsdt_t)); - - printk(BIOS_DEBUG, "hpet\n"); - hexdump(BIOS_DEBUG, hpet, hpet->header.length); - - printk(BIOS_DEBUG, "madt\n"); - hexdump(BIOS_DEBUG, madt, madt->header.length); - - printk(BIOS_DEBUG, "mcfg\n"); - hexdump(BIOS_DEBUG, mcfg, mcfg->header.length); - - printk(BIOS_DEBUG, "dsdt\n"); - hexdump(BIOS_DEBUG, dsdt, dsdt->length); - - if (ssdt != NULL) { - printk(BIOS_DEBUG, "ssdt\n"); - hexdump(BIOS_DEBUG, ssdt, ssdt->length); - } - - if (ssdt2 != NULL) { - printk(BIOS_DEBUG, "ssdt2\n"); - hexdump(BIOS_DEBUG, ssdt2, ssdt2->length); - } - - printk(BIOS_DEBUG, "fadt\n"); - hexdump(BIOS_DEBUG, fadt, fadt->header.length); - - printk(BIOS_DEBUG, "facs\n"); - hexdump(BIOS_DEBUG, facs, facs->length); - -#endif /* IS_ENABLED(CONFIG_DUMP_ACPI_TABLES) */ - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c index 15b9d9a..b8eb335 100644 --- a/src/mainboard/lenovo/t420s/acpi_tables.c +++ b/src/mainboard/lenovo/t420s/acpi_tables.c @@ -64,15 +64,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/lenovo/t430s/acpi_tables.c b/src/mainboard/lenovo/t430s/acpi_tables.c index 407c8f9..1e692cd 100644 --- a/src/mainboard/lenovo/t430s/acpi_tables.c +++ b/src/mainboard/lenovo/t430s/acpi_tables.c @@ -50,15 +50,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c index 5f81e26..cb63df6 100644 --- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c +++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c @@ -35,10 +35,7 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> - -extern const unsigned char AmlCode[]; - -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -70,185 +67,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - -unsigned long acpi_fill_slit(unsigned long current) -{ - // Not implemented - return current; -} - -unsigned long acpi_fill_srat(unsigned long current) -{ - /* No NUMA, no SRAT */ - return current; -} - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_header_t *ssdt; - acpi_header_t *ssdt2; - acpi_header_t *dsdt; - global_nvs_t *gnvs; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - printk(BIOS_DEBUG, "ACPI: * FACS @ %p Length %x", facs, - facs->length); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - ALIGN_CURRENT; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x", dsdt, - dsdt->length); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - printk(BIOS_DEBUG, "ACPI: * FADT @ %p Length %x", fadt, - fadt->header.length); - - /* - * We explicitly add these tables later on: - */ - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - printk(BIOS_DEBUG, "ACPI: * HPET @ %p Length %x\n", hpet, - hpet->header.length); - - /* If we want to use HPET Timers Linux wants an MADT */ - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - printk(BIOS_DEBUG, "ACPI: * MADT @ %p Length %x\n",madt, - madt->header.length); - - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - printk(BIOS_DEBUG, "ACPI: * MCFG @ %p Length %x\n",mcfg, - mcfg->header.length); - - /* Update GNVS pointer into CBMEM */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); - gnvs = (global_nvs_t *)current; - } - - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> %p\n", i, gnvs); - *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; - acpi_save_gnvs((unsigned long)gnvs); - break; - } - } - - /* And fill it */ - acpi_create_gnvs(gnvs); - - /* And tell SMI about it */ -#if CONFIG_HAVE_SMI_HANDLER - smm_setup_structures(gnvs, NULL, NULL); -#endif - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI Updated DSDT @ %p Length %x\n", dsdt, - dsdt->length); - - ssdt = (acpi_header_t *)current; - memset(ssdt, 0, sizeof(acpi_header_t)); - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - if (ssdt->length) { - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT @ %p Length %x\n",ssdt, - ssdt->length); - ALIGN_CURRENT; - } else { - ssdt = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT not generated.\n"); - } - - ssdt2 = (acpi_header_t *)current; - memset(ssdt2, 0, sizeof(acpi_header_t)); - acpi_create_serialio_ssdt(ssdt2); - if (ssdt2->length) { - current += ssdt2->length; - acpi_add_table(rsdp, ssdt2); - printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, - ssdt2->length); - ALIGN_CURRENT; - } else { - ssdt2 = NULL; - printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); - } - - printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 85631fc..0240830 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select UDELAY_TSC select SOC_INTEL_COMMON + select PER_DEVICE_ACPI_TABLES config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 74e7336..740b39d 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -295,24 +295,20 @@ static acpi_tstate_t baytrail_tss_table[] = { { 13, 125, 0, 0x12, 0 }, }; -static int generate_T_state_entries(int core, int cores_per_package) +static void generate_T_state_entries(int core, int cores_per_package) { - int len; - /* Indicate SW_ALL coordination for T-states */ - len = acpigen_write_TSD_package(core, cores_per_package, SW_ALL); + acpigen_write_TSD_package(core, cores_per_package, SW_ALL); /* Indicate FFixedHW so OS will use MSR */ - len += acpigen_write_empty_PTC(); + acpigen_write_empty_PTC(); /* Set NVS controlled T-state limit */ - len += acpigen_write_TPC("\\TLVL"); + acpigen_write_TPC("\\TLVL"); /* Write TSS table for MSR access */ - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(baytrail_tss_table), baytrail_tss_table); - - return len; } static int calculate_power(int tdp, int p1_ratio, int ratio) @@ -336,9 +332,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -366,16 +361,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -388,14 +383,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -404,14 +399,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -439,7 +434,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -449,15 +444,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -468,23 +460,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index a201c03..946f123 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index 1ba30d5..04df736 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -70,6 +70,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index 97b3bcc..acfa983 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -23,6 +23,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <arch/acpi.h> #include <soc/iomap.h> #include <soc/iosf.h> @@ -131,8 +132,21 @@ static void nc_read_resources(device_t dev) chromeos_reserve_ram_oops(dev, index++); } +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 8df1f1a..3955f93 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -40,6 +40,9 @@ #include <soc/ramstage.h> #include <soc/spi.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> static inline void add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size) @@ -510,9 +513,37 @@ void southcluster_enable_dev(device_t dev) } } +static void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + memset(gnvs, 0, sizeof(*gnvs)); + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} + + static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = acpi_write_hpet, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 4881d8d..86d5b11 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -49,6 +49,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select ROMSTAGE_RTC_INIT + select PER_DEVICE_ACPI_TABLES config SOC_INTEL_FSP_BAYTRAIL_MD bool diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 11c4493..a843e71 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -47,6 +47,7 @@ #include <baytrail/msr.h> #include <baytrail/pattrs.h> #include <baytrail/pmc.h> +#include <cpu/cpu.h> #include <cbmem.h> #include "chip.h" @@ -402,9 +403,8 @@ static int calculate_power(int tdp, int p1_ratio, int ratio) return (int)power; } -static int generate_P_state_entries(int core, int cores_per_package) +static void generate_P_state_entries(int core, int cores_per_package) { - int len, len_pss; int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; int ratio, power, clock, clock_max; @@ -432,16 +432,16 @@ static int generate_P_state_entries(int core, int cores_per_package) power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; /* Write _PCT indicating use of FFixedHW */ - len = acpigen_write_empty_PCT(); + acpigen_write_empty_PCT(); /* Write _PPC with NVS specified limit on supported P-state */ - len += acpigen_write_PPC_NVS(); + acpigen_write_PPC_NVS(); /* Write PSD indicating configured coordination type */ - len += acpigen_write_PSD_package(core, 1, coord_type); + acpigen_write_PSD_package(core, 1, coord_type); /* Add P-state entries in _PSS table */ - len += acpigen_write_name("_PSS"); + acpigen_write_name("_PSS"); /* Determine ratio points */ ratio_step = 1; @@ -454,14 +454,14 @@ static int generate_P_state_entries(int core, int cores_per_package) /* P[T] is Turbo state if enabled */ if (get_turbo_state() == TURBO_ENABLED) { /* _PSS package count including Turbo */ - len_pss = acpigen_write_package(num_entries + 2); + acpigen_write_package(num_entries + 2); ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; control_status = (ratio_turbo << 8) | vid_turbo; /* Add entry for Turbo ratio */ - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max + 1, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -470,14 +470,14 @@ static int generate_P_state_entries(int core, int cores_per_package) control_status); /*status*/ } else { /* _PSS package count without Turbo */ - len_pss = acpigen_write_package(num_entries + 1); + acpigen_write_package(num_entries + 1); ratio_turbo = ratio_max; vid_turbo = vid_max; } /* First regular entry is max non-turbo ratio */ control_status = (ratio_max << 8) | vid_max; - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock_max, /*MHz*/ power_max, /*mW*/ 10, /*lat1*/ @@ -505,7 +505,7 @@ static int generate_P_state_entries(int core, int cores_per_package) clock = (ratio * pattrs->bclk_khz) / 1000; control_status = (ratio << 8) | (vid & 0xff); - len_pss += acpigen_write_PSS_package( + acpigen_write_PSS_package( clock, /*MHz*/ power, /*mW*/ 10, /*lat1*/ @@ -515,15 +515,12 @@ static int generate_P_state_entries(int core, int cores_per_package) } /* Fix package length */ - len_pss--; - acpigen_patch_len(len_pss); - - return len + len_pss; + acpigen_pop_len(); } void generate_cpu_entries(void) { - int len_pr, core; + int core; int pcontrol_blk = get_pmbase(), plen = 6; const struct pattrs *pattrs = pattrs_get(); @@ -534,23 +531,22 @@ void generate_cpu_entries(void) } /* Generate processor \_PR.CPUx */ - len_pr = acpigen_write_processor( + acpigen_write_processor( core, pcontrol_blk, plen); /* Generate P-state tables */ - len_pr += generate_P_state_entries( + generate_P_state_entries( core, pattrs->num_cpus); /* Generate C-state tables */ - len_pr += acpigen_write_CST_package( + acpigen_write_CST_package( cstate_map, ARRAY_SIZE(cstate_map)); /* Generate T-state tables */ - len_pr += generate_T_state_entries( + generate_T_state_entries( core, pattrs->num_cpus); - len_pr--; - acpigen_patch_len(len_pr); + acpigen_pop_len(); } } @@ -575,3 +571,57 @@ unsigned long acpi_madt_irq_overrides(unsigned long current) return current; } + +#define ALIGN_CURRENT current = (ALIGN(current, 16)) + +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp) +{ + acpi_header_t *ssdt2; + + current = acpi_write_hpet(current, rsdp); + ALIGN_CURRENT; + + ssdt2 = (acpi_header_t *)current; + memset(ssdt2, 0, sizeof(acpi_header_t)); + acpi_create_serialio_ssdt(ssdt2); + if (ssdt2->length) { + current += ssdt2->length; + acpi_add_table(rsdp, ssdt2); + printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n",ssdt2, + ssdt2->length); + ALIGN_CURRENT; + } else { + ssdt2 = NULL; + printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); + } + + printk(BIOS_DEBUG, "current = %lx\n", current); + + return current; +} + +void southcluster_inject_dsdt(void) +{ + global_nvs_t *gnvs; + + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + if (gnvs) + memset(gnvs, 0, sizeof(*gnvs)); + } + + if (gnvs) { + memset(gnvs, 0, sizeof(*gnvs)); + acpi_create_gnvs(gnvs); + acpi_save_gnvs((unsigned long)gnvs); + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_pop_len(); + } +} diff --git a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl index 696390d..d2dc021 100644 --- a/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/fsp_baytrail/acpi/globalnvs.asl @@ -30,7 +30,8 @@ Name(\PICM, 0) // IOAPIC/8259 */ -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x2000) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0x2000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/baytrail/acpi.h index aaba61a..ea23974 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h +++ b/src/soc/intel/fsp_baytrail/baytrail/acpi.h @@ -29,5 +29,8 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); +unsigned long southcluster_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp); +void southcluster_inject_dsdt(void); #endif /* _BAYTRAIL_ACPI_H_ */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/nvs.h b/src/soc/intel/fsp_baytrail/baytrail/nvs.h index 242f6d3..11ad72e 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/nvs.h +++ b/src/soc/intel/fsp_baytrail/baytrail/nvs.h @@ -68,6 +68,7 @@ typedef struct { device_nvs_t dev; } __attribute__((packed)) global_nvs_t; +void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c index 2238a8a..ca8873a 100644 --- a/src/soc/intel/fsp_baytrail/northcluster.c +++ b/src/soc/intel/fsp_baytrail/northcluster.c @@ -32,7 +32,7 @@ #include <cbmem.h> #include <baytrail/baytrail.h> #include <drivers/intel/fsp1_0/fsp_util.h> - +#include <arch/acpi.h> static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; @@ -199,8 +199,21 @@ static void nc_enable(device_t dev) print_fsp_info(); } +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + static struct device_operations nc_ops = { .read_resources = nc_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c index d515286..a64d00f 100644 --- a/src/soc/intel/fsp_baytrail/southcluster.c +++ b/src/soc/intel/fsp_baytrail/southcluster.c @@ -39,10 +39,14 @@ #include <baytrail/irq.h> #include <baytrail/lpc.h> #include <baytrail/nvs.h> +#include <baytrail/acpi.h> #include <baytrail/pci_devs.h> #include <baytrail/pmc.h> #include <baytrail/ramstage.h> #include "chip.h" +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <cpu/cpu.h> #define ENABLE_ACPI_MODE_IN_COREBOOT 0 #define TEST_SMM_FLASH_LOCKDOWN 0 @@ -598,6 +602,8 @@ void southcluster_enable_dev(device_t dev) static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, + .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .write_acpi_tables = southcluster_write_acpi_tables, .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev,

1 0

Patch merged into coreboot/master: 5e59757 acpi: make fill_slit and fill_srat into arguments.
by gerrit＠coreboot.org 20 May '15

20 May '15

the following patch was just integrated into master: commit 5e597572ef9b32dfd0ea0b94a9fddd998bfd0f77 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Oct 11 23:45:40 2014 +0200 acpi: make fill_slit and fill_srat into arguments. SLIT and SRAT are created this way only on amdk8 and amdfam10. This saves the need of having a lot of dummies. Change-Id: I76d042702209cd6d11ee78ac22cf9fe9d30d0ca5 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/7052 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/7052 for details. -gerrit

1 0

Patch set updated for coreboot: bf33fec pistashio: bump up romstage size
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10220 -gerrit commit bf33fec08325aa8661b8b83533e55872153c92da Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 16:54:17 2015 -0500 pistashio: bump up romstage size Making large changes in pieces is leading to a little bloat. Bump up the romstage size temporarily so that jenkins will be happy. Change-Id: I6f9facb4ca488cf41741a3ed6d0ed7f66d4778b3 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/imgtec/pistachio/include/soc/memlayout.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index bc67447..ad1d1c5 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -38,8 +38,8 @@ SECTIONS * and then through the identity mapping in ROM stage. */ SRAM_START(0x1a000000) - ROMSTAGE(0x1a005000, 36K) - PRERAM_CBFS_CACHE(0x1a00e000, 72K) + ROMSTAGE(0x1a005000, 40K) + PRERAM_CBFS_CACHE(0x1a00f000, 68K) SRAM_END(0x1a020000) /* Bootblock executes out of KSEG0 and sets up the identity mapping.

1 0

Patch set updated for coreboot: 35b5812 vboot: use only offsets for tracking firmware components
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10221 -gerrit commit 35b5812e4e18de6d7552d669d81f7d3dcf7a0bae Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 15:57:51 2015 -0500 vboot: use only offsets for tracking firmware components Because of the fmap API returning pointers to represent regions within the boot device a vboot_region structure was used to track the case where offsets could be pointers on x86 but not on !x86. Normalize this tracking to use offsets only as it provides consistency in the code. Change-Id: I63c08b31ace3bd0e66ebc17e308f87eb5f857c86 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/vendorcode/google/chromeos/vbnv_flash.c | 14 ++--- src/vendorcode/google/chromeos/vboot2/misc.h | 12 ++-- .../google/chromeos/vboot2/vboot_handoff.c | 4 +- .../google/chromeos/vboot2/vboot_loader.c | 73 ++++++++++++---------- src/vendorcode/google/chromeos/vboot2/verstage.c | 21 +++---- src/vendorcode/google/chromeos/vboot_common.c | 64 ++++++++++--------- src/vendorcode/google/chromeos/vboot_common.h | 12 ++-- 7 files changed, 105 insertions(+), 95 deletions(-) diff --git a/src/vendorcode/google/chromeos/vbnv_flash.c b/src/vendorcode/google/chromeos/vbnv_flash.c index 4cc87b6..c0d0fe2 100644 --- a/src/vendorcode/google/chromeos/vbnv_flash.c +++ b/src/vendorcode/google/chromeos/vbnv_flash.c @@ -32,7 +32,7 @@ #define BLOB_SIZE VB2_NVDATA_SIZE /* FMAP descriptor of the NVRAM area */ -static struct vboot_region nvram_region; +static struct region nvram_region; /* offset of the current nvdata in SPI flash */ static int blob_offset = -1; @@ -74,7 +74,7 @@ static int init_vbnv(void) int i; vboot_locate_region("RW_NVRAM", &nvram_region); - if (nvram_region.size < BLOB_SIZE) { + if (region_sz(&nvram_region) < BLOB_SIZE) { printk(BIOS_ERR, "%s: failed to locate NVRAM\n", __func__); return 1; } @@ -83,8 +83,8 @@ static int init_vbnv(void) for (i = 0; i < BLOB_SIZE; i++) empty_blob[i] = erase_value(); - offset = nvram_region.offset_addr; - top_offset = nvram_region.offset_addr + nvram_region.size - BLOB_SIZE; + offset = region_offset(&nvram_region); + top_offset = offset + region_sz(&nvram_region) - BLOB_SIZE; /* * after the loop, offset is supposed to point the blob right before @@ -130,8 +130,8 @@ static int erase_nvram(void) if (vbnv_flash_probe()) return 1; - if (spi_flash->erase(spi_flash, nvram_region.offset_addr, - nvram_region.size)) { + if (spi_flash->erase(spi_flash, region_offset(&nvram_region), + region_sz(&nvram_region))) { printk(BIOS_ERR, "failed to erase nvram\n"); return 1; } @@ -171,7 +171,7 @@ void save_vbnv(const uint8_t *vbnv_copy) if (new_offset > top_offset) { if (erase_nvram()) return; /* error */ - new_offset = nvram_region.offset_addr; + new_offset = region_offset(&nvram_region); } break; } diff --git a/src/vendorcode/google/chromeos/vboot2/misc.h b/src/vendorcode/google/chromeos/vboot2/misc.h index 175e2c2..edeaf19 100644 --- a/src/vendorcode/google/chromeos/vboot2/misc.h +++ b/src/vendorcode/google/chromeos/vboot2/misc.h @@ -25,7 +25,7 @@ void vboot_fill_handoff(void); void verstage_main(void); void *vboot_load_stage(int stage_index, - struct vboot_region *fw_main, + struct region *fw_main, struct vboot_components *fw_info); /* @@ -47,17 +47,17 @@ size_t vb2_working_data_size(void); void *vboot_get_work_buffer(struct vb2_working_data *wd); static inline void vb2_get_selected_region(struct vb2_working_data *wd, - struct vboot_region *region) + struct region *region) { - region->offset_addr = wd->selected_region_offset; + region->offset = wd->selected_region_offset; region->size = wd->selected_region_size; } static inline void vb2_set_selected_region(struct vb2_working_data *wd, - struct vboot_region *region) + struct region *region) { - wd->selected_region_offset = region->offset_addr; - wd->selected_region_size = region->size; + wd->selected_region_offset = region_offset(region); + wd->selected_region_size = region_sz(region); } static inline int vboot_is_slot_selected(struct vb2_working_data *wd) diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c index 417a496..9952c00 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c @@ -127,7 +127,7 @@ void vboot_fill_handoff(void) int i; struct vboot_handoff *vh; struct vb2_shared_data *sd; - struct vboot_region fw_main; + struct region fw_main; struct vboot_components *fw_info; struct vb2_working_data *wd = vboot_get_working_data(); @@ -159,7 +159,7 @@ void vboot_fill_handoff(void) /* these offset & size are used to load a rw boot loader */ for (i = 0; i < fw_info->num_components; i++) { vh->components[i].address = - fw_main.offset_addr + fw_info->entries[i].offset; + region_offset(&fw_main) + fw_info->entries[i].offset; vh->components[i].size = fw_info->entries[i].size; } } diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index fd64798..1129cd1 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -121,10 +121,10 @@ static int vboot_loader_active(struct prog *prog) if (IS_ENABLED(CONFIG_MULTIPLE_CBFS_INSTANCES) && run_verification) { /* RW A or B */ - struct vboot_region fw_main; + struct region fw_main; vb2_get_selected_region(wd, &fw_main); - cbfs_set_header_offset(fw_main.offset_addr); + cbfs_set_header_offset(region_offset(&fw_main)); } return 1; } @@ -132,27 +132,30 @@ static int vboot_loader_active(struct prog *prog) return 0; } -static uintptr_t vboot_fw_region(int fw_index, struct vboot_region *fw_main, - struct vboot_components *fw_info, size_t *size) +static int vboot_fw_region(int fw_index, struct region *fw_main, + struct vboot_components *fw_info, + struct region *fc) { - uintptr_t fc_addr; - uint32_t fc_size; + size_t fw_main_end; + size_t fc_end; if (fw_index >= fw_info->num_components) { printk(BIOS_INFO, "invalid stage index: %d\n", fw_index); - return 0; + return -1; } - fc_addr = fw_main->offset_addr + fw_info->entries[fw_index].offset; - fc_size = fw_info->entries[fw_index].size; - if (fc_size == 0 || - fc_addr + fc_size > fw_main->offset_addr + fw_main->size) { + fc->offset = region_offset(fw_main) + fw_info->entries[fw_index].offset; + fc->size = fw_info->entries[fw_index].size; + + fw_main_end = region_offset(fw_main) + region_sz(fw_main); + fc_end = region_offset(fc) + region_sz(fc); + + if (region_sz(fc) == 0 || fc_end > fw_main_end) { printk(BIOS_INFO, "invalid stage address or size\n"); - return 0; + return -1; } - *size = fc_size; - return fc_addr; + return 0; } /* This function is only called when vboot_loader_active() returns 1. That @@ -160,7 +163,7 @@ static uintptr_t vboot_fw_region(int fw_index, struct vboot_region *fw_main, static int vboot_prepare(struct prog *prog) { struct vb2_working_data *wd; - struct vboot_region fw_main; + struct region fw_main; struct vboot_components *fw_info; /* Code size optimization. We'd never actually get called under the @@ -202,25 +205,22 @@ static int vboot_prepare(struct prog *prog) /* Load payload in ramstage. */ if (ENV_RAMSTAGE) { - uintptr_t payload; + struct region payload; void *payload_ptr; - size_t size; - - payload = vboot_fw_region(CONFIG_VBOOT_BOOT_LOADER_INDEX, - &fw_main, fw_info, &size); - if (payload == 0) + if (vboot_fw_region(CONFIG_VBOOT_BOOT_LOADER_INDEX, + &fw_main, fw_info, &payload)) die("Couldn't load payload."); - payload_ptr = vboot_get_region(payload, size, NULL); + payload_ptr = vboot_get_region(region_offset(&payload), + region_sz(&payload), NULL); if (payload_ptr == NULL) die("Couldn't load payload."); - prog_set_area(prog, payload_ptr, size); + prog_set_area(prog, payload_ptr, region_sz(&payload)); } else { - uintptr_t stage; - size_t size; + struct region stage; int stage_index = 0; if (prog->type == PROG_ROMSTAGE) @@ -230,22 +230,31 @@ static int vboot_prepare(struct prog *prog) else die("Invalid program type for vboot."); - stage = vboot_fw_region(stage_index, &fw_main, fw_info, &size); - - if (stage == 0) + if (vboot_fw_region(stage_index, &fw_main, fw_info, &stage)) die("Vboot stage load failed."); if (ENV_ROMSTAGE && IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) { + void *stage_ptr; struct rmod_stage_load rmod_ram = { .cbmem_id = CBMEM_ID_RAMSTAGE, .prog = prog, }; - if (rmodule_stage_load(&rmod_ram, (void *)stage)) + stage_ptr = vboot_get_region(region_offset(&stage), + region_sz(&stage), NULL); + + if (stage_ptr == NULL) + die("Vboot couldn't load stage."); + + if (rmodule_stage_load(&rmod_ram, stage_ptr)) die("Vboot couldn't load stage"); - } else if (cbfs_load_prog_stage_by_offset(CBFS_DEFAULT_MEDIA, - prog, stage) < 0) - die("Vboot couldn't load stage"); + } else { + size_t offset = region_offset(&stage); + + if (cbfs_load_prog_stage_by_offset(CBFS_DEFAULT_MEDIA, + prog, offset)) + die("Vboot couldn't load stage"); + } } return 0; diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c index 019208d..59ead4d 100644 --- a/src/vendorcode/google/chromeos/vboot2/verstage.c +++ b/src/vendorcode/google/chromeos/vboot2/verstage.c @@ -67,7 +67,7 @@ int vb2ex_read_resource(struct vb2_context *ctx, void *buf, uint32_t size) { - struct vboot_region region; + struct region region; switch (index) { case VB2_RES_GBB: @@ -83,10 +83,10 @@ int vb2ex_read_resource(struct vb2_context *ctx, return VB2_ERROR_EX_READ_RESOURCE_INDEX; } - if (offset + size > region.size) + if (offset + size > region_sz(&region)) return VB2_ERROR_EX_READ_RESOURCE_SIZE; - if (vboot_get_region(region.offset_addr + offset, size, buf) == NULL) + if (vboot_get_region(region_offset(&region) + offset, size, buf) == NULL) return VB2_ERROR_UNKNOWN; return VB2_SUCCESS; @@ -114,13 +114,13 @@ int vb2ex_hwcrypto_digest_finalize(uint8_t *digest, uint32_t digest_size) return VB2_ERROR_UNKNOWN; } -static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) +static int hash_body(struct vb2_context *ctx, struct region *fw_main) { uint64_t load_ts; uint32_t expected_size; MAYBE_STATIC uint8_t block[TODO_BLOCK_SIZE]; size_t block_size = sizeof(block); - uintptr_t offset; + size_t offset; int rv; /* @@ -132,8 +132,8 @@ static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) load_ts = timestamp_get(); timestamp_add(TS_START_HASH_BODY, load_ts); - expected_size = fw_main->size; - offset = fw_main->offset_addr; + expected_size = region_sz(fw_main); + offset = region_offset(fw_main); /* Start the body hash */ rv = vb2api_init_hash(ctx, VB2_HASH_TAG_FW_BODY, &expected_size); @@ -174,15 +174,14 @@ static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) return VB2_SUCCESS; } -static int locate_firmware(struct vb2_context *ctx, - struct vboot_region *fw_main) +static int locate_firmware(struct vb2_context *ctx, struct region *fw_main) { if (is_slot_a(ctx)) vboot_locate_region("FW_MAIN_A", fw_main); else vboot_locate_region("FW_MAIN_B", fw_main); - if (fw_main->size < 0) + if (region_sz(fw_main) == 0) return 1; return 0; @@ -220,7 +219,7 @@ static uint32_t extend_pcrs(struct vb2_context *ctx) void verstage_main(void) { struct vb2_context ctx; - struct vboot_region fw_main; + struct region fw_main; struct vb2_working_data *wd = vboot_get_working_data(); int rv; timestamp_add_now(TS_START_VBOOT); diff --git a/src/vendorcode/google/chromeos/vboot_common.c b/src/vendorcode/google/chromeos/vboot_common.c index d3a939c..67e52a7 100644 --- a/src/vendorcode/google/chromeos/vboot_common.c +++ b/src/vendorcode/google/chromeos/vboot_common.c @@ -18,7 +18,7 @@ */ #include <boot/coreboot_tables.h> -#include <cbfs.h> +#include <boot_device.h> #include <cbmem.h> #include <console/cbmem_console.h> #include <console/console.h> @@ -31,36 +31,42 @@ #include "vboot_common.h" #include "vboot_handoff.h" -void vboot_locate_region(const char *name, struct vboot_region *region) +void vboot_locate_region(const char *name, struct region *region) { - region->size = find_fmap_entry(name, (void **)&region->offset_addr); + const struct fmap_area *area; + + region->size = 0; + + area = find_fmap_area(fmap_find(), name); + + if (area != NULL) { + region->offset = area->offset; + region->size = area->size; + } } -void *vboot_get_region(uintptr_t offset_addr, size_t size, void *dest) +void *vboot_get_region(size_t offset, size_t size, void *dest) { - if (IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED)) { - if (dest != NULL) - return memcpy(dest, (void *)offset_addr, size); - else - return (void *)offset_addr; - } else { - struct cbfs_media default_media, *media = &default_media; - void *cache; - - init_default_cbfs_media(media); - media->open(media); - if (dest != NULL) { - cache = dest; - if (media->read(media, dest, offset_addr, size) != size) - cache = NULL; - } else { - cache = media->map(media, offset_addr, size); - if (cache == CBFS_MEDIA_INVALID_MAP_ADDRESS) - cache = NULL; - } - media->close(media); - return cache; - } + const struct region_device *boot_dev; + struct region_device rdev; + + boot_device_init(); + boot_dev = boot_device_ro(); + + if (boot_dev == NULL) + return NULL; + + if (rdev_chain(&rdev, boot_dev, offset, size)) + return NULL; + + /* Each call will leak a mapping. */ + if (dest == NULL) + return rdev_mmap_full(&rdev); + + if (rdev_readat(&rdev, dest, 0, size) != size) + return NULL; + + return dest; } int vboot_get_handoff_info(void **addr, uint32_t *size) @@ -78,7 +84,7 @@ int vboot_get_handoff_info(void **addr, uint32_t *size) } /* This will leak a mapping of a fw region */ -struct vboot_components *vboot_locate_components(struct vboot_region *region) +struct vboot_components *vboot_locate_components(struct region *region) { size_t req_size; struct vboot_components *vbc; @@ -87,7 +93,7 @@ struct vboot_components *vboot_locate_components(struct vboot_region *region) req_size += sizeof(struct vboot_component_entry) * MAX_PARSED_FW_COMPONENTS; - vbc = vboot_get_region(region->offset_addr, req_size, NULL); + vbc = vboot_get_region(region_offset(region), req_size, NULL); if (vbc && vbc->num_components > MAX_PARSED_FW_COMPONENTS) vbc = NULL; diff --git a/src/vendorcode/google/chromeos/vboot_common.h b/src/vendorcode/google/chromeos/vboot_common.h index c6c9b50..3430fbe 100644 --- a/src/vendorcode/google/chromeos/vboot_common.h +++ b/src/vendorcode/google/chromeos/vboot_common.h @@ -20,11 +20,7 @@ #define VBOOT_COMMON_H #include <stdint.h> - -struct vboot_region { - uintptr_t offset_addr; - int32_t size; -}; +#include <region.h> /* The FW areas consist of multiple components. At the beginning of * each area is the number of total compoments as well as the size and @@ -40,9 +36,9 @@ struct vboot_components { struct vboot_component_entry entries[0]; } __attribute__((packed)); -void vboot_locate_region(const char *name, struct vboot_region *region); +void vboot_locate_region(const char *name, struct region *region); -struct vboot_components *vboot_locate_components(struct vboot_region *region); +struct vboot_components *vboot_locate_components(struct region *region); /* * This is a dual purpose routine. If dest is non-NULL the region at @@ -50,6 +46,6 @@ struct vboot_components *vboot_locate_components(struct vboot_region *region); * is NULL,the region will be mapped to a memory location. NULL is * returned on error else the location of the requested region. */ -void *vboot_get_region(uintptr_t offset_addr, size_t size, void *dest); +void *vboot_get_region(size_t offset, size_t size, void *dest); #endif /* VBOOT_COMMON_H */

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Patch set updated for coreboot: 3d734df Revert "pistashio: bump up romstage size"
by Aaron Durbin 20 May '15

20 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10222 -gerrit commit 3d734df344edccb8284d551a3a2397e9085b8dbf Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 16:56:27 2015 -0500 Revert "pistashio: bump up romstage size" This reverts commit 701211a6e57a17ea861b4ad682dca7416fc9050e. Change-Id: Ib3e573548bff5c17ab30cfab3d833a2065d689c9 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/imgtec/pistachio/include/soc/memlayout.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index ad1d1c5..bc67447 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -38,8 +38,8 @@ SECTIONS * and then through the identity mapping in ROM stage. */ SRAM_START(0x1a000000) - ROMSTAGE(0x1a005000, 40K) - PRERAM_CBFS_CACHE(0x1a00f000, 68K) + ROMSTAGE(0x1a005000, 36K) + PRERAM_CBFS_CACHE(0x1a00e000, 72K) SRAM_END(0x1a020000) /* Bootblock executes out of KSEG0 and sets up the identity mapping.

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coreboot-gerrit May 2015