coreboot-gerrit March 2015

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Patch set updated for coreboot: 5b8720c rmodule: use struct prog while loading rmodules
by Aaron Durbin 28 Mar '15

28 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9143 -gerrit commit 5b8720c31cec71136143abdb1a5d60baa877ebe0 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 27 21:17:22 2015 -0500 rmodule: use struct prog while loading rmodules The rmod_stage_load structure contained the same fields as struct prog. In order to more closely integrate with the rest of program loading use struct prog. Change-Id: Ib7f45d0b3573e6d518864deacc4002802b11aa9c Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/rmodule.h | 8 ++------ src/lib/loaders/cbfs_ramstage_loader.c | 6 +----- src/lib/rmodule.c | 10 +++++----- src/soc/intel/baytrail/refcode.c | 20 ++++++++++++-------- src/soc/intel/broadwell/refcode.c | 20 ++++++++++++-------- 5 files changed, 32 insertions(+), 32 deletions(-) diff --git a/src/include/rmodule.h b/src/include/rmodule.h index 76b855a..242ed91 100644 --- a/src/include/rmodule.h +++ b/src/include/rmodule.h @@ -55,15 +55,11 @@ int rmodule_calc_region(unsigned int region_alignment, size_t rmodule_size, * using dynamic cbmem because it uses the dynamic cbmem API to obtain * the backing store region for the stage. */ struct cbfs_stage; -struct cbmem_entry; +struct prog; struct rmod_stage_load { - /* Inputs */ uint32_t cbmem_id; - const char *name; - /* Outputs */ - const struct cbmem_entry *cbmem_entry; - void *entry; + struct prog *prog; }; /* Both of the following functions return 0 on success, -1 on error. */ diff --git a/src/lib/loaders/cbfs_ramstage_loader.c b/src/lib/loaders/cbfs_ramstage_loader.c index e565329..c460653 100644 --- a/src/lib/loaders/cbfs_ramstage_loader.c +++ b/src/lib/loaders/cbfs_ramstage_loader.c @@ -29,7 +29,7 @@ static int cbfs_load_ramstage(struct prog *ramstage) { struct rmod_stage_load rmod_ram = { .cbmem_id = CBMEM_ID_RAMSTAGE, - .name = ramstage->name, + .prog = ramstage, }; if (rmodule_stage_load_from_cbfs(&rmod_ram)) { @@ -37,10 +37,6 @@ static int cbfs_load_ramstage(struct prog *ramstage) return -1; } - prog_set_area(ramstage, cbmem_entry_start(rmod_ram.cbmem_entry), - cbmem_entry_size(rmod_ram.cbmem_entry)); - prog_set_entry(ramstage, rmod_ram.entry, NULL); - return 0; } diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index 791029a..2aed676 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -261,7 +261,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl, struct cbfs_stage *stage) int load_offset; const struct cbmem_entry *cbmem_entry; - if (stage == NULL || rsl->name == NULL) + if (stage == NULL || rsl->prog == NULL || rsl->prog->name == NULL) return -1; rmodule_offset = @@ -276,7 +276,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl, struct cbfs_stage *stage) stage_region = cbmem_entry_start(cbmem_entry); printk(BIOS_INFO, "Decompressing stage %s @ 0x%p (%d bytes)\n", - rsl->name, &stage_region[rmodule_offset], stage->memlen); + rsl->prog->name, &stage_region[rmodule_offset], stage->memlen); if (!cbfs_decompress(stage->compression, &stage[1], &stage_region[rmodule_offset], stage->len)) @@ -288,8 +288,8 @@ int rmodule_stage_load(struct rmod_stage_load *rsl, struct cbfs_stage *stage) if (rmodule_load(&stage_region[load_offset], &rmod_stage)) return -1; - rsl->cbmem_entry = cbmem_entry; - rsl->entry = rmodule_entry(&rmod_stage); + prog_set_area(rsl->prog, stage_region, cbmem_entry_size(cbmem_entry)); + prog_set_entry(rsl->prog, rmodule_entry(&rmod_stage), NULL); return 0; } @@ -299,7 +299,7 @@ int rmodule_stage_load_from_cbfs(struct rmod_stage_load *rsl) struct cbfs_stage *stage; stage = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, - rsl->name, CBFS_TYPE_STAGE, NULL); + rsl->prog->name, CBFS_TYPE_STAGE, NULL); if (stage == NULL) return -1; diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 059639b..45771e0 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <console/streams.h> #include <cpu/x86/tsc.h> +#include <program_loading.h> #include <rmodule.h> #include <ramstage_cache.h> #if IS_ENABLED(CONFIG_CHROMEOS) @@ -84,16 +85,16 @@ static void cache_refcode(const struct rmod_stage_load *rsl) /* Determine how much remaining cache available. */ cache_size -= c->size + sizeof(*c); - if (cache_size < (sizeof(*c) + cbmem_entry_size(rsl->cbmem_entry))) { + if (cache_size < (sizeof(*c) + prog_size(rsl->prog))) { printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); return; } c = next_cache(c); c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)rsl->entry; - c->load_address = (uint32_t)cbmem_entry_start(rsl->cbmem_entry); - c->size = cbmem_entry_size(rsl->cbmem_entry); + c->entry_point = (uint32_t)(uintptr_t)prog_entry(rsl->prog); + c->load_address = (uint32_t)(uintptr_t)prog_start(rsl->prog); + c->size = prog_size(rsl->prog); printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", &c->program[0], c->size); @@ -119,7 +120,7 @@ static int load_refcode_from_vboot(struct rmod_stage_load *refcode) printk(BIOS_DEBUG, "refcode loading from vboot rw area.\n"); stage = (void *)(uintptr_t)fwc->address; - if (rmodule_stage_load(refcode, stage) || refcode->entry == NULL) { + if (rmodule_stage_load(refcode, stage)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); return -1; } @@ -136,7 +137,7 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) { printk(BIOS_DEBUG, "refcode loading from cbfs.\n"); - if (rmodule_stage_load_from_cbfs(refcode) || refcode->entry == NULL) { + if (rmodule_stage_load_from_cbfs(refcode)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); return -1; } @@ -146,9 +147,12 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) static efi_wrapper_entry_t load_reference_code(void) { + struct prog prog = { + .name = CONFIG_CBFS_PREFIX "/refcode", + }; struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", + .prog = &prog, }; if (acpi_is_wakeup_s3()) { @@ -162,7 +166,7 @@ static efi_wrapper_entry_t load_reference_code(void) /* Cache loaded reference code. */ cache_refcode(&refcode); - return refcode.entry; + return prog_entry(&prog); } void baytrail_run_reference_code(void) diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index 1328f1a..36ce97d 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <console/streams.h> #include <cpu/x86/tsc.h> +#include <program_loading.h> #include <rmodule.h> #include <ramstage_cache.h> #include <string.h> @@ -80,16 +81,16 @@ static void cache_refcode(const struct rmod_stage_load *rsl) /* Determine how much remaining cache available. */ cache_size -= c->size + sizeof(*c); - if (cache_size < (sizeof(*c) + cbmem_entry_size(rsl->cbmem_entry))) { + if (cache_size < (sizeof(*c) + prog_size(rsl->prog))) { printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); return; } c = next_cache(c); c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)rsl->entry; - c->load_address = (uint32_t)cbmem_entry_start(rsl->cbmem_entry); - c->size = cbmem_entry_size(rsl->cbmem_entry); + c->entry_point = (uint32_t)(uintptr_t)prog_entry(rsl->prog); + c->load_address = (uint32_t)(uintptr_t)prog_start(rsl->prog); + c->size = prog_size(rsl->prog); printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", &c->program[0], c->size); @@ -115,7 +116,7 @@ static int load_refcode_from_vboot(struct rmod_stage_load *refcode) printk(BIOS_DEBUG, "refcode loading from vboot rw area.\n"); stage = (void *)(uintptr_t)fwc->address; - if (rmodule_stage_load(refcode, stage) || refcode->entry == NULL) { + if (rmodule_stage_load(refcode, stage)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); return -1; } @@ -132,7 +133,7 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) { printk(BIOS_DEBUG, "refcode loading from cbfs.\n"); - if (rmodule_stage_load_from_cbfs(refcode) || refcode->entry == NULL) { + if (rmodule_stage_load_from_cbfs(refcode)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); return -1; } @@ -142,9 +143,12 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) static pei_wrapper_entry_t load_reference_code(void) { + struct prog prog = { + .name = CONFIG_CBFS_PREFIX "/refcode", + }; struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, - .name = CONFIG_CBFS_PREFIX "/refcode", + .prog = &prog, }; if (acpi_is_wakeup_s3()) { @@ -158,7 +162,7 @@ static pei_wrapper_entry_t load_reference_code(void) /* Cache loaded reference code. */ cache_refcode(&refcode); - return refcode.entry; + return prog_entry(&prog); } void broadwell_run_reference_code(void)

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Patch set updated for coreboot: 414a8e5 broadwell: fix HAVE_REFCODE_BLOB build errors
by Aaron Durbin 28 Mar '15

28 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9142 -gerrit commit 414a8e53b89a9b2bc8e5f44c5661e8fc1e48e667 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 27 21:01:52 2015 -0500 broadwell: fix HAVE_REFCODE_BLOB build errors When building HAVE_REFCODE_BLOB there are a couple of errors. One is a failure building !CHROME_OS. The other is from a header change where console_tx_byte() was declared. Change-Id: I4110debd6d3818d4a803ed22037166c226f2ed11 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/intel/broadwell/refcode.c | 50 ++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index d66d036..1328f1a 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -21,11 +21,14 @@ #include <arch/acpi.h> #include <cbmem.h> #include <console/console.h> +#include <console/streams.h> #include <cpu/x86/tsc.h> #include <rmodule.h> #include <ramstage_cache.h> #include <string.h> +#if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/vboot_handoff.h> +#endif #include <broadwell/pei_data.h> #include <broadwell/pei_wrapper.h> #include <broadwell/ramstage.h> @@ -93,10 +96,24 @@ static void cache_refcode(const struct rmod_stage_load *rsl) memcpy(&c->program[0], (void *)c->load_address, c->size); } -static int load_refcode_from_vboot(struct rmod_stage_load *refcode, - struct cbfs_stage *stage) +#if IS_ENABLED(CONFIG_CHROMEOS) +static int load_refcode_from_vboot(struct rmod_stage_load *refcode) { + struct vboot_handoff *vboot_handoff; + const struct firmware_component *fwc; + struct cbfs_stage *stage; + + vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + fwc = &vboot_handoff->components[CONFIG_VBOOT_REFCODE_INDEX]; + + if (vboot_handoff == NULL || + vboot_handoff->selected_firmware == VB_SELECT_FIRMWARE_READONLY || + CONFIG_VBOOT_REFCODE_INDEX >= MAX_PARSED_FW_COMPONENTS || + fwc->size == 0 || fwc->address == 0) + return -1; + printk(BIOS_DEBUG, "refcode loading from vboot rw area.\n"); + stage = (void *)(uintptr_t)fwc->address; if (rmodule_stage_load(refcode, stage) || refcode->entry == NULL) { printk(BIOS_DEBUG, "Error loading reference code.\n"); @@ -104,6 +121,12 @@ static int load_refcode_from_vboot(struct rmod_stage_load *refcode, } return 0; } +#else +static int load_refcode_from_vboot(struct rmod_stage_load *refcode) +{ + return -1; +} +#endif static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) { @@ -119,35 +142,18 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode) static pei_wrapper_entry_t load_reference_code(void) { - struct vboot_handoff *vboot_handoff; - const struct firmware_component *fwc; struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .name = CONFIG_CBFS_PREFIX "/refcode", }; - int ret; if (acpi_is_wakeup_s3()) { return load_refcode_from_cache(); } - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - fwc = &vboot_handoff->components[CONFIG_VBOOT_REFCODE_INDEX]; - - if (vboot_handoff == NULL || - vboot_handoff->selected_firmware == VB_SELECT_FIRMWARE_READONLY || - CONFIG_VBOOT_REFCODE_INDEX >= MAX_PARSED_FW_COMPONENTS || - fwc->size == 0 || fwc->address == 0) { - ret = load_refcode_from_cbfs(&refcode); - } else { - ret = load_refcode_from_vboot(&refcode, (void *)fwc->address); - - if (ret < 0) - ret = load_refcode_from_cbfs(&refcode); - } - - if (ret < 0) - return NULL; + if (load_refcode_from_vboot(&refcode) || + load_refcode_from_cbfs(&refcode)) + return NULL; /* Cache loaded reference code. */ cache_refcode(&refcode);

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Patch set updated for coreboot: b22af44 coreboot: differentiate on early reliable writable globals
by Aaron Durbin 28 Mar '15

28 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8943 -gerrit commit b22af44e22f1818c603790df20a4c6f01afb9efc Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Mar 24 09:20:45 2015 -0500 coreboot: differentiate on early reliable writable globals There is a big difference between the boards supported in coreboot and the properties they provide within each stage during the bootflow. The leads to core infrastructure relying on supporting the least common denominator when writing APIs. Therefore, provide PLATFORM_HAS_EARLY_WRITABLE_GLOBALS which indicates that the platform has reliable writable global variables in the early stages of boot. For x86 that would be romstage, and for the other architetures which have SRAM it would encompass bootblock and romstage. Change-Id: I2cefeaee0551ee241e138fcee0d199679002c3be Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/Kconfig | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/Kconfig b/src/Kconfig index 7aee478..2625266 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -293,6 +293,25 @@ config SYSTEM_TYPE_LAPTOP default n bool +config PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + bool + default y if !ARCH_X86 + help + This option signals to the rest of the infrastructure that + the platform supports writable globals in bootblock and + romstage. Fox traditional x86 systems without any SRAM this + would mean cache-as-ram globals are migrated correctly from + the CAR area once memory is trained. After the migration the + variables are accessible using the CAR API. This behavior + puts such x86 systems on par with ARM and MIPS systems. + +config PLATFORM_NO_EARLY_WRITABLE_GLOBALS + bool + default y if !PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + help + This is just the opposite of PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + to enable cleaner Makefiles. + menu "Chipset" comment "CPU"

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Patch merged into coreboot/master: 68bfe16 armv8/secmon: SECMON_SRC is really SECMON_BIN
by gerrit＠coreboot.org 28 Mar '15

28 Mar '15

the following patch was just integrated into master: commit 68bfe16b4448c818b9ae6b9d7d8b08b14a0d7712 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Mar 27 14:24:11 2015 +0100 armv8/secmon: SECMON_SRC is really SECMON_BIN It points to a binary. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I164d7f717a9523d187e2c215083e176b59fd5acc Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9113 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9113 for details. -gerrit

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Patch merged into coreboot/master: 70a6b4f arch/x86: Guard option table specific rules with HAVE_OPTION_TABLE
by gerrit＠coreboot.org 28 Mar '15

28 Mar '15

the following patch was just integrated into master: commit 70a6b4f9314e9f5cd55550e631ccbc28318299c4 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Mar 27 14:14:58 2015 +0100 arch/x86: Guard option table specific rules with HAVE_OPTION_TABLE This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: Ia22c9fcbf8c629d0eb3f1356f80c4565f117d8b8 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9110 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9110 for details. -gerrit

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Patch merged into coreboot/master: ea9f308 build system: normalize linker script file names
by gerrit＠coreboot.org 28 Mar '15

28 Mar '15

the following patch was just integrated into master: commit ea9f30801822716349772157e12d943b11975521 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Mar 27 13:50:11 2015 +0100 build system: normalize linker script file names We have .lb, .lds, and .ld in the tree. Go for .ld everywhere. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I3126af608afe4937ec4551a78df5a7824e09b04b Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9107 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/9107 for details. -gerrit

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Patch merged into coreboot/master: 276ff99 arch/arm64: Drop extra comment
by gerrit＠coreboot.org 28 Mar '15

28 Mar '15

the following patch was just integrated into master: commit 276ff99a079b096f47863ae2cf5a5336601c1522 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Mar 27 14:29:36 2015 +0100 arch/arm64: Drop extra comment This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I362e2f6a978de23e72e6fc9c83bc99457cd76d9c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9112 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9112 for details. -gerrit

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Patch merged into coreboot/master: 58fef67 arch/arm: drop extra comment
by gerrit＠coreboot.org 28 Mar '15

28 Mar '15

the following patch was just integrated into master: commit 58fef67436183402a85a79aff93fe8c0bcb160f0 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Mar 27 14:19:35 2015 +0100 arch/arm: drop extra comment This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I8a5dc66d8c0dc4ccdb6dc3d66b8cdbf50dc976ca Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9111 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9111 for details. -gerrit

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Patch set updated for coreboot: 68d949b cbfs: merge cbfs.c into cbfs_core.c
by Aaron Durbin 28 Mar '15

28 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9127 -gerrit commit 68d949be8bbe60b055fb87a249bde150043543e2 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 21:17:17 2015 -0500 cbfs: merge cbfs.c into cbfs_core.c In order to prepare for a new cbfs API move the existing cbfs implementation in cbfs.c into cbfs_core.c. Additionally add the existing cbfs API definitions to cbfs_core.h. Change-Id: Ifb732261aabfe94545cdd5f673e9f1422ad46085 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/cbfs.h | 61 +------------- src/include/cbfs_core.h | 29 +++++++ src/lib/Makefile.inc | 10 +-- src/lib/cbfs.c | 206 ------------------------------------------------ src/lib/cbfs_core.c | 184 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 220 insertions(+), 270 deletions(-) diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 84fe251..f2776d2 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -1,14 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013-2015 Google, Inc. + * Copyright 2015 Google Inc. * - * This file is dual-licensed. You can choose between: - * - The GNU GPL, version 2, as published by the Free Software Foundation - * - The revised BSD license (without advertising clause) - * - * --------------------------------------------------------------------------- * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -20,31 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - * --------------------------------------------------------------------------- - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * --------------------------------------------------------------------------- + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _CBFS_H_ @@ -52,31 +22,4 @@ #include <cbfs_core.h> -int init_backing_media(struct cbfs_media **media, struct cbfs_media *backing); -void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, - uint16_t device, void * dest); -void *cbfs_load_stage(struct cbfs_media *media, const char *name); -void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset); -/* Load a stage from a prog structure. Returns < 0 on error. 0 on success. */ -struct prog; -int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog); - -/* Simple buffer for streaming media. */ -struct cbfs_simple_buffer { - char *buffer; - size_t allocated; - size_t size; - size_t last_allocate; -}; - -void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, - struct cbfs_media *media, - size_t offset, size_t count); - -void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, - const void *address); - -/* Defined in individual arch / board implementation. */ -int init_default_cbfs_media(struct cbfs_media *media); - #endif diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h index c71cc26..5199250 100644 --- a/src/include/cbfs_core.h +++ b/src/include/cbfs_core.h @@ -70,6 +70,35 @@ #define CBFS_MEDIA_INVALID_MAP_ADDRESS ((void*)(0xffffffff)) #define CBFS_DEFAULT_MEDIA ((void*)(0x0)) +struct cbfs_media; + +int init_backing_media(struct cbfs_media **media, struct cbfs_media *backing); +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void * dest); +void *cbfs_load_stage(struct cbfs_media *media, const char *name); +void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset); +/* Load a stage from a prog structure. Returns < 0 on error. 0 on success. */ +struct prog; +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog); + +/* Simple buffer for streaming media. */ +struct cbfs_simple_buffer { + char *buffer; + size_t allocated; + size_t size; + size_t last_allocate; +}; + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count); + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address); + +/* Defined in individual arch / board implementation. */ +int init_default_cbfs_media(struct cbfs_media *media); + /* Media for CBFS to load files. */ struct cbfs_media { diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 33c3e72..fa3912d 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -19,7 +19,7 @@ subdirs-y += loaders bootblock-y += prog_ops.c -bootblock-y += cbfs.c cbfs_core.c +bootblock-y += cbfs_core.c bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -28,7 +28,7 @@ bootblock-y += memcmp.c verstage-y += prog_ops.c verstage-y += delay.c -verstage-y += cbfs.c +verstage-y += cbfs_core.c verstage-y += memcmp.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c @@ -42,7 +42,7 @@ $(foreach arch,$(ARCH_SUPPORTED),\ $(eval rmodules_$(arch)-y += memcmp.c)) romstage-$(CONFIG_I2C_TPM) += delay.c -romstage-y += cbfs.c cbfs_core.c +romstage-y += cbfs_core.c romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c @@ -72,7 +72,7 @@ smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += delay.c ramstage-y += fallback_boot.c ramstage-y += compute_ip_checksum.c -ramstage-y += cbfs.c cbfs_core.c +ramstage-y += cbfs_core.c ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c ramstage-y += lzma.c lzmadecode.c ramstage-y += stack.c @@ -115,7 +115,7 @@ romstage-y += cbmem_stage_cache.c endif -smm-y += cbfs.c cbfs_core.c memcmp.c +smm-y += cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c bootblock-y += version.c diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c deleted file mode 100644 index 0fddb53..0000000 --- a/src/lib/cbfs.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008, Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - - -#include <program_loading.h> -#include "cbfs_core.h" - -#ifndef __SMM__ -static inline int tohex4(unsigned int c) -{ - return (c <= 9) ? (c + '0') : (c - 10 + 'a'); -} - -static void tohex16(unsigned int val, char* dest) -{ - dest[0] = tohex4(val>>12); - dest[1] = tohex4((val>>8) & 0xf); - dest[2] = tohex4((val>>4) & 0xf); - dest[3] = tohex4(val & 0xf); -} - -void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, - uint16_t device, void *dest) -{ - char name[17] = "pciXXXX,XXXX.rom"; - struct cbfs_optionrom *orom; - uint8_t *src; - - tohex16(vendor, name+3); - tohex16(device, name+8); - - orom = (struct cbfs_optionrom *) - cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM, NULL); - - if (orom == NULL) - return NULL; - - /* They might have specified a dest address. If so, we can decompress. - * If not, there's not much hope of decompressing or relocating the rom. - * in the common case, the expansion rom is uncompressed, we - * pass 0 in for the dest, and all we have to do is find the rom and - * return a pointer to it. - */ - - /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */ - src = (uint8_t *)orom; // + sizeof(struct cbfs_optionrom); - - if (! dest) - return src; - - if (!cbfs_decompress(ntohl(orom->compression), - src, - dest, - ntohl(orom->len))) - return NULL; - - return dest; -} - -static int cbfs_load_prog_stage_by_offset(struct cbfs_media *media, - struct prog *prog, ssize_t offset) -{ - struct cbfs_stage stage; - struct cbfs_media backing_store; - - if (init_backing_media(&media, &backing_store)) - return -1; - - if (cbfs_read(media, &stage, offset, sizeof(stage)) != sizeof(stage)) { - ERROR("ERROR: failed to read stage header\n"); - return -1; - } - - LOG("loading stage @ 0x%llx (%d bytes), entry @ 0x%llx\n", - stage.load, stage.memlen, stage.entry); - - /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)(uintptr_t)stage.load, 0, stage.memlen); - - if (stage.compression == CBFS_COMPRESS_NONE) { - if (cbfs_read(media, (void *)(uintptr_t)stage.load, - offset + sizeof(stage), stage.len) != stage.len) { - ERROR("ERROR: Reading stage failed.\n"); - return -1; - } - } else { - void *data = media->map(media, offset + sizeof(stage), - stage.len); - if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { - ERROR("ERROR: Mapping stage failed.\n"); - return -1; - } - if (!cbfs_decompress(stage.compression, data, - (void *)(uintptr_t)stage.load, stage.len)) - return -1; - media->unmap(media, data); - } - - arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); - DEBUG("stage loaded\n"); - - prog_set_area(prog, (void *)(uintptr_t)stage.load, stage.memlen); - prog_set_entry(prog, (void *)(uintptr_t)stage.entry, NULL); - - return 0; -} - -int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog) -{ - struct cbfs_file file; - ssize_t offset; - struct cbfs_media backing_store; - - if (init_backing_media(&media, &backing_store)) - return -1; - - offset = cbfs_locate_file(media, &file, prog->name); - if (offset < 0 || file.type != CBFS_TYPE_STAGE) - return -1; - - if (cbfs_load_prog_stage_by_offset(media, prog, offset) < 0) - return -1; - - return 0; -} - -void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) -{ - struct prog prog = { - .name = NULL, - }; - - if (cbfs_load_prog_stage_by_offset(media, &prog, offset) < 0) - return (void *)-1; - - return prog_entry(&prog); -} - -void *cbfs_load_stage(struct cbfs_media *media, const char *name) -{ - struct prog prog = { - .name = name, - }; - - if (cbfs_load_prog_stage(media, &prog) < 0) - return (void *)-1; - - return prog_entry(&prog); -} - -/* Simple buffer */ - -void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, - struct cbfs_media *media, - size_t offset, size_t count) { - void *address = buffer->buffer + buffer->allocated; - DEBUG("simple_buffer_map(offset=%zd, count=%zd): " - "allocated=%zd, size=%zd, last_allocate=%zd\n", - offset, count, buffer->allocated, buffer->size, - buffer->last_allocate); - if (buffer->allocated + count >= buffer->size) - return CBFS_MEDIA_INVALID_MAP_ADDRESS; - if (media->read(media, address, offset, count) != count) { - ERROR("simple_buffer: fail to read %zd bytes from 0x%zx\n", - count, offset); - return CBFS_MEDIA_INVALID_MAP_ADDRESS; - } - buffer->allocated += count; - buffer->last_allocate = count; - return address; -} - -void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, - const void *address) { - // TODO Add simple buffer management so we can free more than last - // allocated one. - DEBUG("simple_buffer_unmap(address=0x%p): " - "allocated=%zd, size=%zd, last_allocate=%zd\n", - address, buffer->allocated, buffer->size, - buffer->last_allocate); - if ((buffer->buffer + buffer->allocated - buffer->last_allocate) == - address) { - buffer->allocated -= buffer->last_allocate; - buffer->last_allocate = 0; - } - return NULL; -} - -#endif diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index acd434f..dc53b06 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -51,7 +51,9 @@ #include <cbfs.h> #include <string.h> +#include <rules.h> +#include <program_loading.h> #include "cbfs_core.h" /* returns a pointer to CBFS master header, or CBFS_HEADER_INVALID_ADDRESS @@ -285,3 +287,185 @@ int cbfs_decompress(int algo, void *src, void *dst, int len) return 0; } } + +#if !ENV_SMM +static inline int tohex4(unsigned int c) +{ + return (c <= 9) ? (c + '0') : (c - 10 + 'a'); +} + +static void tohex16(unsigned int val, char* dest) +{ + dest[0] = tohex4(val>>12); + dest[1] = tohex4((val>>8) & 0xf); + dest[2] = tohex4((val>>4) & 0xf); + dest[3] = tohex4(val & 0xf); +} + +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void *dest) +{ + char name[17] = "pciXXXX,XXXX.rom"; + struct cbfs_optionrom *orom; + uint8_t *src; + + tohex16(vendor, name+3); + tohex16(device, name+8); + + orom = (struct cbfs_optionrom *) + cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM, NULL); + + if (orom == NULL) + return NULL; + + /* They might have specified a dest address. If so, we can decompress. + * If not, there's not much hope of decompressing or relocating the rom. + * in the common case, the expansion rom is uncompressed, we + * pass 0 in for the dest, and all we have to do is find the rom and + * return a pointer to it. + */ + + /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */ + src = (uint8_t *)orom; // + sizeof(struct cbfs_optionrom); + + if (! dest) + return src; + + if (!cbfs_decompress(ntohl(orom->compression), + src, + dest, + ntohl(orom->len))) + return NULL; + + return dest; +} + +static int cbfs_load_prog_stage_by_offset(struct cbfs_media *media, + struct prog *prog, ssize_t offset) +{ + struct cbfs_stage stage; + struct cbfs_media backing_store; + + if (init_backing_media(&media, &backing_store)) + return -1; + + if (cbfs_read(media, &stage, offset, sizeof(stage)) != sizeof(stage)) { + ERROR("ERROR: failed to read stage header\n"); + return -1; + } + + LOG("loading stage @ 0x%llx (%d bytes), entry @ 0x%llx\n", + stage.load, stage.memlen, stage.entry); + + /* Stages rely the below clearing so that the bss is initialized. */ + memset((void *)(uintptr_t)stage.load, 0, stage.memlen); + + if (stage.compression == CBFS_COMPRESS_NONE) { + if (cbfs_read(media, (void *)(uintptr_t)stage.load, + offset + sizeof(stage), stage.len) != stage.len) { + ERROR("ERROR: Reading stage failed.\n"); + return -1; + } + } else { + void *data = media->map(media, offset + sizeof(stage), + stage.len); + if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("ERROR: Mapping stage failed.\n"); + return -1; + } + if (!cbfs_decompress(stage.compression, data, + (void *)(uintptr_t)stage.load, stage.len)) + return -1; + media->unmap(media, data); + } + + arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); + DEBUG("stage loaded\n"); + + prog_set_area(prog, (void *)(uintptr_t)stage.load, stage.memlen); + prog_set_entry(prog, (void *)(uintptr_t)stage.entry, NULL); + + return 0; +} + +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog) +{ + struct cbfs_file file; + ssize_t offset; + struct cbfs_media backing_store; + + if (init_backing_media(&media, &backing_store)) + return -1; + + offset = cbfs_locate_file(media, &file, prog->name); + if (offset < 0 || file.type != CBFS_TYPE_STAGE) + return -1; + + if (cbfs_load_prog_stage_by_offset(media, prog, offset) < 0) + return -1; + + return 0; +} + +void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) +{ + struct prog prog = { + .name = NULL, + }; + + if (cbfs_load_prog_stage_by_offset(media, &prog, offset) < 0) + return (void *)-1; + + return prog_entry(&prog); +} + +void *cbfs_load_stage(struct cbfs_media *media, const char *name) +{ + struct prog prog = { + .name = name, + }; + + if (cbfs_load_prog_stage(media, &prog) < 0) + return (void *)-1; + + return prog_entry(&prog); +} + +/* Simple buffer */ + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count) { + void *address = buffer->buffer + buffer->allocated; + DEBUG("simple_buffer_map(offset=%zd, count=%zd): " + "allocated=%zd, size=%zd, last_allocate=%zd\n", + offset, count, buffer->allocated, buffer->size, + buffer->last_allocate); + if (buffer->allocated + count >= buffer->size) + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + if (media->read(media, address, offset, count) != count) { + ERROR("simple_buffer: fail to read %zd bytes from 0x%zx\n", + count, offset); + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + } + buffer->allocated += count; + buffer->last_allocate = count; + return address; +} + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address) { + // TODO Add simple buffer management so we can free more than last + // allocated one. + DEBUG("simple_buffer_unmap(address=0x%p): " + "allocated=%zd, size=%zd, last_allocate=%zd\n", + address, buffer->allocated, buffer->size, + buffer->last_allocate); + if ((buffer->buffer + buffer->allocated - buffer->last_allocate) == + address) { + buffer->allocated -= buffer->last_allocate; + buffer->last_allocate = 0; + } + return NULL; +} +#endif /* !ENV_SMM */

1 0

Patch set updated for coreboot: e36c6d1 coreboot: add region infrastructure
by Aaron Durbin 28 Mar '15

28 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9128 -gerrit commit e36c6d1723904f31455cca03ef30026558db88a8 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 14:39:07 2015 -0500 coreboot: add region infrastructure The region infrastructure provides a means of abstracting access to different types of storage such as SPI flash, MMC, or just plain memory. The regions are represented by region devices which can be chained together forming subregions of the larger region. Change-Id: I803f97567ef0505691a69975c282fde1215ea6da Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/region.h | 100 ++++++++++++++++++++++++++++++++++++++++++ src/lib/Makefile.inc | 4 ++ src/lib/region.c | 121 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+) diff --git a/src/include/region.h b/src/include/region.h new file mode 100644 index 0000000..4f8cda1 --- /dev/null +++ b/src/include/region.h @@ -0,0 +1,100 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _REGION_H_ +#define _REGION_H_ + +#include <stdint.h> +#include <stddef.h> + +/* + * Region support. + * + * Regions are intended to abstract away the access mechanisms for blocks of + * data. This could be SPI, eMMC, or a memory region as the backing store. + * They are accessed through a region_device. Subregions can be made by + * chaining together multiple region_devices. + */ + +struct region_device; + +/* + * Returns NULL on error otherwise a buffer is returned with the conents of + * the requested data at offset of size. + */ +void *rdev_mmap(const struct region_device *rd, size_t offset, size_t size); + +/* Unmap a previously mapped area. Returns 0 on success, < 0 on error. */ +int rdev_munmap(const struct region_device *rd, void *mapping); + +/* + * Returns < 0 on error otherwise returns size of data read at provided + * offset filling in the buffer passed. + */ +ssize_t rdev_readat(const struct region_device *rd, void *b, size_t offset, + size_t size); + + +/**************************************** + * Implementation of a region device * + ****************************************/ + +/* + * Create a child region of the parent provided the sub-region is within + * the parent's region. Returns < 0 on error otherwise 0 on success. Note + * that the child device only calls through the parent's operations. + */ +int rdev_chain(struct region_device *child, const struct region_device *parent, + size_t offset, size_t size); + + +/* A region_device operations. */ +struct region_device_ops { + void *(*mmap)(const struct region_device *, size_t, size_t); + int (*munmap)(const struct region_device *, void *); + ssize_t (*readat)(const struct region_device *, void *, size_t, size_t); +}; + +struct region { + size_t offset; + size_t size; +}; + +struct region_device { + const struct region_device *root; + const struct region_device_ops *ops; + struct region region; +}; + +#define REGION_DEV_INIT(ops_, offset_, size_) \ + { \ + .root = NULL, \ + .ops = (ops_), \ + .region = { \ + .offset = (offset_), \ + .size = (size_), \ + }, \ + } + +static inline size_t region_sz(const struct region *r) +{ + return r->size; +} + +#endif /* _REGION_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index fa3912d..8dbad89 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -25,11 +25,13 @@ bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c bootblock-y += memchr.c bootblock-y += memcmp.c +bootblock-y += region.c verstage-y += prog_ops.c verstage-y += delay.c verstage-y += cbfs_core.c verstage-y += memcmp.c +verstage-y += region.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c verstage-y += tlcl.c @@ -114,6 +116,8 @@ ramstage-y += cbmem_stage_cache.c romstage-y += cbmem_stage_cache.c endif +romstage-y += region.c +ramstage-y += region.c smm-y += cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c diff --git a/src/lib/region.c b/src/lib/region.c new file mode 100644 index 0000000..cf74784 --- /dev/null +++ b/src/lib/region.c @@ -0,0 +1,121 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <region.h> +#include <string.h> + +static inline size_t region_offset(const struct region *r) +{ + return r->offset; +} + +static inline size_t region_end(const struct region *r) +{ + return region_sz(r) + region_offset(r); +} + +static int is_subregion(const struct region *p, const struct region *c) +{ + if (region_offset(c) < region_offset(p)) + return 0; + + if (region_sz(c) > region_sz(p)) + return 0; + + if (region_end(c) > region_end(p)) + return 0; + + return 1; +} + +static int normalize_and_ok(const struct region *outer, struct region *inner) +{ + inner->offset += region_offset(outer); + return is_subregion(outer, inner); +} + +static const struct region_device *rdev_root(const struct region_device *rdev) +{ + if (rdev->root == NULL) + return rdev; + return rdev->root; +} + +void *rdev_mmap(const struct region_device *rd, size_t offset, size_t size) +{ + const struct region_device *rdev; + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&rd->region, &req)) + return NULL; + + rdev = rdev_root(rd); + + return rdev->ops->mmap(rdev, req.offset, req.size); +} + +int rdev_munmap(const struct region_device *rd, void *mapping) +{ + const struct region_device *rdev; + + rdev = rdev_root(rd); + + return rdev->ops->munmap(rdev, mapping); +} + +ssize_t rdev_readat(const struct region_device *rd, void *b, size_t offset, + size_t size) +{ + const struct region_device *rdev; + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&rd->region, &req)) + return -1; + + rdev = rdev_root(rd); + + return rdev->ops->readat(rdev, b, req.offset, req.size); +} + +int rdev_chain(struct region_device *child, const struct region_device *parent, + size_t offset, size_t size) +{ + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&parent->region, &req)) + return -1; + + /* Keep track of root region device. Note the offsets are relative + * to the root device. */ + child->root = rdev_root(parent); + child->ops = NULL; + child->region.offset = req.offset; + child->region.size = req.size; + + return 0; +}

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coreboot-gerrit March 2015