coreboot-gerrit February 2015

coreboot-gerrit@coreboot.org

1 participants
509 discussions

Patch set updated for coreboot: 1540a22 PCI subsystem: Drop parameter max from scan_bus
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8539 -gerrit commit 1540a22b0e7337f5e8256df6057c87789c7e007f Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 2 15:40:51 2015 +0200 PCI subsystem: Drop parameter max from scan_bus Change-Id: Ib33d3363c8d42fa54ac07c11a7ab2bc7ee4ae8bf Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/hypertransport.c | 22 ++++++++------------ src/device/pci_device.c | 26 ++++++++++-------------- src/device/pciexp_device.c | 7 +++---- src/include/device/hypertransport.h | 3 ++- src/include/device/pci.h | 9 +++++--- src/include/device/pciexp.h | 5 +++-- src/include/device/pcix.h | 2 -- src/northbridge/amd/agesa/family10/northbridge.c | 4 +++- src/northbridge/amd/agesa/family15/northbridge.c | 8 +++++--- src/northbridge/amd/amdfam10/northbridge.c | 15 +++++++------- src/northbridge/amd/amdk8/northbridge.c | 19 ++++++++--------- src/southbridge/amd/amd8131/bridge.c | 12 +++++------ src/southbridge/amd/amd8132/bridge.c | 13 +++++------- src/southbridge/amd/cs5536/cs5536.c | 4 ++-- 14 files changed, 69 insertions(+), 80 deletions(-) diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index ec0601b..c968af8 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -248,8 +248,8 @@ static void ht_collapse_early_enumeration(struct bus *bus, } } -static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, - unsigned max_devfn, unsigned int max, +static void do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, + unsigned max_devfn, unsigned *ht_unitid_base, unsigned offset_unitid) { @@ -475,11 +475,10 @@ end_of_chain: } /* Now that nothing is overlapping it is safe to scan the children. */ - max = pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7, max); - return max; + pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7); } -unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max) +void hypertransport_scan_chain(struct bus *bus) { int i; unsigned int max_devfn; @@ -493,14 +492,12 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max) else max_devfn = (0x20 << 3) - 1; - max = do_hypertransport_scan_chain(bus, 0, max_devfn, max, + do_hypertransport_scan_chain(bus, 0, max_devfn, ht_unitid_base, offset_unit_id(bus->secondary == 0)); bus->hcdn_reg = 0; for (i = 0; i < 4; i++) bus->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8); - - return max; } /** @@ -514,15 +511,14 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max) * @param bus TODO * @param min_devfn TODO * @param max_devfn TODO - * @param max The highest bus number assigned up to now. - * @return The maximum bus number found, after scanning all subordinate busses. */ -static unsigned int hypertransport_scan_chain_x(struct bus *bus, - unsigned int min_devfn, unsigned int max_devfn, unsigned int max) +static void hypertransport_scan_chain_x(struct bus *bus, + unsigned int min_devfn, unsigned int max_devfn) { unsigned int ht_unitid_base[4]; unsigned int offset_unitid = 1; - return do_hypertransport_scan_chain(bus, min_devfn, max_devfn, max, + + do_hypertransport_scan_chain(bus, min_devfn, max_devfn, ht_unitid_base, offset_unitid); } diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 6cb99bf..dc7365f 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1074,17 +1074,12 @@ unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev) * Determine the existence of devices and bridges on a PCI bus. If there are * bridges on the bus, recursively scan the buses behind the bridges. * - * This function is the default scan_bus() method for the root device - * 'dev_root'. - * * @param bus Pointer to the bus structure. * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. - * @param max Current bus number. - * @return The maximum bus number found, after scanning all subordinate busses. */ -unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, - unsigned max_devfn, unsigned int max) +void pci_scan_bus(struct bus *bus, unsigned min_devfn, + unsigned max_devfn) { unsigned int devfn; struct device *old_devices; @@ -1149,17 +1144,19 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, * For all children that implement scan_bus() (i.e. bridges) * scan the bus behind that child. */ + unsigned int max = bus->secondary; + for (child = bus->children; child; child = child->sibling) max = scan_bus(child, max); + bus->subordinate = max; + /* * We've scanned the bus and so we know all about what's on the other * side of any bridges that may be on this bus plus any devices. * Return how far we've got finding sub-buses. */ - printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max); post_code(0x55); - return max; } typedef enum { @@ -1228,10 +1225,9 @@ static void pci_bridge_route(struct bus *link, scan_state state) * @return The maximum bus number found, after scanning all subordinate buses. */ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, - unsigned int (*do_scan_bus) (struct bus * bus, + void (*do_scan_bus) (struct bus * bus, unsigned min_devfn, - unsigned max_devfn, - unsigned int max)) + unsigned max_devfn)) { struct bus *bus; @@ -1251,7 +1247,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, pci_bridge_route(bus, PCI_ROUTE_SCAN); - bus->subordinate = do_scan_bus(bus, 0x00, 0xff, bus->secondary); + do_scan_bus(bus, 0x00, 0xff); pci_bridge_route(bus, PCI_ROUTE_FINAL); @@ -1286,8 +1282,8 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max) */ unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { - max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max); - return max; + pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff); + return dev->link_list->subordinate; } /** diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 87aea67..c9dbf2f 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -213,12 +213,12 @@ static void pciexp_tune_dev(device_t dev) #endif } -unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, - unsigned int max_devfn, unsigned int max) +void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, + unsigned int max_devfn) { device_t child; - max = pci_scan_bus(bus, min_devfn, max_devfn, max); + pci_scan_bus(bus, min_devfn, max_devfn); for (child = bus->children; child; child = child->sibling) { if ((child->path.pci.devfn < min_devfn) || @@ -227,7 +227,6 @@ unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, } pciexp_tune_dev(child); } - return max; } unsigned int pciexp_scan_bridge(device_t dev, unsigned int max) diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index 6034b27..18589d0 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -10,8 +10,9 @@ #define ConnectionPending (1 << 4) bool ht_is_non_coherent_link(struct bus *link); -unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max); +void hypertransport_scan_chain(struct bus *bus); unsigned int ht_scan_bridge(struct device *dev, unsigned int max); + extern struct device_operations default_ht_ops_bus; #define HT_IO_HOST_ALIGN 4096 diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 0670da4..fe31f24 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -69,11 +69,14 @@ void pci_dev_enable_resources(device_t dev); void pci_bus_enable_resources(device_t dev); void pci_bus_reset(struct bus *bus); device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); + unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, - unsigned int (*do_scan_bus)(struct bus *bus, - unsigned min_devfn, unsigned max_devfn, unsigned int max)); + void (*do_scan_bus)(struct bus *bus, + unsigned min_devfn, unsigned max_devfn)); unsigned int pci_scan_bridge(device_t bus, unsigned int max); -unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); + +void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn); + uint8_t pci_moving_config8(struct device *dev, unsigned reg); uint16_t pci_moving_config16(struct device *dev, unsigned reg); uint32_t pci_moving_config32(struct device *dev, unsigned reg); diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 87a5002..9476088 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -9,8 +9,9 @@ enum aspm_type { PCIE_ASPM_BOTH = 3, }; -unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, - unsigned int max_devfn, unsigned int max); +void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, + unsigned int max_devfn); + unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); extern struct device_operations default_pciexp_ops_bus; diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 4ffab5b..75be7aa 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,8 +2,6 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */ -unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn, - unsigned int max_devfn, unsigned int max); unsigned int pcix_scan_bridge(device_t dev, unsigned int max); const char *pcix_speed(u16 sstatus); diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 8fb4f8a..5589ba8 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -564,6 +564,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) nodeid = amdfam10_nodeid(dev); if (nodeid == 0) { + ASSERT(dev->bus->secondary == 0); for (link = dev->link_list; link; link = link->next) { if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[3] */ io_hub = link->children; @@ -571,9 +572,10 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) die("I can't find the IO Hub, or IO Hub not enabled, please check the device tree.\n"); } /* Now that nothing is overlapping it is safe to scan the children. */ - max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, 0); + pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } + max = dev->bus->subordinate; } return max; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 52a03f0..6094f29 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -467,6 +467,7 @@ static unsigned scan_chains(device_t dev, unsigned max) u32 next_unitid = 0x18; nodeid = amdfam15_nodeid(dev); if (nodeid == 0) { + ASSERT(dev->bus->secondary == 0); for (link = dev->link_list; link; link = link->next) { //if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[sblink] */ if (link->link_num == 0) { /* devicetree put IO Hub on link_lsit[0] */ @@ -475,9 +476,10 @@ static unsigned scan_chains(device_t dev, unsigned max) die("I can't find the IO Hub, or IO Hub not enabled, please check the device tree.\n"); } /* Now that nothing is overlapping it is safe to scan the children. */ - max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, 0); + pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } + max = dev->bus->subordinate; } return max; } @@ -960,8 +962,8 @@ static void domain_set_resources(device_t dev) /* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */ static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int max) { - max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max); - return max; + pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff); + return dev->link_list->subordinate; } static struct device_operations pci_domain_ops = { diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 409ce0f..57d4412 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -188,13 +188,13 @@ static void ht_route_link(struct bus *link, int mode) #endif } -static u32 amdfam10_scan_chain(struct bus *link, u32 max) +static void amdfam10_scan_chain(struct bus *link) { /* See if there is an available configuration space mapping * register in function 1. */ if (get_ht_c_index(link) >= 4) - return max; + return; /* Set up the primary, secondary and subordinate bus numbers. * We have no idea how many busses are behind this bridge yet, @@ -210,7 +210,7 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) * chain on the hypertranport link */ - link->subordinate = hypertransport_scan_chain(link, link->secondary); + hypertransport_scan_chain(link); /* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value @@ -224,7 +224,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) set_config_map_reg(link); store_ht_c_conf_bus(link); - return link->subordinate; } /* Do sb ht chain at first, in case s2885 put sb chain @@ -273,9 +272,9 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) for (link = dev->link_list; link; link = link->next) { if (link->ht_link_up) - max = amdfam10_scan_chain(link, max); + amdfam10_scan_chain(link); } - return max; + return dev->bus->subordinate; } @@ -915,7 +914,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) } for(link = dev->link_list; link; link = link->next) { - max = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, max); + pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff); } /* Tune the hypertransport transaction for best performance. @@ -939,7 +938,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return max; + return dev->bus->subordinate; } static struct device_operations pci_domain_ops = { diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 9f6ccbd..c9f4d4c 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -130,7 +130,7 @@ static u32 amdk8_nodeid(device_t dev) return (dev->path.pci.devfn >> 3) - 0x18; } -static u32 amdk8_scan_chain(struct bus *link, u32 max) +static void amdk8_scan_chain(struct bus *link) { int index; u32 config_busses; @@ -161,9 +161,8 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) /* If we can't find an available configuration space mapping * register skip this bus */ - if (config_reg > 0xec) { - return max; - } + if (config_reg > 0xec) + return; /* Set up the primary, secondary and subordinate bus numbers. * We have no idea how many busses are behind this bridge yet, @@ -185,7 +184,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link */ - link->subordinate = hypertransport_scan_chain(link, link->secondary); + hypertransport_scan_chain(link); /* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value @@ -199,8 +198,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) index = (config_reg-0xe0) >> 2; sysconf.hcdn_reg[index] = link->hcdn_reg; - - return link->subordinate; } /* Do sb ht chain at first, in case s2885 put sb chain @@ -249,9 +246,9 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max) for (link = dev->link_list; link; link = link->next) { if (link->ht_link_up) - max = amdk8_scan_chain(link, max); + amdk8_scan_chain(link); } - return max; + return dev->bus->subordinate; } @@ -1122,7 +1119,7 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max) for(reg = 0xe0; reg <= 0xec; reg += 4) { f1_write_config32(reg, 0); } - max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max); + pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff); /* Tune the hypertransport transaction for best performance. * Including enabling relaxed ordering if it is safe. @@ -1145,7 +1142,7 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return max; + return dev->link_list->subordinate; } static struct device_operations pci_domain_ops = { diff --git a/src/southbridge/amd/amd8131/bridge.c b/src/southbridge/amd/amd8131/bridge.c index e638fae..cb76980 100644 --- a/src/southbridge/amd/amd8131/bridge.c +++ b/src/southbridge/amd/amd8131/bridge.c @@ -192,16 +192,15 @@ static void amd8131_pcix_tune_dev(device_t dev, void *ptr) pci_write_config16(dev, cap + PCI_X_CMD, cmd); } } -static unsigned int amd8131_scan_bus(struct bus *bus, - unsigned min_devfn, unsigned max_devfn, unsigned int max) +static void amd8131_scan_bus(struct bus *bus, + unsigned min_devfn, unsigned max_devfn) { struct amd8131_bus_info info; struct bus *pbus; unsigned pos; - /* Find the children on the bus */ - max = pci_scan_bus(bus, min_devfn, max_devfn, max); + pci_scan_bus(bus, min_devfn, max_devfn); /* Find the revision of the 8131 */ info.rev = pci_read_config8(bus->dev, PCI_CLASS_REVISION); @@ -243,13 +242,13 @@ static unsigned int amd8131_scan_bus(struct bus *bus, pcix_misc &= ~(0x1f << 16); pci_write_config32(bus->dev, 0x40, pcix_misc); - return max; + return; } /* If we are in conventional PCI mode nothing more is necessary. */ if (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) { - return max; + return; } @@ -264,7 +263,6 @@ static unsigned int amd8131_scan_bus(struct bus *bus, bus_path(pbus)); pbus->disable_relaxed_ordering = 1; } - return max; } static unsigned int amd8131_scan_bridge(device_t dev, unsigned int max) diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c index eecb11b..5df315d 100644 --- a/src/southbridge/amd/amd8132/bridge.c +++ b/src/southbridge/amd/amd8132/bridge.c @@ -138,15 +138,14 @@ static void amd8132_pcix_tune_dev(device_t dev, void *ptr) } -static unsigned int amd8132_scan_bus(struct bus *bus, - unsigned min_devfn, unsigned max_devfn, unsigned int max) +static void amd8132_scan_bus(struct bus *bus, + unsigned min_devfn, unsigned max_devfn) { struct amd8132_bus_info info; unsigned pos; - /* Find the children on the bus */ - max = pci_scan_bus(bus, min_devfn, max_devfn, max); + pci_scan_bus(bus, min_devfn, max_devfn); /* Find the revision of the 8132 */ info.rev = pci_read_config8(bus->dev, PCI_CLASS_REVISION); @@ -181,20 +180,18 @@ static unsigned int amd8132_scan_bus(struct bus *bus, pcix_misc &= ~(0x1f << 16); pci_write_config32(bus->dev, 0x40, pcix_misc); - return max; + return; } #endif /* If we are in conventional PCI mode nothing more is necessary. */ if (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) { - return max; + return; } /* Tune the devices on the bus */ amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info); - - return max; } static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max) diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index dd0ff0f..0ca485b 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -688,10 +688,10 @@ static struct smbus_bus_operations lops_smbus_bus = { .read_byte = lsmbus_read_byte, }; -static unsigned int scan_lpc_smbus(device_t dev, unsigned int max) +static void scan_lpc_smbus(device_t dev) { /* FIXME. Do we have mixed LPC/SMBus device node here. */ - return scan_smbus(dev, max); + scan_smbus(dev); } static struct device_operations southbridge_ops = {

1 0

Patch set updated for coreboot: 9f30b51 PCI subsystem: Refactor PCI bridge register control
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8536 -gerrit commit 9f30b51ee8c110434d7693a7d6096f1a0a8073ee Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 23 06:58:26 2015 +0200 PCI subsystem: Refactor PCI bridge register control Change-Id: I1766c92abe7a74326c49df74ba38930a502fcb5b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/pci_device.c | 76 +++++++++++++++++++++++++++++---------------- src/include/device/device.h | 1 + 2 files changed, 51 insertions(+), 26 deletions(-) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 127ee32..d3a7865 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1167,6 +1167,53 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, return max; } +typedef enum { + PCI_ROUTE_CLOSE, + PCI_ROUTE_SCAN, + PCI_ROUTE_FINAL, +} scan_state; + +static void pci_bridge_route(struct bus *link, scan_state state) +{ + struct device *dev = link->dev; + struct bus *parent = dev->bus; + u32 reg, buses = 0; + + if (state == PCI_ROUTE_CLOSE) { + buses |= 0xfeff << 8; + } else if (state == PCI_ROUTE_SCAN) { + buses |= ((u32) link->secondary & 0xff) << 8; + buses |= ((u32) link->subordinate & 0xff) << 16; + } else if (state == PCI_ROUTE_FINAL) { + buses |= parent->secondary & 0xff; + buses |= ((u32) link->secondary & 0xff) << 8; + buses |= ((u32) link->subordinate & 0xff) << 16; + } + + if (state == PCI_ROUTE_SCAN) { + /* Clear all status bits and turn off memory, I/O and master enables. */ + link->bridge_cmd = pci_read_config16(dev, PCI_COMMAND); + pci_write_config16(dev, PCI_COMMAND, 0x0000); + pci_write_config16(dev, PCI_STATUS, 0xffff); + } + + /* + * Configure the bus numbers for this bridge: the configuration + * transactions will not be propagated by the bridge if it is not + * correctly configured. + */ + + reg = pci_read_config32(dev, PCI_PRIMARY_BUS); + reg &= 0xff000000; + reg |= buses; + pci_write_config32(dev, PCI_PRIMARY_BUS, reg); + + if (state == PCI_ROUTE_FINAL) { + pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); + } +} + + /** * Scan a PCI bridge and the buses behind the bridge. * @@ -1187,8 +1234,6 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, unsigned int max)) { struct bus *bus; - u32 buses; - u16 cr; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); @@ -1212,27 +1257,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, bus->secondary = ++max; bus->subordinate = 0xff; - /* Clear all status bits and turn off memory, I/O and master enables. */ - cr = pci_read_config16(dev, PCI_COMMAND); - pci_write_config16(dev, PCI_COMMAND, 0x0000); - pci_write_config16(dev, PCI_STATUS, 0xffff); - - /* - * Read the existing primary/secondary/subordinate bus - * number configuration. - */ - buses = pci_read_config32(dev, PCI_PRIMARY_BUS); - - /* - * Configure the bus numbers for this bridge: the configuration - * transactions will not be propagated by the bridge if it is not - * correctly configured. - */ - buses &= 0xff000000; - buses |= (((unsigned int)(dev->bus->secondary) << 0) | - ((unsigned int)(bus->secondary) << 8) | - ((unsigned int)(bus->subordinate) << 16)); - pci_write_config32(dev, PCI_PRIMARY_BUS, buses); + pci_bridge_route(bus, PCI_ROUTE_SCAN); /* Now we can scan all subordinate buses (those behind the bridge). */ max = do_scan_bus(bus, 0x00, 0xff, max); @@ -1242,9 +1267,8 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, * bus number to its real value. */ bus->subordinate = max; - buses = (buses & 0xff00ffff) | ((unsigned int)(bus->subordinate) << 16); - pci_write_config32(dev, PCI_PRIMARY_BUS, buses); - pci_write_config16(dev, PCI_COMMAND, cr); + + pci_bridge_route(bus, PCI_ROUTE_FINAL); printk(BIOS_SPEW, "%s returns max %d\n", __func__, max); return max; diff --git a/src/include/device/device.h b/src/include/device/device.h index 559557a..436420f 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -81,6 +81,7 @@ struct bus { ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ unsigned bridge_ctrl; /* Bridge control register */ + uint16_t bridge_cmd; /* Bridge command register */ unsigned char link_num; /* The index of this link */ uint16_t secondary; /* secondary bus number */ uint16_t subordinate; /* max subordinate bus number */

1 0

Patch set updated for coreboot: 8036e31 PCI subsystem: Use subordinate property to track bus enumeration
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8537 -gerrit commit 8036e319eea4a10729927eff53f4d99395547c10 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 23 06:58:26 2015 +0200 PCI subsystem: Use subordinate property to track bus enumeration Parameter max is the cumulative number of PCI buses scanned on the system so far. Use the property subordinate from the parent PCI bridge device to keep track of the first available bus number instead of passing that on the stack. Change-Id: I1a884c98d50fa4f1eb2752e10b778aea8a7b090a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/pci_device.c | 29 +++++++++-------------------- 1 file changed, 9 insertions(+), 20 deletions(-) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index d3a7865..538ab4c 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1179,11 +1179,16 @@ static void pci_bridge_route(struct bus *link, scan_state state) struct bus *parent = dev->bus; u32 reg, buses = 0; + if (state == PCI_ROUTE_SCAN) { + link->secondary = parent->subordinate + 1; + link->subordinate = link->secondary; + } + if (state == PCI_ROUTE_CLOSE) { buses |= 0xfeff << 8; } else if (state == PCI_ROUTE_SCAN) { buses |= ((u32) link->secondary & 0xff) << 8; - buses |= ((u32) link->subordinate & 0xff) << 16; + buses |= 0xff << 16; /* MAX PCI_BUS number here */ } else if (state == PCI_ROUTE_FINAL) { buses |= parent->secondary & 0xff; buses |= ((u32) link->secondary & 0xff) << 8; @@ -1210,10 +1215,10 @@ static void pci_bridge_route(struct bus *link, scan_state state) if (state == PCI_ROUTE_FINAL) { pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); + parent->subordinate = link->subordinate; } } - /** * Scan a PCI bridge and the buses behind the bridge. * @@ -1249,29 +1254,13 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, bus = dev->link_list; - /* - * Set up the primary, secondary and subordinate bus numbers. We have - * no idea how many buses are behind this bridge yet, so we set the - * subordinate bus number to 0xff for the moment. - */ - bus->secondary = ++max; - bus->subordinate = 0xff; - pci_bridge_route(bus, PCI_ROUTE_SCAN); - /* Now we can scan all subordinate buses (those behind the bridge). */ - max = do_scan_bus(bus, 0x00, 0xff, max); - - /* - * We know the number of buses behind this bridge. Set the subordinate - * bus number to its real value. - */ - bus->subordinate = max; + bus->subordinate = do_scan_bus(bus, 0x00, 0xff, bus->secondary); pci_bridge_route(bus, PCI_ROUTE_FINAL); - printk(BIOS_SPEW, "%s returns max %d\n", __func__, max); - return max; + return bus->subordinate; } /**

1 0

Patch set updated for coreboot: 90f0286 devicetree: Remove dev_find_slot() implementation in romstage
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8542 -gerrit commit 90f028606be63400f7710159d33eb845d906433a Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 27 17:24:00 2015 +0200 devicetree: Remove dev_find_slot() implementation in romstage PCI tree has not been enumerated yet in romstage, so all bridge devices found in the static devicetree have their secondary bus number initialized to 0. Change-Id: Ib797210102c942bad3549b756ab0ebe5870b3ce4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device_romstage.c | 24 ------------------------ src/include/device/device.h | 2 -- 2 files changed, 26 deletions(-) diff --git a/src/device/device_romstage.c b/src/device/device_romstage.c index df0df6a..b28dedf 100644 --- a/src/device/device_romstage.c +++ b/src/device/device_romstage.c @@ -31,30 +31,6 @@ ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root; /** - * Given a PCI bus and a devfn number, find the device structure. - * - * @param bus The bus number. - * @param devfn A device/function number. - * @return Pointer to the device structure (if found), 0 otherwise. - */ -ROMSTAGE_CONST struct device *dev_find_slot(unsigned int bus, - unsigned int devfn) -{ - ROMSTAGE_CONST struct device *dev, *result; - - result = 0; - for (dev = all_devices; dev; dev = dev->next) { - if ((dev->path.type == DEVICE_PATH_PCI) && - (dev->bus->secondary == bus) && - (dev->path.pci.devfn == devfn)) { - result = dev; - break; - } - } - return result; -} - -/** * Given a device pointer, find the next PCI device. * * @param previous_dev A pointer to a PCI device structure. diff --git a/src/include/device/device.h b/src/include/device/device.h index a09413f..0ead7e2 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -258,8 +258,6 @@ u32 find_pci_tolm(struct bus *bus); #else /* vv __SIMPLE_DEVICE__ vv */ -ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus, - unsigned int devfn); ROMSTAGE_CONST struct device *dev_find_next_pci_device( ROMSTAGE_CONST struct device *previous_dev); ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus,

1 0

Patch set updated for coreboot: 11a744f devicetree: Remove dev_find_slot_on_smbus()
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8543 -gerrit commit 11a744f2a80ed62427ad1303b2c41a30775c571f Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 27 17:05:18 2015 +0200 devicetree: Remove dev_find_slot_on_smbus() Dynamically assigned bus numbers can shift as hardware configuration changes. This approach also has dependency to the order in which devices are listed in devicetree.cb files. Furthermore, it is not possible to write generic i2c device drivers if bus number is used as part of the slave device. Change-Id: I2489f5d7656c0057db33a6498ef72635f89f486c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device_romstage.c | 24 ------------------------ src/device/device_util.c | 23 ----------------------- src/device/root_device.c | 20 +------------------- src/include/device/device.h | 3 --- 4 files changed, 1 insertion(+), 69 deletions(-) diff --git a/src/device/device_romstage.c b/src/device/device_romstage.c index b28dedf..3715989 100644 --- a/src/device/device_romstage.c +++ b/src/device/device_romstage.c @@ -55,30 +55,6 @@ ROMSTAGE_CONST struct device *dev_find_next_pci_device( } /** - * Given an SMBus bus and a device number, find the device structure. - * - * @param bus The bus number. - * @param addr A device number. - * @return Pointer to the device structure (if found), 0 otherwise. - */ -ROMSTAGE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus, - unsigned int addr) -{ - ROMSTAGE_CONST struct device *dev, *result; - - result = 0; - for (dev = all_devices; dev; dev = dev->next) { - if ((dev->path.type == DEVICE_PATH_I2C) && - (dev->bus->secondary == bus) && - (dev->path.i2c.device == addr)) { - result = dev; - break; - } - } - return result; -} - -/** * Given a PnP port and a device number, find the device structure. * * @param port The I/O port. diff --git a/src/device/device_util.c b/src/device/device_util.c index d970429..bd783c7 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -71,29 +71,6 @@ struct device *dev_find_slot(unsigned int bus, unsigned int devfn) } /** - * Given an SMBus bus and a device number, find the device structure. - * - * @param bus The bus number. - * @param addr A device number. - * @return Pointer to the device structure (if found), 0 otherwise. - */ -struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr) -{ - struct device *dev, *result; - - result = 0; - for (dev = all_devices; dev; dev = dev->next) { - if ((dev->path.type == DEVICE_PATH_I2C) && - (dev->bus->secondary == bus) && - (dev->path.i2c.device == addr)) { - result = dev; - break; - } - } - return result; -} - -/** * Given a PnP port and a device number, find the device structure. * * @param port The I/O port. diff --git a/src/device/root_device.c b/src/device/root_device.c index 860df42..a5ecf0e 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -80,28 +80,10 @@ void scan_smbus(device_t bus) { device_t child; struct bus *link; - static int smbus_max = 0; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - for (link = bus->link_list; link; link = link->next) { - for (child = link->children; child; child = child->sibling) { - - link->secondary = ++smbus_max; - - if (child->chip_ops && child->chip_ops->enable_dev) - child->chip_ops->enable_dev(child); - - if (child->ops && child->ops->enable) - child->ops->enable(child); - - printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(child->bus->dev), - child->bus->link_num); - - printk(BIOS_DEBUG, "%s %s\n", dev_path(child), - child->enabled ? "enabled" : "disabled"); - } - } + max = scan_static_bus(bus, max); printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); } diff --git a/src/include/device/device.h b/src/include/device/device.h index 0ead7e2..a18055e 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -193,7 +193,6 @@ device_t alloc_find_dev(struct bus *parent, struct device_path *path); device_t dev_find_device (u16 vendor, u16 device, device_t from); device_t dev_find_class (unsigned int class, device_t from); device_t dev_find_slot (unsigned int bus, unsigned int devfn); -device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); device_t dev_find_slot_pnp(u16 port, u16 device); device_t dev_find_lapic(unsigned apic_id); int dev_count_cpu(void); @@ -260,8 +259,6 @@ u32 find_pci_tolm(struct bus *bus); ROMSTAGE_CONST struct device *dev_find_next_pci_device( ROMSTAGE_CONST struct device *previous_dev); -ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus, - unsigned int addr); ROMSTAGE_CONST struct device * dev_find_slot_pnp(u16 port, u16 device); #endif

1 0

Patch set updated for coreboot: 4cc4634 devicetree: Single scan_bridges()
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8540 -gerrit commit 4cc4634cf5aa240dc0fb8bc5839cb770726ddacd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 20 21:28:31 2015 +0200 devicetree: Single scan_bridges() Change-Id: Ifd277992a69a4182e2fac92aaf746abe4fec2a1b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device.c | 21 +++++++++++++++++---- src/device/pci_device.c | 7 +------ src/device/root_device.c | 12 ++---------- src/include/device/device.h | 2 +- 4 files changed, 21 insertions(+), 21 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index 00e323a..b96bbfd 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -911,15 +911,15 @@ int reset_bus(struct bus *bus) * @param max Current bus number. * @return The maximum bus number found, after scanning all subordinate buses. */ -unsigned int scan_bus(struct device *busdev, unsigned int max) +static unsigned int scan_bus(struct device *busdev, unsigned int max) { unsigned int new_max; int do_scan_bus; - if (!busdev || !busdev->enabled || !busdev->ops || - !busdev->ops->scan_bus) { + if (!busdev->enabled) return max; - } + + printk(BIOS_SPEW, "%s scanning...\n", dev_path(busdev)); post_log_path(busdev); @@ -940,6 +940,19 @@ unsigned int scan_bus(struct device *busdev, unsigned int max) return new_max; } +void scan_bridges(struct bus *bus) +{ + struct device *child; + unsigned int max = bus->secondary; + + for (child = bus->children; child; child = child->sibling) { + if (!child->ops || !child->ops->scan_bus) + continue; + max = scan_bus(child, max); + } + bus->subordinate = max; +} + /** * Determine the existence of devices and extend the device tree. * diff --git a/src/device/pci_device.c b/src/device/pci_device.c index dc7365f..b1e2bbd 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1083,7 +1083,6 @@ void pci_scan_bus(struct bus *bus, unsigned min_devfn, { unsigned int devfn; struct device *old_devices; - struct device *child; printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); @@ -1144,12 +1143,8 @@ void pci_scan_bus(struct bus *bus, unsigned min_devfn, * For all children that implement scan_bus() (i.e. bridges) * scan the bus behind that child. */ - unsigned int max = bus->secondary; - for (child = bus->children; child; child = child->sibling) - max = scan_bus(child, max); - - bus->subordinate = max; + scan_bridges(bus); /* * We've scanned the bus and so we know all about what's on the other diff --git a/src/device/root_device.c b/src/device/root_device.c index e380d31..ef34ffa 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -125,22 +125,14 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru) */ static unsigned int root_dev_scan_bus(device_t bus, unsigned int passthru) { - device_t child; struct bus *link; - unsigned int max = 0; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); scan_static_bus(bus, 0); - for (link = bus->link_list; link; link = link->next) { - for (child = link->children; child; child = child->sibling) { - if (!child->ops || !child->ops->scan_bus) - continue; - printk(BIOS_SPEW, "%s scanning...\n", dev_path(child)); - max = scan_bus(child, max); - } - } + for (link = bus->link_list; link; link = link->next) + scan_bridges(link); printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); diff --git a/src/include/device/device.h b/src/include/device/device.h index d626165..e1349b2 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -175,7 +175,7 @@ void dev_finalize_chips(void); /* Generic device helper functions */ int reset_bus(struct bus *bus); -unsigned int scan_bus(struct device *bus, unsigned int _max); +void scan_bridges(struct bus *bus); void assign_resources(struct bus *bus); const char *dev_name(device_t dev); const char *dev_path(device_t dev);

1 0

Patch set updated for coreboot: c049498 devicetree: Change scan_bus() prototype in device ops
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8541 -gerrit commit c0494986eeb797d3d180494995f8ec3d9afaec8f Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 26 08:37:01 2015 +0200 devicetree: Change scan_bus() prototype in device ops The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device.c | 16 +++++---------- src/device/hypertransport.c | 4 ++-- src/device/pci_device.c | 17 ++++----------- src/device/pciexp_device.c | 4 ++-- src/device/pcix_device.c | 6 ++---- src/device/root_device.c | 24 ++++++---------------- src/include/device/device.h | 8 ++++---- src/include/device/hypertransport.h | 2 +- src/include/device/pci.h | 4 ++-- src/include/device/pciexp.h | 2 +- src/include/device/pcix.h | 3 ++- src/mainboard/emulation/qemu-i440fx/northbridge.c | 5 ++--- src/northbridge/amd/agesa/family10/northbridge.c | 8 ++------ src/northbridge/amd/agesa/family14/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15/northbridge.c | 10 +++------ src/northbridge/amd/agesa/family15rl/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15tn/northbridge.c | 3 +-- src/northbridge/amd/agesa/family16kb/northbridge.c | 3 +-- src/northbridge/amd/amdfam10/northbridge.c | 9 +++----- src/northbridge/amd/amdk8/northbridge.c | 9 +++----- src/northbridge/amd/pi/00730F01/northbridge.c | 3 +-- src/northbridge/intel/i3100/pciexp_porta.c | 5 +++-- src/northbridge/intel/i3100/pciexp_porta_ep80579.c | 5 +++-- src/southbridge/amd/amd8131/bridge.c | 4 ++-- src/southbridge/amd/amd8132/bridge.c | 4 ++-- src/southbridge/intel/bd82x6x/pcie.c | 7 ++----- src/southbridge/intel/i3100/pciexp_portb.c | 5 +++-- src/southbridge/intel/i82801ix/pcie.c | 7 ++----- 28 files changed, 66 insertions(+), 117 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index b96bbfd..832b3a1 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -908,16 +908,13 @@ int reset_bus(struct bus *bus) * required, reset the bus and scan it again. * * @param busdev Pointer to the bus device. - * @param max Current bus number. - * @return The maximum bus number found, after scanning all subordinate buses. */ -static unsigned int scan_bus(struct device *busdev, unsigned int max) +static void scan_bus(struct device *busdev) { - unsigned int new_max; int do_scan_bus; if (!busdev->enabled) - return max; + return; printk(BIOS_SPEW, "%s scanning...\n", dev_path(busdev)); @@ -926,7 +923,7 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max) do_scan_bus = 1; while (do_scan_bus) { struct bus *link; - new_max = busdev->ops->scan_bus(busdev, max); + busdev->ops->scan_bus(busdev); do_scan_bus = 0; for (link = busdev->link_list; link; link = link->next) { if (link->reset_needed) { @@ -937,20 +934,17 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max) } } } - return new_max; } void scan_bridges(struct bus *bus) { struct device *child; - unsigned int max = bus->secondary; for (child = bus->children; child; child = child->sibling) { if (!child->ops || !child->ops->scan_bus) continue; - max = scan_bus(child, max); + scan_bus(child); } - bus->subordinate = max; } /** @@ -994,7 +988,7 @@ void dev_enumerate(void) printk(BIOS_ERR, "dev_root missing scan_bus operation"); return; } - scan_bus(root, 0); + scan_bus(root); post_log_clear(); printk(BIOS_INFO, "done\n"); } diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index c968af8..18214db 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -522,9 +522,9 @@ static void hypertransport_scan_chain_x(struct bus *bus, ht_unitid_base, offset_unitid); } -unsigned int ht_scan_bridge(struct device *dev, unsigned int max) +void ht_scan_bridge(struct device *dev) { - return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x); + do_pci_scan_bridge(dev, hypertransport_scan_chain_x); } bool ht_is_non_coherent_link(struct bus *link) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index b1e2bbd..c505517 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1215,11 +1215,9 @@ static void pci_bridge_route(struct bus *link, scan_state state) * This function is the default scan_bus() method for PCI bridge devices. * * @param dev Pointer to the bridge device. - * @param max The highest bus number assigned up to now. * @param do_scan_bus TODO - * @return The maximum bus number found, after scanning all subordinate buses. */ -unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, +void do_pci_scan_bridge(struct device *dev, void (*do_scan_bus) (struct bus * bus, unsigned min_devfn, unsigned max_devfn)) @@ -1245,8 +1243,6 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, do_scan_bus(bus, 0x00, 0xff); pci_bridge_route(bus, PCI_ROUTE_FINAL); - - return bus->subordinate; } /** @@ -1258,12 +1254,10 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, * This function is the default scan_bus() method for PCI bridge devices. * * @param dev Pointer to the bridge device. - * @param max The highest bus number assigned up to now. - * @return The maximum bus number found, after scanning all subordinate buses. */ -unsigned int pci_scan_bridge(struct device *dev, unsigned int max) +void pci_scan_bridge(struct device *dev) { - return do_pci_scan_bridge(dev, max, pci_scan_bus); + do_pci_scan_bridge(dev, pci_scan_bus); } /** @@ -1272,13 +1266,10 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max) * This function is the default scan_bus() method for PCI domains. * * @param dev Pointer to the domain. - * @param max The highest bus number assigned up to now. - * @return The maximum bus number found, after scanning all subordinate busses. */ -unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +void pci_domain_scan_bus(device_t dev) { pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff); - return dev->link_list->subordinate; } /** diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index c9dbf2f..ee78368 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -229,9 +229,9 @@ void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, } } -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max) +void pciexp_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, pciexp_scan_bus); + do_pci_scan_bridge(dev, pciexp_scan_bus); } /** Default device operations for PCI Express bridges */ diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index a20c3bf..3135642 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -112,12 +112,12 @@ const char *pcix_speed(u16 sstatus) return result; } -unsigned int pcix_scan_bridge(device_t dev, unsigned int max) +void pcix_scan_bridge(device_t dev) { unsigned int pos; u16 sstatus; - max = do_pci_scan_bridge(dev, max, pci_scan_bus); + do_pci_scan_bridge(dev, pci_scan_bus); /* Find the PCI-X capability. */ pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); @@ -129,8 +129,6 @@ unsigned int pcix_scan_bridge(device_t dev, unsigned int max) /* Print the PCI-X bus speed. */ printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary, pcix_speed(sstatus)); - - return max; } /** Default device operations for PCI-X bridges */ diff --git a/src/device/root_device.c b/src/device/root_device.c index ef34ffa..860df42 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -45,11 +45,9 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * file under some static bus in order to be enumerated at run time. * * @param bus Pointer to the device to which the static buses are attached to. - * @param max Maximum bus number currently used before scanning. - * @return The largest bus number used. */ -static unsigned int scan_static_bus(device_t bus, unsigned int passthru) +static void scan_static_bus(device_t bus) { device_t child; struct bus *link; @@ -67,22 +65,18 @@ static unsigned int scan_static_bus(device_t bus, unsigned int passthru) child->enabled ? "enabled" : "disabled"); } } - - return passthru; } -unsigned int scan_lpc_bus(device_t bus, unsigned int passthru) +void int scan_lpc_bus(device_t bus) { printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - scan_static_bus(bus, 0); + scan_static_bus(bus); printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; } -unsigned int scan_smbus(device_t bus, unsigned int passthru) +void scan_smbus(device_t bus) { device_t child; struct bus *link; @@ -110,8 +104,6 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru) } printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; } /** @@ -120,23 +112,19 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru) * This function is the default scan_bus() method of the root device. * * @param root The root device structure. - * @param max The current bus number scanned so far, usually 0x00. - * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t bus, unsigned int passthru) +static void root_dev_scan_bus(device_t bus) { struct bus *link; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - scan_static_bus(bus, 0); + scan_static_bus(bus); for (link = bus->link_list; link; link = link->next) scan_bridges(link); printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; } static void root_dev_reset(struct bus *bus) diff --git a/src/include/device/device.h b/src/include/device/device.h index e1349b2..a09413f 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -46,7 +46,7 @@ struct device_operations { void (*enable_resources)(device_t dev); void (*init)(device_t dev); void (*final)(device_t dev); - unsigned int (*scan_bus)(device_t bus, unsigned int _max); + void (*scan_bus)(device_t bus); void (*enable)(device_t dev); void (*disable)(device_t dev); void (*set_link)(device_t dev, unsigned int link); @@ -227,13 +227,13 @@ void show_all_devs_resources(int debug_level, const char* msg); extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); -unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); +void pci_domain_scan_bus(struct device *dev); void fixed_mem_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type); -unsigned int scan_smbus(device_t bus, unsigned int _max); -unsigned int scan_lpc_bus(device_t bus, unsigned int _max); +void scan_smbus(device_t bus); +void scan_lpc_bus(device_t bus); /* It is the caller's responsibility to adjust regions such that ram_resource() * and mmio_resource() do not overlap. diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index 18589d0..6767dd2 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -11,7 +11,7 @@ bool ht_is_non_coherent_link(struct bus *link); void hypertransport_scan_chain(struct bus *bus); -unsigned int ht_scan_bridge(struct device *dev, unsigned int max); +void ht_scan_bridge(struct device *dev); extern struct device_operations default_ht_ops_bus; diff --git a/src/include/device/pci.h b/src/include/device/pci.h index fe31f24..bd4d85e 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -70,11 +70,11 @@ void pci_bus_enable_resources(device_t dev); void pci_bus_reset(struct bus *bus); device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); -unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, +void do_pci_scan_bridge(device_t bus, void (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn)); -unsigned int pci_scan_bridge(device_t bus, unsigned int max); +void pci_scan_bridge(device_t bus); void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn); uint8_t pci_moving_config8(struct device *dev, unsigned reg); diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 9476088..3720202 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -12,7 +12,7 @@ enum aspm_type { void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn); -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); +void pciexp_scan_bridge(device_t dev); extern struct device_operations default_pciexp_ops_bus; diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 75be7aa..024c548 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,7 +2,8 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */ -unsigned int pcix_scan_bridge(device_t dev, unsigned int max); +void pcix_scan_bridge(device_t dev); + const char *pcix_speed(u16 sstatus); extern struct device_operations default_pcix_ops_bus; diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 05104dd..fcc5452 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -236,14 +236,14 @@ static void cpu_bus_init(device_t dev) initialize_cpus(dev->link_list); } -static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru) +static void cpu_bus_scan(device_t bus) { int max_cpus = fw_cfg_max_cpus(); device_t cpu; int i; if (max_cpus < 0) - return 0; + return; /* * TODO: This only handles the simple "qemu -smp $nr" case @@ -256,7 +256,6 @@ static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru) if (cpu) set_cpu_topology(cpu, 1, 0, i, 0); } - return max_cpus; } static struct device_operations cpu_bus_ops = { diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 5589ba8..57854d8 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -554,7 +554,7 @@ static void mcf0_control_init(struct device *dev) { } -static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static void amdfam10_scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -575,10 +575,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } - max = dev->bus->subordinate; } - - return max; } static struct device_operations northbridge_operations = { @@ -1007,7 +1004,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1183,7 +1180,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 7639bf6..05c74e3 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -765,7 +765,7 @@ static void domain_enable_resources(device_t dev) /* Bus related code */ -static u32 cpu_bus_scan(struct device *dev, u32 passthru) +static void cpu_bus_scan(struct device *dev) { struct bus *cpu_bus = dev->link_list; device_t cpu; @@ -784,7 +784,6 @@ static u32 cpu_bus_scan(struct device *dev, u32 passthru) if (cpu) amd_cpu_topology(cpu, 0, apic_id); } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 6094f29..6369d01 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -459,7 +459,7 @@ static void nb_set_resources(device_t dev) } } -static unsigned scan_chains(device_t dev, unsigned max) +static void scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -479,9 +479,7 @@ static unsigned scan_chains(device_t dev, unsigned max) pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } - max = dev->bus->subordinate; } - return max; } @@ -960,10 +958,9 @@ static void domain_set_resources(device_t dev) } /* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */ -static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int max) +static void f15_pci_domain_scan_bus(device_t dev) { pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff); - return dev->link_list->subordinate; } static struct device_operations pci_domain_ops = { @@ -1017,7 +1014,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1193,7 +1190,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index 2782c18..2580f43 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -1004,7 +1004,7 @@ static void add_more_links(struct device *dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1178,7 +1178,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(struct device *dev) diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index c293c79..5b25b63 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -1002,7 +1002,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1176,7 +1176,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 3801688..8ce427a 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -1020,7 +1020,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1194,7 +1194,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 57d4412..f4891b2 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -264,7 +264,7 @@ static void trim_ht_chain(struct device *dev) } } -static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static void amdfam10_scan_chains(device_t dev) { struct bus *link; @@ -274,7 +274,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) if (link->ht_link_up) amdfam10_scan_chain(link); } - return dev->bus->subordinate; } @@ -903,7 +902,7 @@ static void amdfam10_domain_set_resources(device_t dev) } } -static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) +static void amdfam10_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -938,7 +937,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return dev->bus->subordinate; } static struct device_operations pci_domain_ops = { @@ -1029,7 +1027,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1198,7 +1196,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index c9f4d4c..5c06df7 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -238,7 +238,7 @@ static void trim_ht_chain(struct device *dev) } } -static unsigned amdk8_scan_chains(device_t dev, unsigned max) +static void amdk8_scan_chains(device_t dev) { struct bus *link; @@ -248,7 +248,6 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max) if (link->ht_link_up) amdk8_scan_chain(link); } - return dev->bus->subordinate; } @@ -1111,7 +1110,7 @@ static void amdk8_domain_set_resources(device_t dev) } -static u32 amdk8_domain_scan_bus(device_t dev, u32 max) +static void amdk8_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -1142,7 +1141,6 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return dev->link_list->subordinate; } static struct device_operations pci_domain_ops = { @@ -1191,7 +1189,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t devx) { struct bus *cpu_bus; device_t dev_mc; @@ -1330,7 +1328,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index f748e8f..40f77ed 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -1013,7 +1013,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1199,7 +1199,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/intel/i3100/pciexp_porta.c b/src/northbridge/intel/i3100/pciexp_porta.c index 2fa162f..35caa61 100644 --- a/src/northbridge/intel/i3100/pciexp_porta.c +++ b/src/northbridge/intel/i3100/pciexp_porta.c @@ -45,7 +45,7 @@ static void pcie_init(struct device *dev) } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -62,7 +62,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c index c0a4d3d..cea4012 100644 --- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c +++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c @@ -67,7 +67,7 @@ static void pcie_bus_enable_resources(struct device *dev) } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -84,7 +84,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { diff --git a/src/southbridge/amd/amd8131/bridge.c b/src/southbridge/amd/amd8131/bridge.c index cb76980..1587268 100644 --- a/src/southbridge/amd/amd8131/bridge.c +++ b/src/southbridge/amd/amd8131/bridge.c @@ -265,9 +265,9 @@ static void amd8131_scan_bus(struct bus *bus, } } -static unsigned int amd8131_scan_bridge(device_t dev, unsigned int max) +static void amd8131_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, amd8131_scan_bus); + do_pci_scan_bridge(dev, amd8131_scan_bus); } diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c index 5df315d..94b917e 100644 --- a/src/southbridge/amd/amd8132/bridge.c +++ b/src/southbridge/amd/amd8132/bridge.c @@ -194,9 +194,9 @@ static void amd8132_scan_bus(struct bus *bus, amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info); } -static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max) +static void amd8132_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, amd8132_scan_bus); + do_pci_scan_bridge(dev, amd8132_scan_bus); } diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 4769dd5..36e24e3 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -273,13 +273,12 @@ static void pch_pcie_enable(device_t dev) pch_pcie_pm_early(dev); } -static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max) +static void unsigned int pch_pciexp_scan_bridge(device_t dev) { - unsigned int ret; struct southbridge_intel_bd82x6x_config *config = dev->chip_info; /* Normal PCIe Scan */ - ret = pciexp_scan_bridge(dev, max); + pciexp_scan_bridge(dev); if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) { intel_acpi_pcie_hotplug_scan_slot(dev->link_list); @@ -287,8 +286,6 @@ static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max) /* Late Power Management init after bridge device enumeration */ pch_pcie_pm_late(dev); - - return ret; } static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/intel/i3100/pciexp_portb.c b/src/southbridge/intel/i3100/pciexp_portb.c index ff0bce5..9f65a27 100644 --- a/src/southbridge/intel/i3100/pciexp_portb.c +++ b/src/southbridge/intel/i3100/pciexp_portb.c @@ -39,7 +39,7 @@ static void pcie_init(struct device *dev) { } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -56,7 +56,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c index 7583715..e4cb0d9 100644 --- a/src/southbridge/intel/i82801ix/pcie.c +++ b/src/southbridge/intel/i82801ix/pcie.c @@ -110,19 +110,16 @@ static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max) +static void pch_pciexp_scan_bridge(device_t dev) { - unsigned int ret; struct southbridge_intel_i82801ix_config *config = dev->chip_info; /* Normal PCIe Scan */ - ret = pciexp_scan_bridge(dev, max); + pciexp_scan_bridge(dev); if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) { intel_acpi_pcie_hotplug_scan_slot(dev->link_list); } - - return ret; } static struct pci_operations pci_ops = {

1 0

Patch set updated for coreboot: e3fa743 devicetree: Extend scans to all bridge devices
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8544 -gerrit commit e3fa743a4668ffb9fbb421109163326ab18071d7 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 20 20:19:16 2015 +0200 devicetree: Extend scans to all bridge devices When PCI bridge or PCI-e rootport is disabled in devicetree, it still must be configured if it cannot be hidden. For purposes of power-management it may be necessary to enable bridge to put devices on secondary side, before disabling the bridge itself. Change-Id: I710a95fd35543bc4e671c9ac18d7ce22c4df2476 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device.c | 3 --- src/device/pci_device.c | 3 +++ src/device/root_device.c | 8 ++++++++ 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index 832b3a1..42c1080 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -913,9 +913,6 @@ static void scan_bus(struct device *busdev) { int do_scan_bus; - if (!busdev->enabled) - return; - printk(BIOS_SPEW, "%s scanning...\n", dev_path(busdev)); post_log_path(busdev); diff --git a/src/device/pci_device.c b/src/device/pci_device.c index c505517..86105e2 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1224,6 +1224,9 @@ void do_pci_scan_bridge(struct device *dev, { struct bus *bus; + if (!dev->enabled) + return; + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); if (dev->link_list == NULL) { diff --git a/src/device/root_device.c b/src/device/root_device.c index a5ecf0e..2620a6c 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -69,6 +69,11 @@ static void scan_static_bus(device_t bus) void int scan_lpc_bus(device_t bus) { + struct bus *link; + + if (!bus->enabled) + return; + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); scan_static_bus(bus); @@ -81,6 +86,9 @@ void scan_smbus(device_t bus) device_t child; struct bus *link; + if (!bus->enabled) + return; + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); max = scan_static_bus(bus, max);

1 0

Patch set updated for coreboot: 44c66c8 devicetree: Discriminate device ops scan_bus()
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8534 -gerrit commit 44c66c80d22df7023632eada8182d44d358c120c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 26 20:47:47 2015 +0200 devicetree: Discriminate device ops scan_bus() Use of scan_static_bus() and tree traversals is somewhat convoluted. Start cleaning this up by assigning each path type with separate static scan_bus() function. For ME, SMBus and LPC paths a bus cannot expose bridges, as those would add to the number of encountered PCI buses. Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/root_device.c | 83 ++++++++++++++++++------- src/drivers/i2c/i2cmux/i2cmux.c | 7 +-- src/drivers/i2c/i2cmux2/i2cmux2.c | 7 +-- src/include/device/device.h | 3 +- src/mainboard/lippert/frontrunner/devicetree.cb | 6 +- src/northbridge/via/cx700/lpc.c | 2 +- src/northbridge/via/vx800/lpc.c | 2 +- src/northbridge/via/vx900/lpc.c | 2 +- src/northbridge/via/vx900/traf_ctrl.c | 5 +- src/soc/intel/baytrail/southcluster.c | 2 +- src/soc/intel/broadwell/lpc.c | 2 +- src/soc/intel/broadwell/smbus.c | 2 +- src/soc/intel/fsp_baytrail/southcluster.c | 2 +- src/southbridge/amd/agesa/hudson/lpc.c | 2 +- src/southbridge/amd/agesa/hudson/sm.c | 2 +- src/southbridge/amd/amd8111/acpi.c | 2 +- src/southbridge/amd/amd8111/lpc.c | 2 +- src/southbridge/amd/amd8111/smbus.c | 2 +- src/southbridge/amd/amd8111/usb.c | 2 - src/southbridge/amd/cimx/sb700/late.c | 2 +- src/southbridge/amd/cimx/sb800/late.c | 2 +- src/southbridge/amd/cimx/sb900/late.c | 2 +- src/southbridge/amd/cs5535/cs5535.c | 1 - src/southbridge/amd/cs5536/cs5536.c | 9 ++- src/southbridge/amd/pi/hudson/lpc.c | 2 +- src/southbridge/amd/pi/hudson/sm.c | 2 +- src/southbridge/amd/sb600/lpc.c | 2 +- src/southbridge/amd/sb600/sm.c | 2 +- src/southbridge/amd/sb700/lpc.c | 2 +- src/southbridge/amd/sb700/sm.c | 2 +- src/southbridge/amd/sb800/lpc.c | 2 +- src/southbridge/amd/sb800/sm.c | 2 +- src/southbridge/broadcom/bcm5785/lpc.c | 2 +- src/southbridge/broadcom/bcm5785/sb_pci_main.c | 2 +- src/southbridge/dmp/vortex86ex/southbridge.c | 2 +- src/southbridge/intel/bd82x6x/lpc.c | 2 +- src/southbridge/intel/bd82x6x/me.c | 1 - src/southbridge/intel/bd82x6x/me_8.x.c | 1 - src/southbridge/intel/bd82x6x/smbus.c | 2 +- src/southbridge/intel/esb6300/lpc.c | 2 +- src/southbridge/intel/esb6300/smbus.c | 2 +- src/southbridge/intel/fsp_bd82x6x/lpc.c | 2 +- src/southbridge/intel/fsp_bd82x6x/me.c | 1 - src/southbridge/intel/fsp_bd82x6x/me_8.x.c | 1 - src/southbridge/intel/fsp_rangeley/lpc.c | 2 +- src/southbridge/intel/fsp_rangeley/smbus.c | 2 +- src/southbridge/intel/i3100/lpc.c | 2 +- src/southbridge/intel/i3100/smbus.c | 2 +- src/southbridge/intel/i82371eb/isa.c | 2 +- src/southbridge/intel/i82371eb/smbus.c | 2 +- src/southbridge/intel/i82801ax/lpc.c | 2 +- src/southbridge/intel/i82801ax/smbus.c | 2 +- src/southbridge/intel/i82801bx/lpc.c | 2 +- src/southbridge/intel/i82801bx/smbus.c | 2 +- src/southbridge/intel/i82801cx/lpc.c | 2 +- src/southbridge/intel/i82801dx/lpc.c | 2 +- src/southbridge/intel/i82801ex/lpc.c | 2 +- src/southbridge/intel/i82801ex/smbus.c | 2 +- src/southbridge/intel/i82801gx/lpc.c | 2 +- src/southbridge/intel/i82801gx/smbus.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/i82801ix/smbus.c | 2 +- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/intel/ibexpeak/me.c | 1 - src/southbridge/intel/ibexpeak/smbus.c | 2 +- src/southbridge/intel/lynxpoint/lpc.c | 2 +- src/southbridge/intel/lynxpoint/smbus.c | 2 +- src/southbridge/intel/sch/lpc.c | 2 +- src/southbridge/intel/sch/smbus.c | 2 +- src/southbridge/nvidia/ck804/lpc.c | 2 +- src/southbridge/nvidia/ck804/smbus.c | 2 +- src/southbridge/nvidia/mcp55/lpc.c | 2 +- src/southbridge/nvidia/mcp55/smbus.c | 2 +- src/southbridge/rdc/r8610/r8610.c | 1 - src/southbridge/sis/sis966/lpc.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 6 +- src/superio/smsc/lpc47b397/superio.c | 1 - 77 files changed, 139 insertions(+), 117 deletions(-) diff --git a/src/device/root_device.c b/src/device/root_device.c index d0a3664..a5fba5c 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -44,51 +44,68 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * debug device. Those virtual devices have to be listed in the config * file under some static bus in order to be enumerated at run time. * - * This function is the default scan_bus() method for the root device and - * LPC bridges. - * * @param bus Pointer to the device to which the static buses are attached to. * @param max Maximum bus number currently used before scanning. * @return The largest bus number used. */ -static int smbus_max = 0; -unsigned int scan_static_bus(device_t bus, unsigned int max) + +static unsigned int scan_static_bus(device_t bus, unsigned int max) { device_t child; struct bus *link; - printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - for (link = bus->link_list; link; link = link->next) { - /* For SMBus bus enumerate. */ - child = link->children; - - if (child && child->path.type == DEVICE_PATH_I2C) - link->secondary = ++smbus_max; - for (child = link->children; child; child = child->sibling) { + if (child->chip_ops && child->chip_ops->enable_dev) child->chip_ops->enable_dev(child); if (child->ops && child->ops->enable) child->ops->enable(child); - if (child->path.type == DEVICE_PATH_I2C) { - printk(BIOS_DEBUG, "smbus: %s[%d]->", - dev_path(child->bus->dev), - child->bus->link_num); - } printk(BIOS_DEBUG, "%s %s\n", dev_path(child), child->enabled ? "enabled" : "disabled"); } } + return max; +} + +unsigned int scan_lpc_bus(device_t bus, unsigned int max) +{ + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); + + max = scan_static_bus(bus, max); + + printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); + + return max; +} + +unsigned int scan_smbus(device_t bus, unsigned int max) +{ + device_t child; + struct bus *link; + static int smbus_max = 0; + + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); + for (link = bus->link_list; link; link = link->next) { for (child = link->children; child; child = child->sibling) { - if (!child->ops || !child->ops->scan_bus) - continue; - printk(BIOS_SPEW, "%s scanning...\n", dev_path(child)); - max = scan_bus(child, max); + + link->secondary = ++smbus_max; + + if (child->chip_ops && child->chip_ops->enable_dev) + child->chip_ops->enable_dev(child); + + if (child->ops && child->ops->enable) + child->ops->enable(child); + + printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(child->bus->dev), + child->bus->link_num); + + printk(BIOS_DEBUG, "%s %s\n", dev_path(child), + child->enabled ? "enabled" : "disabled"); } } @@ -106,9 +123,27 @@ unsigned int scan_static_bus(device_t bus, unsigned int max) * @param max The current bus number scanned so far, usually 0x00. * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t root, unsigned int max) +static unsigned int root_dev_scan_bus(device_t bus, unsigned int max) { - return scan_static_bus(root, max); + device_t child; + struct bus *link; + + printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); + + max = scan_static_bus(bus, max); + + for (link = bus->link_list; link; link = link->next) { + for (child = link->children; child; child = child->sibling) { + if (!child->ops || !child->ops->scan_bus) + continue; + printk(BIOS_SPEW, "%s scanning...\n", dev_path(child)); + max = scan_bus(child, max); + } + } + + printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); + + return max; } static void root_dev_reset(struct bus *bus) diff --git a/src/drivers/i2c/i2cmux/i2cmux.c b/src/drivers/i2c/i2cmux/i2cmux.c index 1091653..ef5ab3a 100644 --- a/src/drivers/i2c/i2cmux/i2cmux.c +++ b/src/drivers/i2c/i2cmux/i2cmux.c @@ -1,10 +1,5 @@ -#include <console/console.h> #include <device/device.h> #include <device/smbus.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <cpu/x86/msr.h> static void i2cmux_set_link(struct device *dev, unsigned int link) { @@ -21,7 +16,7 @@ static struct device_operations i2cmux_operations = { .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .set_link = i2cmux_set_link, }; diff --git a/src/drivers/i2c/i2cmux2/i2cmux2.c b/src/drivers/i2c/i2cmux2/i2cmux2.c index fe48e76..4d1241a 100644 --- a/src/drivers/i2c/i2cmux2/i2cmux2.c +++ b/src/drivers/i2c/i2cmux2/i2cmux2.c @@ -1,10 +1,5 @@ -#include <console/console.h> #include <device/device.h> #include <device/smbus.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <cpu/x86/msr.h> static void i2cmux2_set_link(struct device *dev, unsigned int link) { @@ -20,7 +15,7 @@ static struct device_operations i2cmux2_operations = { .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .set_link = i2cmux2_set_link, }; diff --git a/src/include/device/device.h b/src/include/device/device.h index c1c9fdb..559557a 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -224,11 +224,12 @@ void show_all_devs_resources(int debug_level, const char* msg); extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); -unsigned int scan_static_bus(device_t bus, unsigned int _max); void fixed_mem_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type); +unsigned int scan_smbus(device_t bus, unsigned int _max); +unsigned int scan_lpc_bus(device_t bus, unsigned int _max); /* It is the caller's responsibility to adjust regions such that ram_resource() * and mmio_resource() do not overlap. diff --git a/src/mainboard/lippert/frontrunner/devicetree.cb b/src/mainboard/lippert/frontrunner/devicetree.cb index 78d099a..239f1f9 100644 --- a/src/mainboard/lippert/frontrunner/devicetree.cb +++ b/src/mainboard/lippert/frontrunner/devicetree.cb @@ -6,10 +6,10 @@ chip northbridge/amd/gx2 end device domain 0 on - device pci 0.0 on end + device pci 0.0 on chip southbridge/amd/cs5535 - register "setupflash" = "0" - device pci 12.0 on + register "setupflash" = "0" + device pci 12.0 on end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c index 56842b0..01d62e7 100644 --- a/src/northbridge/via/cx700/lpc.c +++ b/src/northbridge/via/cx700/lpc.c @@ -297,7 +297,7 @@ static struct device_operations cx700_lpc_ops = { .set_resources = cx700_set_resources, .enable_resources = cx700_enable_resources, .init = cx700_lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c index c3dee32..2cde9b3 100644 --- a/src/northbridge/via/vx800/lpc.c +++ b/src/northbridge/via/vx800/lpc.c @@ -362,7 +362,7 @@ static struct device_operations vx800_lpc_ops = { .set_resources = vx800_set_resources, .enable_resources = pci_dev_enable_resources, .init = southbridge_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c index 61a8a7b..f6c4c6a 100644 --- a/src/northbridge/via/vx900/lpc.c +++ b/src/northbridge/via/vx900/lpc.c @@ -192,7 +192,7 @@ static struct device_operations vx900_lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vx900_lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/northbridge/via/vx900/traf_ctrl.c b/src/northbridge/via/vx900/traf_ctrl.c index fb15193..011bb41 100644 --- a/src/northbridge/via/vx900/traf_ctrl.c +++ b/src/northbridge/via/vx900/traf_ctrl.c @@ -134,8 +134,9 @@ static struct device_operations traf_ctrl_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vx900_traf_ctr_init, - /* Need this here, or the IOAPIC driver won't be called */ - .scan_bus = scan_static_bus, + /* Need this here, or the IOAPIC driver won't be called. + * FIXME: Technically not a LPC bus. */ + .scan_bus = scan_lpc_bus, }; static const struct pci_driver traf_ctrl_driver __pci_driver = { diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index d0569b4..bd0da5e 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -517,7 +517,7 @@ static struct device_operations device_ops = { .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &soc_pci_ops, }; diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 53cc4b8..9e071fc 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -587,7 +587,7 @@ static struct device_operations device_ops = { .acpi_inject_dsdt_generator = southcluster_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .init = &lpc_init, - .scan_bus = &scan_static_bus, + .scan_bus = &scan_lpc_bus, .ops_pci = &broadwell_pci_ops, }; diff --git a/src/soc/intel/broadwell/smbus.c b/src/soc/intel/broadwell/smbus.c index a1dbdfe..900af82 100644 --- a/src/soc/intel/broadwell/smbus.c +++ b/src/soc/intel/broadwell/smbus.c @@ -94,7 +94,7 @@ static struct device_operations smbus_ops = { .read_resources = &smbus_read_resources, .set_resources = &pci_dev_set_resources, .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_static_bus, + .scan_bus = &scan_smbus, .init = &pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &broadwell_pci_ops, diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c index 878535f..8ce6ad1 100644 --- a/src/soc/intel/fsp_baytrail/southcluster.c +++ b/src/soc/intel/fsp_baytrail/southcluster.c @@ -602,7 +602,7 @@ static struct device_operations device_ops = { .enable_resources = NULL, .init = sc_init, .enable = southcluster_enable_dev, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &soc_pci_ops, }; diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c index b784fc4..b9938cb 100644 --- a/src/southbridge/amd/agesa/hudson/lpc.c +++ b/src/southbridge/amd/agesa/hudson/lpc.c @@ -333,7 +333,7 @@ static struct device_operations lpc_ops = { #endif .enable_resources = hudson_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c index bc6564d..a660965 100644 --- a/src/southbridge/amd/agesa/hudson/sm.c +++ b/src/southbridge/amd/agesa/hudson/sm.c @@ -163,7 +163,7 @@ static struct device_operations smbus_ops = { .set_resources = hudson_sm_set_resources, .enable_resources = pci_dev_enable_resources, .init = sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c index 6d0ce26..396b7c4 100644 --- a/src/southbridge/amd/amd8111/acpi.c +++ b/src/southbridge/amd/amd8111/acpi.c @@ -226,7 +226,7 @@ static struct device_operations acpi_ops = { .set_resources = pci_dev_set_resources, .enable_resources = acpi_enable_resources, .init = acpi_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, /* We don't need amd8111_enable, chip ops takes care of it. * It could be useful if these devices were not * enabled by default. diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index d75723c..a02e69d 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -151,7 +151,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = amd8111_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c index 0a0c58d..def1377 100644 --- a/src/southbridge/amd/amd8111/smbus.c +++ b/src/southbridge/amd/amd8111/smbus.c @@ -28,7 +28,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = amd8111_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c index 13dccf4..feb7793 100644 --- a/src/southbridge/amd/amd8111/usb.c +++ b/src/southbridge/amd/amd8111/usb.c @@ -25,8 +25,6 @@ static struct device_operations usb_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, -// .enable = amd8111_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c index 1e1357e..517d685 100644 --- a/src/southbridge/amd/cimx/sb700/late.c +++ b/src/southbridge/amd/cimx/sb700/late.c @@ -111,7 +111,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 2125027..c0ac73f 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -161,7 +161,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c index 6d47f05..77f45ee 100644 --- a/src/southbridge/amd/cimx/sb900/late.c +++ b/src/southbridge/amd/cimx/sb900/late.c @@ -132,7 +132,7 @@ static struct device_operations lpc_ops = { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) && IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES) .write_acpi_tables = acpi_write_hpet, #endif - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c index e66a1e2..70b8386 100644 --- a/src/southbridge/amd/cs5535/cs5535.c +++ b/src/southbridge/amd/cs5535/cs5535.c @@ -94,7 +94,6 @@ static struct device_operations southbridge_ops = { .enable_resources = pci_dev_enable_resources, .init = southbridge_init, .enable = southbridge_enable, - .scan_bus = scan_static_bus, }; static const struct pci_driver cs5535_pci_driver __pci_driver = { diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index da79a67..dd0ff0f 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -688,13 +688,18 @@ static struct smbus_bus_operations lops_smbus_bus = { .read_byte = lsmbus_read_byte, }; +static unsigned int scan_lpc_smbus(device_t dev, unsigned int max) +{ + /* FIXME. Do we have mixed LPC/SMBus device node here. */ + return scan_smbus(dev, max); +} + static struct device_operations southbridge_ops = { .read_resources = cs5536_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = southbridge_init, -// .enable = southbridge_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_smbus, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index 7e2ec00..847d750 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -332,7 +332,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c index bc6564d..a660965 100644 --- a/src/southbridge/amd/pi/hudson/sm.c +++ b/src/southbridge/amd/pi/hudson/sm.c @@ -163,7 +163,7 @@ static struct device_operations smbus_ops = { .set_resources = hudson_sm_set_resources, .enable_resources = pci_dev_enable_resources, .init = sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c index dc2f31b..973f01d 100644 --- a/src/southbridge/amd/sb600/lpc.c +++ b/src/southbridge/amd/sb600/lpc.c @@ -242,7 +242,7 @@ static struct device_operations lpc_ops = { .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, /* .enable = sb600_enable, */ .ops_pci = &lops_pci, }; diff --git a/src/southbridge/amd/sb600/sm.c b/src/southbridge/amd/sb600/sm.c index 3ce5f02..a8d690e 100644 --- a/src/southbridge/amd/sb600/sm.c +++ b/src/southbridge/amd/sb600/sm.c @@ -361,7 +361,7 @@ static struct device_operations smbus_ops = { .set_resources = sb600_sm_set_resources, .enable_resources = pci_dev_enable_resources, .init = sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, /* .enable = sb600_enable, */ .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 658e954..e6bb5b1 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -285,7 +285,7 @@ static struct device_operations lpc_ops = { .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c index 1db637b..2b8dfb4 100644 --- a/src/southbridge/amd/sb700/sm.c +++ b/src/southbridge/amd/sb700/sm.c @@ -452,7 +452,7 @@ static struct device_operations smbus_ops = { .set_resources = sb700_sm_set_resources, .enable_resources = pci_dev_enable_resources, .init = sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index 87c09a2..1973e36 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -254,7 +254,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; static const struct pci_driver lpc_driver __pci_driver = { diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c index 2f5dfa1..2137996 100644 --- a/src/southbridge/amd/sb800/sm.c +++ b/src/southbridge/amd/sb800/sm.c @@ -343,7 +343,7 @@ static struct device_operations smbus_ops = { .set_resources = sb800_sm_set_resources, .enable_resources = pci_dev_enable_resources, .init = sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c index af79892..2fdc5d0 100644 --- a/src/southbridge/broadcom/bcm5785/lpc.c +++ b/src/southbridge/broadcom/bcm5785/lpc.c @@ -135,7 +135,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = bcm5785_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, // .enable = bcm5785_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c index 3745cef..7a92c96 100644 --- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c +++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c @@ -154,7 +154,7 @@ static struct device_operations sb_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = sb_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, // .enable = bcm5785_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c index 2fe1bc2..0eaeeee 100644 --- a/src/southbridge/dmp/vortex86ex/southbridge.c +++ b/src/southbridge/dmp/vortex86ex/southbridge.c @@ -619,7 +619,7 @@ static struct device_operations vortex_sb_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = &southbridge_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = 0, .ops_pci = 0, }; diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index c323f73..f16c8c3 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -855,7 +855,7 @@ static struct device_operations device_ops = { .acpi_fill_ssdt_generator = southbridge_fill_ssdt, .init = lpc_init, .enable = pch_lpc_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index df18830..42ecca3 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -761,7 +761,6 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = intel_me_init, - .scan_bus = scan_static_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 3fa3269..3e681b7 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -764,7 +764,6 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = intel_me_init, - .scan_bus = scan_static_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c index 6d4e457..1a997d9 100644 --- a/src/southbridge/intel/bd82x6x/smbus.c +++ b/src/southbridge/intel/bd82x6x/smbus.c @@ -151,7 +151,7 @@ static struct device_operations smbus_ops = { .read_resources = smbus_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, diff --git a/src/southbridge/intel/esb6300/lpc.c b/src/southbridge/intel/esb6300/lpc.c index 22bb150..e1718bb 100644 --- a/src/southbridge/intel/esb6300/lpc.c +++ b/src/southbridge/intel/esb6300/lpc.c @@ -362,7 +362,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = esb6300_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = esb6300_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/intel/esb6300/smbus.c b/src/southbridge/intel/esb6300/smbus.c index 92cb288..2c026b8 100644 --- a/src/southbridge/intel/esb6300/smbus.c +++ b/src/southbridge/intel/esb6300/smbus.c @@ -35,7 +35,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = esb6300_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index f9961f9..2d9485d 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -796,7 +796,7 @@ static struct device_operations device_ops = { .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .init = lpc_init, .enable = pch_lpc_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/fsp_bd82x6x/me.c b/src/southbridge/intel/fsp_bd82x6x/me.c index bcaeeeb..89569e5 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me.c +++ b/src/southbridge/intel/fsp_bd82x6x/me.c @@ -760,7 +760,6 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = intel_me_init, - .scan_bus = scan_static_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c index 9af5f93..74ecf52 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c +++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c @@ -763,7 +763,6 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = intel_me_init, - .scan_bus = scan_static_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index 8f29670..ff42f5f 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -463,7 +463,7 @@ static struct device_operations device_ops = { .write_acpi_tables = acpi_write_hpet, .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .enable = soc_lpc_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c index 83158cc..aae62d3 100644 --- a/src/southbridge/intel/fsp_rangeley/smbus.c +++ b/src/southbridge/intel/fsp_rangeley/smbus.c @@ -87,7 +87,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, }; diff --git a/src/southbridge/intel/i3100/lpc.c b/src/southbridge/intel/i3100/lpc.c index 737ec65..a20550d 100644 --- a/src/southbridge/intel/i3100/lpc.c +++ b/src/southbridge/intel/i3100/lpc.c @@ -457,7 +457,7 @@ static struct device_operations lpc_ops = { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) .write_acpi_tables = acpi_write_hpet, #endif - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i3100_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/intel/i3100/smbus.c b/src/southbridge/intel/i3100/smbus.c index 849a25c..c9457fc 100644 --- a/src/southbridge/intel/i3100/smbus.c +++ b/src/southbridge/intel/i3100/smbus.c @@ -74,7 +74,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = i3100_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 1deddf6..cf15eb7 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -145,7 +145,7 @@ static const struct device_operations isa_ops = { .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif .init = isa_init, - .scan_bus = scan_static_bus, /* TODO: Needed? */ + .scan_bus = scan_lpc_bus, /* TODO: Needed? */ .enable = 0, .ops_pci = 0, /* No subsystem IDs on 82371EB! */ }; diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c index 6341751..d5a8051 100644 --- a/src/southbridge/intel/i82371eb/smbus.c +++ b/src/southbridge/intel/i82371eb/smbus.c @@ -121,7 +121,7 @@ static const struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = pwrmgt_enable, .ops_pci = 0, /* No subsystem IDs on 82371EB! */ .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/intel/i82801ax/lpc.c b/src/southbridge/intel/i82801ax/lpc.c index aece452..c95bce8 100644 --- a/src/southbridge/intel/i82801ax/lpc.c +++ b/src/southbridge/intel/i82801ax/lpc.c @@ -286,7 +286,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i82801ax_enable, }; diff --git a/src/southbridge/intel/i82801ax/smbus.c b/src/southbridge/intel/i82801ax/smbus.c index bbcf629..108e225 100644 --- a/src/southbridge/intel/i82801ax/smbus.c +++ b/src/southbridge/intel/i82801ax/smbus.c @@ -48,7 +48,7 @@ static const struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = i82801ax_enable, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/intel/i82801bx/lpc.c b/src/southbridge/intel/i82801bx/lpc.c index ee0b521..d9fb2d3 100644 --- a/src/southbridge/intel/i82801bx/lpc.c +++ b/src/southbridge/intel/i82801bx/lpc.c @@ -304,7 +304,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i82801bx_enable, }; diff --git a/src/southbridge/intel/i82801bx/smbus.c b/src/southbridge/intel/i82801bx/smbus.c index 5bb5119..7571c35 100644 --- a/src/southbridge/intel/i82801bx/smbus.c +++ b/src/southbridge/intel/i82801bx/smbus.c @@ -48,7 +48,7 @@ static const struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = i82801bx_enable, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/intel/i82801cx/lpc.c b/src/southbridge/intel/i82801cx/lpc.c index 22671c3..a348c95 100644 --- a/src/southbridge/intel/i82801cx/lpc.c +++ b/src/southbridge/intel/i82801cx/lpc.c @@ -230,7 +230,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = 0, }; diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 83d6178..ccfeaa3 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -336,7 +336,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i82801dx_enable, }; diff --git a/src/southbridge/intel/i82801ex/lpc.c b/src/southbridge/intel/i82801ex/lpc.c index 0a2f6e3..630484a 100644 --- a/src/southbridge/intel/i82801ex/lpc.c +++ b/src/southbridge/intel/i82801ex/lpc.c @@ -369,7 +369,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = i82801ex_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i82801ex_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/intel/i82801ex/smbus.c b/src/southbridge/intel/i82801ex/smbus.c index fe49e11..75ea119 100644 --- a/src/southbridge/intel/i82801ex/smbus.c +++ b/src/southbridge/intel/i82801ex/smbus.c @@ -35,7 +35,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = i82801ex_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index cbc0106..7349c8d 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -644,7 +644,7 @@ static struct device_operations device_ops = { .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = i82801gx_enable, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c index 750da51..bcaa2a0 100644 --- a/src/southbridge/intel/i82801gx/smbus.c +++ b/src/southbridge/intel/i82801gx/smbus.c @@ -258,7 +258,7 @@ static struct device_operations smbus_ops = { .read_resources = smbus_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .enable = i82801gx_enable, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 0ba33d6..9ac9a61 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -576,7 +576,7 @@ static struct device_operations device_ops = { .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt_generator = southbridge_fill_ssdt, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c index 25b21fa..9410315 100644 --- a/src/southbridge/intel/i82801ix/smbus.c +++ b/src/southbridge/intel/i82801ix/smbus.c @@ -101,7 +101,7 @@ static struct device_operations smbus_ops = { .read_resources = smbus_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index db73b0a..1267b84 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -838,7 +838,7 @@ static struct device_operations device_ops = { .write_acpi_tables = acpi_write_hpet, .init = lpc_init, .enable = pch_lpc_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 9592b23..413579c 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -635,7 +635,6 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = intel_me_init, - .scan_bus = scan_static_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c index 9ef5bcb..6331071 100644 --- a/src/southbridge/intel/ibexpeak/smbus.c +++ b/src/southbridge/intel/ibexpeak/smbus.c @@ -108,7 +108,7 @@ static struct device_operations smbus_ops = { .read_resources = smbus_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index d753bea..bd0d643 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -828,7 +828,7 @@ static struct device_operations device_ops = { .write_acpi_tables = southbridge_write_acpi_tables, .init = lpc_init, .enable = pch_lpc_enable, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index fa68605..b020636 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -155,7 +155,7 @@ static struct device_operations smbus_ops = { .read_resources = smbus_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c index dcf9e33..086a3f3 100644 --- a/src/southbridge/intel/sch/lpc.c +++ b/src/southbridge/intel/sch/lpc.c @@ -216,7 +216,7 @@ static struct device_operations device_ops = { .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, }; diff --git a/src/southbridge/intel/sch/smbus.c b/src/southbridge/intel/sch/smbus.c index 0a12987..0d6ff2c 100644 --- a/src/southbridge/intel/sch/smbus.c +++ b/src/southbridge/intel/sch/smbus.c @@ -65,7 +65,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &smbus_pci_ops, }; diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c index 5df8acf..bcbed94 100644 --- a/src/southbridge/nvidia/ck804/lpc.c +++ b/src/southbridge/nvidia/ck804/lpc.c @@ -329,7 +329,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, #endif .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &ck804_pci_ops, }; diff --git a/src/southbridge/nvidia/ck804/smbus.c b/src/southbridge/nvidia/ck804/smbus.c index 270d085..ee7065b 100644 --- a/src/southbridge/nvidia/ck804/smbus.c +++ b/src/southbridge/nvidia/ck804/smbus.c @@ -96,7 +96,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = 0, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, .ops_pci = &ck804_pci_ops, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c index 5f190b8..1926bec 100644 --- a/src/southbridge/nvidia/mcp55/lpc.c +++ b/src/southbridge/nvidia/mcp55/lpc.c @@ -261,7 +261,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = mcp55_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, // .enable = mcp55_enable, .ops_pci = &mcp55_pci_ops, }; diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c index 3e0b87e..5193dd0 100644 --- a/src/southbridge/nvidia/mcp55/smbus.c +++ b/src/southbridge/nvidia/mcp55/smbus.c @@ -127,7 +127,7 @@ static struct device_operations smbus_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = mcp55_sm_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_smbus, // .enable = mcp55_enable, .ops_pci = &mcp55_pci_ops, .ops_smbus_bus = &lops_smbus_bus, diff --git a/src/southbridge/rdc/r8610/r8610.c b/src/southbridge/rdc/r8610/r8610.c index c87d5fe..9a65ffc 100644 --- a/src/southbridge/rdc/r8610/r8610.c +++ b/src/southbridge/rdc/r8610/r8610.c @@ -105,7 +105,6 @@ static struct device_operations r8610_sb_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = &southbridge_init, - .scan_bus = scan_static_bus, .enable = 0, .ops_pci = 0, }; diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c index c9f1ff6..eb7aa88 100644 --- a/src/southbridge/sis/sis966/lpc.c +++ b/src/southbridge/sis/sis966/lpc.c @@ -259,7 +259,7 @@ static struct device_operations lpc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = sis966_lpc_enable_resources, .init = lpc_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, // .enable = sis966_enable, .ops_pci = &lops_pci, }; diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index d85006c..7d0f63a 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -657,7 +657,7 @@ static const struct device_operations vt8237r_lpc_ops_s = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vt8237s_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; @@ -666,7 +666,7 @@ static const struct device_operations vt8237r_lpc_ops_r = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vt8237r_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; @@ -675,7 +675,7 @@ static const struct device_operations vt8237r_lpc_ops_a = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vt8237a_init, - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .ops_pci = &lops_pci, }; diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 9c4a3b6..d9b2735 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -146,7 +146,6 @@ static struct device_operations ops_hwm = { .enable_resources = lpc47b397_pnp_enable_resources, .enable = pnp_alt_enable, .init = lpc47b397_init, - .scan_bus = scan_static_bus, .ops_smbus_bus = &lops_smbus_bus, .ops_pnp_mode = &pnp_conf_mode_55_aa, };

1 0

Patch set updated for coreboot: 5645c51 devicetree: Rename unused parameter to passthru
by Kyösti Mälkki 27 Feb '15

27 Feb '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8535 -gerrit commit 5645c517f138af66c9ce182c7585b4ec6672df03 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 25 07:38:01 2015 +0200 devicetree: Rename unused parameter to passthru The actual use of the parameter max is to keep track of PCI bus number while recursively scanning PCI bridges or PCI-e rootports. Neither CPU, SMBus, LPC or other static buses are involved in this enumeration, but the way bridge operations were originally designed forced to pass this argument thru unrelated functions. Follow-up removes these once the function prototype gets fixed. Change-Id: Idbc9c515a362c571a1798bb36972058b309c2774 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/root_device.c | 21 +++++++++++---------- src/mainboard/emulation/qemu-i440fx/northbridge.c | 2 +- src/northbridge/amd/agesa/family10/northbridge.c | 4 ++-- src/northbridge/amd/agesa/family14/northbridge.c | 4 ++-- src/northbridge/amd/agesa/family15/northbridge.c | 4 ++-- src/northbridge/amd/agesa/family15rl/northbridge.c | 4 ++-- src/northbridge/amd/agesa/family15tn/northbridge.c | 4 ++-- src/northbridge/amd/agesa/family16kb/northbridge.c | 4 ++-- src/northbridge/amd/amdfam10/northbridge.c | 4 ++-- src/northbridge/amd/amdk8/northbridge.c | 4 ++-- src/northbridge/amd/pi/00730F01/northbridge.c | 4 ++-- 11 files changed, 30 insertions(+), 29 deletions(-) diff --git a/src/device/root_device.c b/src/device/root_device.c index a5fba5c..e380d31 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -49,7 +49,7 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * @return The largest bus number used. */ -static unsigned int scan_static_bus(device_t bus, unsigned int max) +static unsigned int scan_static_bus(device_t bus, unsigned int passthru) { device_t child; struct bus *link; @@ -68,21 +68,21 @@ static unsigned int scan_static_bus(device_t bus, unsigned int max) } } - return max; + return passthru; } -unsigned int scan_lpc_bus(device_t bus, unsigned int max) +unsigned int scan_lpc_bus(device_t bus, unsigned int passthru) { printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - max = scan_static_bus(bus, max); + scan_static_bus(bus, 0); printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - return max; + return passthru; } -unsigned int scan_smbus(device_t bus, unsigned int max) +unsigned int scan_smbus(device_t bus, unsigned int passthru) { device_t child; struct bus *link; @@ -111,7 +111,7 @@ unsigned int scan_smbus(device_t bus, unsigned int max) printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - return max; + return passthru; } /** @@ -123,14 +123,15 @@ unsigned int scan_smbus(device_t bus, unsigned int max) * @param max The current bus number scanned so far, usually 0x00. * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t bus, unsigned int max) +static unsigned int root_dev_scan_bus(device_t bus, unsigned int passthru) { device_t child; struct bus *link; + unsigned int max = 0; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); - max = scan_static_bus(bus, max); + scan_static_bus(bus, 0); for (link = bus->link_list; link; link = link->next) { for (child = link->children; child; child = child->sibling) { @@ -143,7 +144,7 @@ static unsigned int root_dev_scan_bus(device_t bus, unsigned int max) printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - return max; + return passthru; } static void root_dev_reset(struct bus *bus) diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 08d563f..05104dd 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -236,7 +236,7 @@ static void cpu_bus_init(device_t dev) initialize_cpus(dev->link_list); } -static unsigned int cpu_bus_scan(device_t bus, unsigned int max) +static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru) { int max_cpus = fw_cfg_max_cpus(); device_t cpu; diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 8e47c1a..8fb4f8a 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -1005,7 +1005,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1181,7 +1181,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index ff669ef..7639bf6 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -765,7 +765,7 @@ static void domain_enable_resources(device_t dev) /* Bus related code */ -static u32 cpu_bus_scan(struct device *dev, u32 max) +static u32 cpu_bus_scan(struct device *dev, u32 passthru) { struct bus *cpu_bus = dev->link_list; device_t cpu; @@ -784,7 +784,7 @@ static u32 cpu_bus_scan(struct device *dev, u32 max) if (cpu) amd_cpu_topology(cpu, 0, apic_id); } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 89e1644..52a03f0 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -1015,7 +1015,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1191,7 +1191,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index f83ff2d..2782c18 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -1004,7 +1004,7 @@ static void add_more_links(struct device *dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1178,7 +1178,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(struct device *dev) diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index d878b4f..c293c79 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -1002,7 +1002,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1176,7 +1176,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index badec55..3801688 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -1020,7 +1020,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1194,7 +1194,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index f28c726..f28c01d 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -1190,7 +1190,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1359,7 +1359,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 29fa2a4..a0c3d7f 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -1192,7 +1192,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1331,7 +1331,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index b10da3d..f748e8f 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -1013,7 +1013,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1199,7 +1199,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev)

1 0

← Newer
1
...
4
5
6
7
8
9
10
...
51
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2015