Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8269
-gerrit
commit 9f10e7b49768b3f46704b181ccbfb7831cf2f8b7
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Fri Jan 23 20:29:46 2015 -0600
nvidia/ck804: Fix FTBFS with AMD Family 10h systems
The build failure stems from a missing function being called via a chain
including setup_ss_table(), set_ht_link_ck804(), and
st_ht_link_buffer_counts_chain(); the latter function is only available\
in the AMD K8 code.
It appears that a bunch of K8-specific code snuck into the CK804 and MCP55
southbridge code in GIT hashes 968bbe89 and d4b278c0.
Change-Id: I85d005edba44c503c49917d4b928e5c9c5900059
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/southbridge/nvidia/ck804/early_setup_car.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index 9ba98c9..09cbc58 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -1,6 +1,8 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering
+ *
* Copyright (C) 2004 Tyan Computer
* Written by Yinghai Lu <yhlu(a)tyan.com> for Tyan Computer.
*
@@ -18,6 +20,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#if !IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
+/* Someone messed up and snuck in some K8-specific code */
+static int set_ht_link_buffer_counts_chain(uint8_t ht_c_num, unsigned vendorid, unsigned val) { return 0; /* stub */};
+#endif
+
static int set_ht_link_ck804(u8 ht_c_num)
{
unsigned vendorid = 0x10de;
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8272
-gerrit
commit 2ee37923a77a509bce47b479fc329d8ac507f2d0
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sat Jan 24 13:46:46 2015 -0600
nvidia/ck804: Add ability to bypass register 0x78 initialization
On the ASUS KFSN4-DRE initializing CK804 0x78 causes an almost
immediate soft reset. Leaving the register at its power-on
default value appears to have no ill effect on that same board.
Change-Id: I833603adea580cb3f4441e35044d1e17d2d67852
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/southbridge/nvidia/ck804/early_setup_car.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index 09cbc58..8c7a308 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -154,7 +154,9 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
CK804_MB_SETUP
#endif
+#ifndef CK804_SKIP_PCI_REG_78_INIT
RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xc0ffffff, 0x19000000,
+#endif
RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe0), 0xfffffeff, 0x00000100,
RES_PORT_IO_32, ANACTRL_IO_BASE + 0x20, 0xe00fffff, 0x11000000,
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8261
-gerrit
commit ed89ca3f8613d896189ec43801f22cd0af8e644d
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Fri Jan 23 20:20:56 2015 -0600
device/device.c: Correct PCI register space location
Fix the incorrect PCI register space location causing corruption
with more than ~3.5GB physical RAM on AMD Family 10h systems.
Change-Id: I66d1bfa1e977a6b492c1909079087a801c7e6a3a
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/device/device.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/src/device/device.c b/src/device/device.c
index 00e323a..94390b7 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -13,6 +13,7 @@
* (Written by Yinghai Lu <yhlu(a)tyan.com> for Tyan)
* Copyright (C) 2005-2006 Stefan Reinauer <stepan(a)openbios.org>
* Copyright (C) 2009 Myles Watson <mylesgw(a)gmail.com>
+ * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering
*/
/*
@@ -685,6 +686,25 @@ static void constrain_resources(struct device *dev, struct constraints* limits)
}
}
+/*
+ * In this function there is a provision to shrink the potential PCI address
+ * space to the resource specified value.
+ *
+ * Without this the PCI address space attempts to reserve roughly all 32-bit
+ * addressable RAM, leading to allocation below the AMD fixed resource window
+ * instead of above it. When allocated below the fixed resource window it
+ * is not protected by the e820 map and the PCI configuration is overwritten,
+ * causing all PCI devices to become unusable!
+ *
+ * This bug is only exposed when the top of system RAM touches the bottom of
+ * the fixed resource window. If less than ~3.5GB of memory is installed there
+ * is a gap between system RAM and the fixed resource window which protects
+ * the incorrectly allocated PCI configuration registers and hides this bug.
+ *
+ * On non-AMD systems this may not matter as much, but the code below is generic
+ * and should not harm other systems.
+ */
+
static void avoid_fixed_resources(struct device *dev)
{
struct constraints limits;
@@ -712,6 +732,12 @@ static void avoid_fixed_resources(struct device *dev)
if ((res->flags & MEM_MASK) == MEM_TYPE &&
(res->limit < limits.mem.limit))
limits.mem.limit = res->limit;
+ /* Shrink PCI address space */
+ if ((res->flags & MEM_MASK) == MEM_TYPE &&
+ (res->size < (limits.mem.limit - limits.mem.base + 1))) {
+ limits.mem.base = (limits.mem.limit - res->size + 1);
+ limits.mem.size = res->size;
+ }
if ((res->flags & IO_MASK) == IO_TYPE &&
(res->limit < limits.io.limit))
limits.io.limit = res->limit;
the following patch was just integrated into master:
commit c139c42f3f37d8910893e8421bc3a665d99c8bdc
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Fri Jan 23 20:27:26 2015 -0600
northbridge/amd/amdht: Initialize variable `currentBUID`
Fix uninitialized variable when manual non-coherent BUID
selection is used.
Change-Id: Id19745b29486aef5297fdbb3324ae36bf9b8f466
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8267
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/8267 for details.
-gerrit