the following patch was just integrated into master:
commit 16de28ae92ac05dcfb3963cf72c243f6dd4ca02d
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sat Aug 16 11:06:49 2014 +0200
lenovo/x200: Remove leftover roda rk9 devices.
Change-Id: Ief3baa985cf83059255e64a8ab78cad9f8571199
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6688
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6688 for details.
-gerrit
the following patch was just integrated into master:
commit efd1c6b8dda729695ca91ecce5b7db25fa98bed1
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sat Aug 16 10:57:15 2014 +0200
gm45: Recognize 48MiB gfx UMA.
Change-Id: I33e6b357ea044d6ec00b119e84cbada7bf58317f
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6685
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6685 for details.
-gerrit
Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6689
-gerrit
commit 086dd5c6f562657ddc8d981e72f84d8621688aad
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sat Aug 16 14:18:21 2014 +0200
gm45: Declare BIOS memory as RAM.
So it's in line with other boards and those addresses are cached for faster
access.
Change-Id: I7794d75ef1e3ceea6b2a4acba01e4af5d1f005f5
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
---
src/northbridge/intel/gm45/northbridge.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 42561e4..7a4b038 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -34,14 +34,12 @@
#include "gm45.h"
#include "arch/acpi.h"
-/* Reserve everything between A segment and 1MB:
+/* Reserve segments A and B:
*
* 0xa0000 - 0xbffff: legacy VGA
- * 0xc0000 - 0xcffff: VGA OPROM (needed by kernel)
- * 0xe0000 - 0xfffff: SeaBIOS, if used, otherwise DMI
*/
static const int legacy_hole_base_k = 0xa0000 / 1024;
-static const int legacy_hole_size_k = 384;
+static const int legacy_hole_size_k = 128;
static int decode_pcie_bar(u32 *const base, u32 *const len)
{
Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6688
-gerrit
commit ed57e211870b174b22b572672ebbb99883794e5d
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sat Aug 16 11:06:49 2014 +0200
lenovo/x200: Remove leftover roda rk9 devices.
Change-Id: Ief3baa985cf83059255e64a8ab78cad9f8571199
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
---
src/mainboard/lenovo/x200/devicetree.cb | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index df94c82..285e30f 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -133,15 +133,6 @@ chip northbridge/intel/gm45
ioapic_irq 2 INTA 0x10
end
device pci 1e.0 on # PCI
- device pci 03.0 on # TI Cardbus
- ioapic_irq 2 INTA 0x10
- end
- device pci 03.1 on # TI Cardbus
- ioapic_irq 2 INTB 0x11
- end
- device pci 03.2 off end # TI FireWire OHC
- device pci 03.3 off end # unconnected FlashMedia
- device pci 03.4 off end # unconnected SD-Card
subsystemid 0x17aa 0x20f4
end
device pci 1f.0 on # LPC bridge
the following patch was just integrated into master:
commit 880101121e0cef5df3afda075809e2fbacf68ffe
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sat Aug 16 03:35:33 2014 +0200
intel/gm45: native gfx init.
Tested on lenovo X200 in both text and gfx mode.
Change-Id: I273971d0f34ca3529959d4228e9516775459b806
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6682
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6682 for details.
-gerrit
the following patch was just integrated into master:
commit 905e6f2b56c9a87418e35c8d2f2decdeb7e0b56d
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Thu Aug 14 20:23:51 2014 +0200
exynos5xx0: rename local "main" variable
Change-Id: I9a454c88c65e4e70d351f1ec781e75ba400ceb29
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6664
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6664 for details.
-gerrit