the following patch was just integrated into master:
commit b4ce4d481418807be96930b36e47408d8f95654e
Author: Furquan Shaikh <furquan(a)google.com>
Date: Thu Oct 30 11:47:20 2014 -0700
romstage: Pass .car.data as ignored section while adding romstage
We don't want segment for .car.data section to be considered while elf_to_stage
transformation is being done. Thus, use -S option for add-stage.
Change-Id: I04868c892e3aa94113189b012d284d52bacea5f0
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Reviewed-on: http://review.coreboot.org/7305
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/7305 for details.
-gerrit
the following patch was just integrated into master:
commit 405304aca34b3dab949e616486bb60a52fd5dae0
Author: Furquan Shaikh <furquan(a)google.com>
Date: Thu Oct 30 11:44:20 2014 -0700
cbfstool: Add option to ignore section in add-stage
Allow add-stage to have an optional parameter for ignoring any section. This is
required to ensure proper operation of elf_to_stage in case of loadable segments
with zero filesize.
Change-Id: I49ad62c2a4260ab9cec173c80c0f16923fc66c79
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Reviewed-on: http://review.coreboot.org/7304
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/7304 for details.
-gerrit
the following patch was just integrated into master:
commit cc6f84c4116acc81b2c51c37ab7adb426fdf491e
Author: Furquan Shaikh <furquan(a)google.com>
Date: Thu Oct 30 11:28:27 2014 -0700
cbfstool: Convert cbfs-mkstage.c into pelf
Change cbfs-mkstage to use parsed elf instead of calling elf_headers. That
allows us to have access to the complete elf including the string table.
Change-Id: Ie767d28bdf41af38d1df0bce54bc0ada45123136
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Reviewed-on: http://review.coreboot.org/7303
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/7303 for details.
-gerrit
Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7265
-gerrit
commit 2bf5f72e07b0ba1635e3394a1592fcc5d84a9716
Author: Furquan Shaikh <furquan(a)google.com>
Date: Fri Apr 11 14:57:11 2014 -0700
ipq806x: Typecast address to void * in read/write operations
Typecast address to void* to accomodate address being passed as integers
BUG=None
BRANCH=None
TEST=Compiled successfully
Original-Change-Id: Iceb51056c8a30a9a9dbd0594f75c23000faa6120
Original-Reviewed-on: https://chromium-review.googlesource.com/194365
Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
(cherry picked from commit abf9b1e77b8a078e6ed873cbf34246bd97c81e98)
Signed-off-by: Marc Jones <marc.jones(a)se-eng.com>
Change-Id: I1806e96e194e936975a43e95b9fd7d7458ef1653
---
src/soc/qualcomm/ipq806x/include/iomap.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h
index 514c6a7..a7066af 100644
--- a/src/soc/qualcomm/ipq806x/include/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/iomap.h
@@ -37,6 +37,15 @@
#define _PLATFORM_MSM8960_IOMAP_H_
#include <configs/ipq806x_cdp.h>
+
+/* Typecast to allow integers being passed as address
+ This needs to be included because vendor code is not compliant with our
+ macros for read/write. Hence, special macros for readl_i and writel_i are
+ included to do this in one place for all occurrences in vendor code
+ */
+#define readl_i(a) read32((const void *)(a))
+#define writel_i(v,a) write32(v,(void *)a)
+
#define MSM_CLK_CTL_BASE 0x00900000
#define MSM_TMR_BASE 0x0200A000
Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7267
-gerrit
commit 81b5388369717eacceef0e4d2b5f7b67aaa50acc
Author: Vadim Bendebury <vbendeb(a)chromium.org>
Date: Tue Apr 15 14:42:30 2014 -0700
Use sbl blobs from a private location
The sbl blobs could not yet be published, they have been moved to a
private location. Update coreboot to pick up the blobs at the correct
place.
BRANCH=None
CQ-DEPEND=CL:195003
BUG=chrome-os-partner:28059
TEST=manual
$ emerge-storm coreboot succeeds
Original-Change-Id: I8c4163bc978307e41c156ef9f7f2a211d57db7a8
Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/194997
Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
(cherry picked from commit 1a1848b00acfc2f58990559e824ea9c13c3c239c)
Signed-off-by: Marc Jones <marc.jones(a)se-eng.com>
Change-Id: If597ebbfd348039d578c99cd7a8e3c4bcbf60c10
---
src/soc/qualcomm/ipq806x/Makefile.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 33bd763..002e59c 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -22,7 +22,7 @@ $(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw
@mv $@.tmp $@
# Create a complete bootblock which will start up the system
-$(objcbfs)/bootblock.bin: ./$(call strip_quotes,$(CONFIG_SBL_BLOB)) \
+$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \
$(objcbfs)/bootblock.mbn
@printf " CAT $(subst $(obj)/,,$(@))\n"
@cat $^ > $@.tmp
Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7268
-gerrit
commit cb3f6296177a988c3449a23930af43e4277cbedd
Author: Vadim Bendebury <vbendeb(a)chromium.org>
Date: Mon Apr 21 18:53:47 2014 -0700
ipq8064: Configure proper bootblock stack and load address
The SBL3 currently seems to be preventing the bootblock from being
loaded into the IMEM. As a temporary measure, map bootblock into DRAM
(as it is available after SBL2 finished running) and specify the
correct stack space.
BUG=chrome-os-partner:27784
TEST=not much testing yet, just verify 'emerge-storm coreboot' still succeeds.
Original-Change-Id: Ibe9d4911ad22ada1bbd01af54a2ef80009df3a28
Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196168
Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
(cherry picked from commit 950323d6091c3b795034c24a08b6c176f56f0e0f)
Signed-off-by: Marc Jones <marc.jones(a)se-eng.com>
Change-Id: Ib3ec21f2cb4058b3e3cc82864de89dadf3b6aa84
---
src/soc/qualcomm/ipq806x/Kconfig | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 88dbd36..03be33a 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -35,6 +35,14 @@ config SBL_BLOB
config BOOTBLOCK_BASE
hex "256K bytes left for TZBSP"
- default 0x2a040000
+ default 0x40600000
+
+config STACK_TOP
+ hex
+ default 0x40600000
+
+config STACK_BOTTOM
+ hex
+ default 0x405fc000
endif
Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7269
-gerrit
commit 8dd194040de81962ba4b6a1265268a49420a1ed8
Author: Vadim Bendebury <vbendeb(a)chromium.org>
Date: Wed Apr 9 19:23:04 2014 -0700
ipq8064: Make timer code compile
Commment out nonessential timer services and modify the source code to
cleanly build in coeboot environment. Do not remove dead code just
yet, these functions might be necessary later.
Need to rename the soc timer.h to prevent collisions with timer.h in
the top level include directory.
Currently build timer code for ramstage only.
BUG=chrome-os-partner:27784
TEST='emerge-storm coreboot' still succeeds
Original-Change-Id: Ib10133ccb42697840708845a8ea6d75ceeaeb3d5
Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/194067
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
(cherry picked from commit 987ce95220953c16216d1e1d70d5a941d05fc9bc)
Signed-off-by: Marc Jones <marc.jones(a)se-eng.com>
Change-Id: Ia9cf175da11c70709354def5e51bf79df4fda2fe
---
src/soc/qualcomm/ipq806x/Makefile.inc | 1 +
src/soc/qualcomm/ipq806x/cbfs.c | 9 ------
src/soc/qualcomm/ipq806x/include/cdp.h | 40 +++++++++++++++++-------
src/soc/qualcomm/ipq806x/include/iomap.h | 4 ++-
src/soc/qualcomm/ipq806x/include/ipq_timer.h | 40 ++++++++++++++++++++++++
src/soc/qualcomm/ipq806x/include/timer.h | 40 ------------------------
src/soc/qualcomm/ipq806x/timer.c | 46 ++++++++++++----------------
7 files changed, 93 insertions(+), 87 deletions(-)
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 002e59c..41cde31 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -6,6 +6,7 @@ romstage-y += gpio.c
ramstage-y += cbfs.c
ramstage-y += gpio.c
+ramstage-y += timer.c
ifeq ($(CONFIG_USE_BLOBS),y)
diff --git a/src/soc/qualcomm/ipq806x/cbfs.c b/src/soc/qualcomm/ipq806x/cbfs.c
index eec9b73..97ae548 100644
--- a/src/soc/qualcomm/ipq806x/cbfs.c
+++ b/src/soc/qualcomm/ipq806x/cbfs.c
@@ -24,12 +24,3 @@ int init_default_cbfs_media(struct cbfs_media *media)
{
return 0;
}
-
-/*
- * Temporary change to make sure storm code still builds. Will be dropped
- * shortly.
- */
-#include <delay.h> /* This driver serves as a CBFS media source. */
-void init_timer(void)
-{
-}
diff --git a/src/soc/qualcomm/ipq806x/include/cdp.h b/src/soc/qualcomm/ipq806x/include/cdp.h
index 4ae476a..22ba192 100644
--- a/src/soc/qualcomm/ipq806x/include/cdp.h
+++ b/src/soc/qualcomm/ipq806x/include/cdp.h
@@ -4,9 +4,23 @@
#ifndef _IPQ806X_CDP_H_
#define _IPQ806X_CDP_H_
-#include <phy.h>
+unsigned smem_get_board_machtype(void);
-unsigned int smem_get_board_machtype(void);
+typedef enum {
+ PHY_INTERFACE_MODE_MII,
+ PHY_INTERFACE_MODE_GMII,
+ PHY_INTERFACE_MODE_SGMII,
+ PHY_INTERFACE_MODE_QSGMII,
+ PHY_INTERFACE_MODE_TBI,
+ PHY_INTERFACE_MODE_RMII,
+ PHY_INTERFACE_MODE_RGMII,
+ PHY_INTERFACE_MODE_RGMII_ID,
+ PHY_INTERFACE_MODE_RGMII_RXID,
+ PHY_INTERFACE_MODE_RGMII_TXID,
+ PHY_INTERFACE_MODE_RTBI,
+ PHY_INTERFACE_MODE_XGMII,
+ PHY_INTERFACE_MODE_NONE /* Must be last */
+} phy_interface_t;
typedef struct {
unsigned int gpio;
@@ -73,17 +87,17 @@ typedef struct {
} spinorflash_params_t;
typedef struct {
- uint count;
- u8 addr[7];
+ unsigned count;
+ uint8_t addr[7];
} ipq_gmac_phy_addr_t;
typedef struct {
- uint base;
+ unsigned base;
int unit;
- uint is_macsec;
- uint mac_pwr0;
- uint mac_pwr1;
- uint mac_conn_to_phy;
+ unsigned is_macsec;
+ unsigned mac_pwr0;
+ unsigned mac_pwr1;
+ unsigned mac_conn_to_phy;
phy_interface_t phy;
ipq_gmac_phy_addr_t phy_addr;
} ipq_gmac_board_cfg_t;
@@ -98,6 +112,7 @@ typedef struct {
unsigned int uart_gsbi_base;
unsigned int uart_dm_base;
unsigned int clk_dummy;
+#if 0
uart_clk_mnd_t mnd_value;
unsigned int gmac_gpio_count;
gpio_func_data_t *gmac_gpio;
@@ -105,10 +120,12 @@ typedef struct {
flash_desc flashdesc;
spinorflash_params_t flash_param;
gpio_func_data_t dbg_uart_gpio[NO_OF_DBG_UART_GPIOS];
+#endif
} __attribute__ ((__packed__)) board_ipq806x_params_t;
extern board_ipq806x_params_t *gboard_param;
+#if 0
static inline int gmac_cfg_is_valid(ipq_gmac_board_cfg_t *cfg)
{
/*
@@ -121,7 +138,8 @@ static inline int gmac_cfg_is_valid(ipq_gmac_board_cfg_t *cfg)
(cfg < &gboard_param->gmac_cfg[IPQ_GMAC_NMACS]) &&
(cfg->unit >= 0) && (cfg->unit < IPQ_GMAC_NMACS));
}
+#endif
-unsigned int get_board_index(unsigned int machid);
-void ipq_configure_gpio(gpio_func_data_t *gpio, uint count);
+unsigned int get_board_index(unsigned machid);
+void ipq_configure_gpio(gpio_func_data_t *gpio, unsigned count);
#endif
diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h
index 5fcfde9..8642410 100644
--- a/src/soc/qualcomm/ipq806x/include/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/iomap.h
@@ -43,6 +43,8 @@
*/
#define readl_i(a) read32((const void *)(a))
#define writel_i(v,a) write32(v,(void *)a)
+#include <arch/io.h>
+#include <cdp.h>
#define MSM_CLK_CTL_BASE 0x00900000
@@ -50,7 +52,7 @@
#define MSM_GPT_BASE (MSM_TMR_BASE + 0x04)
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
-#define GPT_REG(off) (MSM_GPT_BASE + (off))
+#define GPT_REG(off) (((uint8_t *)(MSM_GPT_BASE)) + (off))
#define DGT_REG(off) (MSM_DGT_BASE + (off))
#define APCS_WDT0_EN (MSM_TMR_BASE + 0x0040)
diff --git a/src/soc/qualcomm/ipq806x/include/ipq_timer.h b/src/soc/qualcomm/ipq806x/include/ipq_timer.h
new file mode 100644
index 0000000..4e1ef34
--- /dev/null
+++ b/src/soc/qualcomm/ipq806x/include/ipq_timer.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#define TIMER_LOAD_VAL 0x21
+
+#define GPT_ENABLE_CLR_ON_MATCH_EN 2
+#define GPT_ENABLE_EN 1
+#define DGT_ENABLE_CLR_ON_MATCH_EN 2
+#define DGT_ENABLE_EN 1
+
+#define SPSS_TIMER_STATUS_DGT_EN (1 << 0)
+
+
diff --git a/src/soc/qualcomm/ipq806x/include/timer.h b/src/soc/qualcomm/ipq806x/include/timer.h
deleted file mode 100644
index 4e1ef34..0000000
--- a/src/soc/qualcomm/ipq806x/include/timer.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Google, Inc. nor the names of its contributors
- * may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#define TIMER_LOAD_VAL 0x21
-
-#define GPT_ENABLE_CLR_ON_MATCH_EN 2
-#define GPT_ENABLE_EN 1
-#define DGT_ENABLE_CLR_ON_MATCH_EN 2
-#define DGT_ENABLE_EN 1
-
-#define SPSS_TIMER_STATUS_DGT_EN (1 << 0)
-
-
diff --git a/src/soc/qualcomm/ipq806x/timer.c b/src/soc/qualcomm/ipq806x/timer.c
index 691ccbd..5c0dcb2 100644
--- a/src/soc/qualcomm/ipq806x/timer.c
+++ b/src/soc/qualcomm/ipq806x/timer.c
@@ -31,14 +31,10 @@
* SUCH DAMAGE.
*/
-#include <asm/arch-ipq806x/iomap.h>
-#include <asm/io.h>
-#include <common.h>
-#include <asm/types.h>
-#include <asm/arch-ipq806x/timer.h>
-
-static ulong timestamp;
-static ulong lastinc;
+#include <delay.h>
+#include <iomap.h>
+#include <ipq_timer.h>
+#include <timer.h>
#define GPT_FREQ_KHZ 32
#define GPT_FREQ (GPT_FREQ_KHZ * 1000) /* 32 KHz */
@@ -46,36 +42,24 @@ static ulong lastinc;
/**
* timer_init - initialize timer
*/
-int timer_init(void)
+void init_timer(void)
{
writel(0, GPT_ENABLE);
writel(GPT_ENABLE_EN, GPT_ENABLE);
- return 0;
-}
-
-/**
- * get_timer - returns time lapsed
- * @base: base/start time
- *
- * Returns time lapsed, since the specified base time value.
- */
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
}
/**
- * __udelay - generates micro second delay.
+ * udelay - generates micro second delay.
* @usec: delay duration in microseconds
*
* With 32KHz clock, minimum possible delay is 31.25 Micro seconds and
* its multiples. In Rumi GPT clock is 32 KHz
*/
-void __udelay(unsigned long usec)
+void udelay(unsigned usec)
{
- unsigned int val;
- ulong now, last;
- ulong runcount;
+ unsigned val;
+ unsigned now, last;
+ unsigned runcount;
usec = (usec + GPT_FREQ_KHZ - 1) / GPT_FREQ_KHZ;
last = readl(GPT_COUNT_VAL);
@@ -92,6 +76,15 @@ void __udelay(unsigned long usec)
} while (runcount < val);
}
+#if 0
+
+/*
+ * TODO(vbendeb) clean it up later.
+ * Compile out the below code but leave it for now in case it will become
+ * necessary later in order to make the platform fully functional.
+ */
+static unsigned long timestamp;
+static unsigned long lastinc;
inline ulong gpt_to_sys_freq(unsigned int gpt)
{
@@ -137,3 +130,4 @@ ulong get_tbclk(void)
{
return GPT_FREQ;
}
+#endif