the following patch was just integrated into master:
commit 3b9c81573ec5a3ae7fa100833ef807548db2cd32
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Mon Jan 20 18:04:14 2014 -0600
nb/sandybridge: Move MRC cache above mrc.bin
This small change greatly reduces CBFS fragmentation. There is now a
small gap of only 728 bytes between mrc.bin and mrc.cache, with the
64 KiB alignment maintained for mrc.cache -- assuming systemagent-r6
is used. The gap was just under 64 KiB before.
With this change, it is easier to accommodate fallback and normal
boot stages without having to manually place the stages in the highly
fragmented CBFS.
Change-Id: Ia2340c1928ed6e232949e053d1943c2f5737f741
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
See http://review.coreboot.org/4763 for details.
-gerrit
the following patch was just integrated into master:
commit a74dd04aa37151c9f4e794860187e0539f8e1277
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Jan 21 03:09:14 2014 +0100
asrock/e350m1/board_info.txt: Specify ROM socket and Flashrom support.
Based on info by Kevin O'Connor.
Change-Id: I21d447fec976e0ee967ba64b0f506c97c22917a3
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
See http://review.coreboot.org/4765 for details.
-gerrit
the following patch was just integrated into master:
commit 18fae998e4cef652d33b716ab021710a46e9a502
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Jan 20 20:43:25 2014 +0100
asus/a8n-e/board_info.txt: Set ROM Protocol.
Change-Id: I65f2faee672d4d7dea50b67cf6426f503034b380
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
See http://review.coreboot.org/4760 for details.
-gerrit
Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4784
-gerrit
commit 3b46d8eb676a258012054195f124c504c20eed0c
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Thu Jan 23 22:12:25 2014 +1100
superio/fintek: Add initial support for Fintek F71869AD
Data-sheet can be found here:
http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf
Change-Id: I41f1ee20517dd179a4dee914ab7f6332739e326e
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
---
src/superio/fintek/Kconfig | 2 +
src/superio/fintek/Makefile.inc | 1 +
src/superio/fintek/f71869ad/Makefile.inc | 21 +++++
src/superio/fintek/f71869ad/chip.h | 33 ++++++++
src/superio/fintek/f71869ad/f71869ad.h | 35 ++++++++
.../fintek/f71869ad/f71869ad_early_serial.c | 67 +++++++++++++++
src/superio/fintek/f71869ad/superio.c | 95 ++++++++++++++++++++++
7 files changed, 254 insertions(+)
diff --git a/src/superio/fintek/Kconfig b/src/superio/fintek/Kconfig
index 67d2847..938494a 100644
--- a/src/superio/fintek/Kconfig
+++ b/src/superio/fintek/Kconfig
@@ -23,6 +23,8 @@ config SUPERIO_FINTEK_F71859
bool
config SUPERIO_FINTEK_F71863FG
bool
+config SUPERIO_FINTEK_F71869AD
+ bool
config SUPERIO_FINTEK_F71872
bool
config SUPERIO_FINTEK_F71889
diff --git a/src/superio/fintek/Makefile.inc b/src/superio/fintek/Makefile.inc
index 036bb2d..541a893 100644
--- a/src/superio/fintek/Makefile.inc
+++ b/src/superio/fintek/Makefile.inc
@@ -20,6 +20,7 @@
subdirs-y += f71805f
subdirs-y += f71859
subdirs-y += f71863fg
+subdirs-y += f71869ad
subdirs-y += f71872
subdirs-y += f71889
subdirs-y += f81865f
diff --git a/src/superio/fintek/f71869ad/Makefile.inc b/src/superio/fintek/f71869ad/Makefile.inc
new file mode 100644
index 0000000..117239a
--- /dev/null
+++ b/src/superio/fintek/f71869ad/Makefile.inc
@@ -0,0 +1,21 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_SUPERIO_FINTEK_F71869AD) += superio.c
diff --git a/src/superio/fintek/f71869ad/chip.h b/src/superio/fintek/f71869ad/chip.h
new file mode 100644
index 0000000..43721ee
--- /dev/null
+++ b/src/superio/fintek/f71869ad/chip.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_FINTEK_F71869AD_CHIPH_H
+#define SUPERIO_FINTEK_F71869AD_CHIPH_H
+
+#include <pc80/keyboard.h>
+#include <device/device.h>
+#include <uart8250.h>
+
+struct superio_fintek_f71869ad_config {
+
+ struct pc_keyboard keyboard;
+};
+
+#endif /* SUPERIO_FINTEK_F71869AD_CHIPH_H */
diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
new file mode 100644
index 0000000..78452d4
--- /dev/null
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_FINTEK_F71869AD_F71869AD_H
+#define SUPERIO_FINTEK_F71869AD_F71869AD_H
+
+/* Logical Device Numbers (LDN). */
+#define F71869AD_FDC 0x00 /* Floppy */
+#define F71869AD_SP1 0x01 /* UART1 */
+#define F71869AD_SP2 0x02 /* UART2 */
+#define F71869AD_PP 0x03 /* Parallel port */
+#define F71869AD_HWM 0x04 /* Hardware monitor */
+#define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */
+#define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */
+#define F71869AD_BSEL 0x07 /* BSEL */
+#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
+
+#endif /* SUPERIO_FINTEK_F71869AD_F71869AD_H */
diff --git a/src/superio/fintek/f71869ad/f71869ad_early_serial.c b/src/superio/fintek/f71869ad/f71869ad_early_serial.c
new file mode 100644
index 0000000..329441b
--- /dev/null
+++ b/src/superio/fintek/f71869ad/f71869ad_early_serial.c
@@ -0,0 +1,67 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * Pre-RAM driver for the Fintek F71869AD Super I/O chip.
+ *
+ * Derived from p.34 in vendor data-sheet:
+ *
+ * - default index port : 0x4E
+ * - default data port : 0x4F
+ *
+ * - enable configuration : 0x87
+ * - disable configuration : 0xAA
+ *
+ */
+
+#include <arch/io.h>
+#include "f71869ad.h"
+
+/*
+ * Enable configuration: pass entry key '0x87' into index port dev.
+ */
+static void pnp_enter_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(0x87, port);
+ outb(0x87, port);
+}
+
+/*
+ * Disable configuration: pass exit key '0xAA' into index port dev.
+ */
+static void pnp_exit_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(0xaa, port);
+}
+
+/*
+ * Bring up early serial debugging output before the RAM is initialized.
+ */
+static void f71869ad_enable_serial(device_t dev, u16 iobase)
+{
+ pnp_enter_conf_state(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_enable(dev, 1);
+ pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c
new file mode 100644
index 0000000..c20aff9
--- /dev/null
+++ b/src/superio/fintek/f71869ad/superio.c
@@ -0,0 +1,95 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <console/console.h>
+#include <stdlib.h>
+#include <uart8250.h>
+
+#include "chip.h"
+#include "f71869ad.h"
+
+static void f71869ad_init(device_t dev)
+{
+ struct superio_fintek_f71869ad_config *conf = dev->chip_info;
+
+ if (!dev->enabled)
+ return;
+
+ switch(dev->path.pnp.device) {
+ /* TODO: Might potentially need code for HWM or FDC etc. */
+ case F71869AD_KBC:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ pc_keyboard_init(&conf->keyboard);
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = f71869ad_init,
+ .ops_pnp_mode = &pnp_conf_mode_8787_aa,
+};
+
+/*
+ * io_info contains the mask 0x07f8. Given 16 register, each 8 bits wide of a
+ * logical device we need a mask of the following form:
+ *
+ * MSB LSB
+ * v v
+ * 0x[15..11][10..3][2..0]
+ * ------ ^^^^^ ^^^^
+ * null | |
+ * | +------ Register index
+ * |
+ * +------------- Compare against base address and
+ * asserts a chip_select on match.
+ *
+ * i.e., 0x07F8 = [00000][11111111][000]
+ *
+ * XXX: verify flags and masks are correct.
+ */
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
+ { &ops, F71869AD_GPIO, },
+ { &ops, F71869AD_BSEL, PNP_IO0, {0x07f8, 0}, },
+ { &ops, F71869AD_PME, },
+};
+
+static void enable_dev(device_t dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_fintek_f71869ad_ops = {
+ CHIP_NAME("Fintek F71869AD Super I/O")
+ .enable_dev = enable_dev
+};
the following patch was just integrated into master:
commit 4b7941332829cc3fddbfba3b939ee75e4930cf05
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Tue Jan 21 15:28:38 2014 -0600
cbfstool: correct size left calculation for "empty" entries
After removing a file sandwiched between two other files, that file
could no longer be re-added at the same location. cbfstool tried to
add the file, and a new "empty" entry, which, together, would no
longer fit, so it continued checking for the next available space.
Change the behavior to add the file if there is enough space for the
file alone, then only add the "empty" entry if there is enough space
for it.
Change-Id: Iad3897dd28cf12f12ae877cfd83e1990fa7d2f0f
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
See http://review.coreboot.org/4772 for details.
-gerrit