Jacob Creedon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
flashchips: Add missing N25Q/MT25Q 1.8v variants
This adds missing 1.8v variants for the 256Mb and 512Mb capacities for N25Q and MT25Q devices. Only the MT25QU512 has been tested in hardware, all other variants added are marked as untested.
Signed-off-by: Jacob Creedon jcreedon@google.com Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e --- M flashchips.c 1 file changed, 178 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/34491/1
diff --git a/flashchips.c b/flashchips.c index d25f7a2..5424a04 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10545,6 +10545,46 @@
{ .vendor = "Micron/Numonyx/ST", + .name = "N25Q256..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__1E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10585,6 +10625,46 @@
{ .vendor = "Micron/Numonyx/ST", + .name = "N25Q512..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__1E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", .name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10674,6 +10754,55 @@
{ .vendor = "Micron", + .name = "MT25QU256", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__1E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", .name = "MT25QL512", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10722,6 +10851,55 @@ },
{ + .vendor = "Micron", + .name = "MT25QU512", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__1E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { .vendor = "MoselVitelic", .name = "V29C51000B", .bustype = BUS_PARALLEL,
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/34491
to look at the new patch set (#2).
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
flashchips: Add missing N25Q/MT25Q 1.8v variants
This adds missing 1.8v variants for the 256Mb and 512Mb capacities for N25Q and MT25Q devices. Only the MT25QU512 has been tested in hardware, all other variants added are marked as untested.
Signed-off-by: Jacob Creedon jcreedon@google.com Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e --- M flashchips.c 1 file changed, 178 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/34491/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/34491
to look at the new patch set (#3).
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
flashchips: Add missing N25Q/MT25Q 1.8v variants
This adds missing 1.8v variants for the 256Mb and 512Mb capacities for N25Q and MT25Q devices. Only the MT25QU512 has been tested in hardware, all other variants added are marked as untested.
Signed-off-by: Jacob Creedon jcreedon@google.com Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e --- M flashchips.c 1 file changed, 178 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/34491/3
Jacob Creedon has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
Patch Set 5:
Bumping this for review.
David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
Patch Set 5: Code-Review-1
(2 comments)
Thanks for doing this, however I spotted a small issue with the Numonyx 512mbit part that should be addressed.
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c File flashchips.c:
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c@10628 PS5, Line 10628: 1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ This is not quite right - The suffix on 512mbit parts should be 1G for 1.8V, uniform sectors. For example: https://www.micron.com/products/nor-flash/serial-nor-flash/part-catalog/n25q...
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c@10631 PS5, Line 10631: 1E Not your fault, but this should be 1G.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
Patch Set 5: Code-Review+1
Once David's comments are addresses these look good to me.
Jacob Creedon has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c File flashchips.c:
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c@10628 PS5, Line 10628: 1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */
This is not quite right - The suffix on 512mbit parts should be 1G for 1.8V, uniform sectors. […]
This is fixed later in the patch stack: https://review.coreboot.org/c/flashrom/+/34520/4 as I noticed the error later in my development process. We could rebase/reorder/squash it if you want, but this has been wrong for so long and it doesn't impact any functional behavior that I just left it as is and let the commits reflect the changes atomically.
https://review.coreboot.org/c/flashrom/+/34491/5/flashchips.c@10631 PS5, Line 10631: 1E
Not your fault, but this should be 1G.
See above.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q 1.8v variants ......................................................................
Patch Set 5:
Please squash, there is no need for separate fixups for unmerged commits.
Hello Edward O'Callaghan, David Hendricks, Alan Green, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/34491
to look at the new patch set (#6).
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
flashchips: Add missing N25Q/MT25Q variants
This adds missing voltage and capacity variants for N25Q and MT25Q series devices. This also fixes a typo in some model numbers where the last letter should have been a G instead of an E. Added devices include:
N25Q256..1E N25Q512..1G N25Q00A..1G N25Q00A..3G MT25QU128 MT25QL128 MT25QU256 MT25QU512 tested by Jacob Creedon jcreedon@google.com MT25QL01G tested by Konstantin Grudnev grudnevkv@gmail.com MT25QU01G MT25QL02G MT25QU02G
Two have been tested as indicated, all other variants added are marked untested.
Signed-off-by: Jacob Creedon jcreedon@google.com Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e --- M flashchips.c M flashchips.h 2 files changed, 535 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/34491/6
Jacob Creedon has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
Patch Set 6:
I went ahead and squashed it all down. This should be ready to go.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
Patch Set 6: Code-Review+2
Jacob Creedon has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
Patch Set 7:
Is there anything else I need to do for this to get merged?
David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
Patch Set 7:
Patch Set 7:
Is there anything else I need to do for this to get merged?
Nope, looks good to me. And thanks for the friendly nudge!
David Hendricks has submitted this change. ( https://review.coreboot.org/c/flashrom/+/34491 )
Change subject: flashchips: Add missing N25Q/MT25Q variants ......................................................................
flashchips: Add missing N25Q/MT25Q variants
This adds missing voltage and capacity variants for N25Q and MT25Q series devices. This also fixes a typo in some model numbers where the last letter should have been a G instead of an E. Added devices include:
N25Q256..1E N25Q512..1G N25Q00A..1G N25Q00A..3G MT25QU128 MT25QL128 MT25QU256 MT25QU512 tested by Jacob Creedon jcreedon@google.com MT25QL01G tested by Konstantin Grudnev grudnevkv@gmail.com MT25QU01G MT25QL02G MT25QU02G
Two have been tested as indicated, all other variants added are marked untested.
Signed-off-by: Jacob Creedon jcreedon@google.com Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e Reviewed-on: https://review.coreboot.org/c/flashrom/+/34491 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org --- M flashchips.c M flashchips.h 2 files changed, 535 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved
diff --git a/flashchips.c b/flashchips.c index e487956..517289a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10351,6 +10351,86 @@
{ .vendor = "Micron/Numonyx/ST", + .name = "N25Q00A..1G", /* ..1G = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__1G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", + .name = "N25Q00A..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__3G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron/Numonyx/ST", .name = "N25Q016", .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10592,6 +10672,46 @@
{ .vendor = "Micron/Numonyx/ST", + .name = "N25Q256..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__1E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10632,10 +10752,50 @@
{ .vendor = "Micron/Numonyx/ST", - .name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .name = "N25Q512..1G", /* ..1G = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__3E, + .model_id = ST_N25Q512__1G, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 2} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", + .name = "N25Q512..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__3G, .total_size = 65536, .page_size = 256, /* supports SFDP */ @@ -10672,6 +10832,270 @@
{ .vendor = "Micron", + .name = "MT25QL01G", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__3G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 2} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "MT25QU01G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__1G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 2} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QL02G", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_MT25QL02G, + .total_size = 262144, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "MT25QU02G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_MT25QU02G, + .total_size = 262144, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QU128", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__1E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QL128", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__3E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", .name = "MT25QL256", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10721,10 +11145,59 @@
{ .vendor = "Micron", + .name = "MT25QU256", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__1E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", .name = "MT25QL512", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__3E, + .model_id = ST_N25Q512__3G, .total_size = 65536, .page_size = 256, /* supports SFDP */ @@ -10769,6 +11242,55 @@ },
{ + .vendor = "Micron", + .name = "MT25QU512", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__1G, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { .vendor = "MoselVitelic", .name = "V29C51000B", .bustype = BUS_PARALLEL, diff --git a/flashchips.h b/flashchips.h index 88816c4..5ef7f9c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -866,13 +866,16 @@ #define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ #define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ #define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ -#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */ -#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */ -#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */ -#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */ -#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */ -#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */ -#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128__3E 0xBA18 /* N25Q128/MT25QL128, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128__1E 0xBB18 /* N25Q128/MT25QU128, 1.8V, (uniform sectors expected) */ +#define ST_N25Q256__3E 0xBA19 /* N25Q256/MT25QL256, 3.0V, (uniform sectors expected) */ +#define ST_N25Q256__1E 0xBB19 /* N25Q256/MT25QU256, 1.8V, (uniform sectors expected) */ +#define ST_N25Q512__3G 0xBA20 /* N25Q512/MT25QL512, 3.0V, (uniform sectors expected) */ +#define ST_N25Q512__1G 0xBB20 /* N25Q512/MT25QU512, 1.8V, (uniform sectors expected) */ +#define ST_N25Q00A__3G 0xBA21 /* N25Q00A/MT25QL01G, 3.0V, (uniform sectors expected) */ +#define ST_N25Q00A__1G 0xBB21 /* N25Q00A/MT25QU01G, 1.8V, (uniform sectors expected) */ +#define ST_MT25QL02G 0xBA22 /* MT25QL02G, 3.0V, (uniform sectors expected) */ +#define ST_MT25QU02G 0xBB22 /* MT25QU02G, 1.8V, (uniform sectors expected) */ #define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */ #define ST_NP5Q064 0xDA17 /* Phase-change memory (PCM), 3V */ #define ST_NP5Q128 0xDA18 /* Phase-change memory (PCM), 3V */
-
David Hendricks (Code Review) -
Edward O'Callaghan (Code Review)
-
Jacob Creedon (Code Review)
-
Nico Huber (Code Review)