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Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake
......................................................................
Patch Set 1:
(2 comments)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/81357/comment/5a064777_d8989c4c :
PS1, Line 1848: case CHIPSET_METEOR_LAKE:
this might increase the maintenance burden going forward ? for example: we need to add PTL, WCL etc. etc. platform going forward.
can we add `CHIPSET_METEOR_LAKE` as last entry for now inside `ich_chipset` and then update this logic something like this:
```
if (ich_generation >= CHIPSET_METEOR_LAKE) {
/*
* Starting from Meteor Lake, we need to fetch the region
* read/write access permissions from the BIOS_BM registers
* because we need to support FREG9 or above.
*/
*region_read_access = mmio_readw(ich_spibar + ICH_REG_BIOS_BM_RAP);
*region_write_access = mmio_readw(ich_spibar + ICH_REG_BIOS_BM_WAP);
} else {
/*
* FRAP - Flash Regions Access Permissions Register
* Bit Descriptions:
* 31:24 BIOS Master Write Access Grant (BMWAG)
* 23:16 BIOS Master Read Access Grant (BMRAG)
* 15:8 BIOS Region Write Access (BRWA)
* 7:0 BIOS Region Read Access (BRRA)
*/
tmp = mmio_readl(ich_spibar + ICH9_REG_FRAP);
msg_pdbg("0x50: 0x%08"PRIx32" (FRAP)\n", tmp);
msg_pdbg("BMWAG 0x%02"PRIx32", ", ICH_BMWAG(tmp));
msg_pdbg("BMRAG 0x%02"PRIx32", ", ICH_BMRAG(tmp));
msg_pdbg("BRWA 0x%02"PRIx32", ", ICH_BRWA(tmp));
msg_pdbg("BRRA 0x%02"PRIx32"\n", ICH_BRRA(tmp));
*region_read_access = ICH_BRRA(tmp);
*region_write_access = ICH_BRWA(tmp);
}
```
https://review.coreboot.org/c/flashrom/+/81357/comment/1cb978df_fa7bff41 :
PS1, Line 2236: ich9_handle_frap
isn't `ich9_handle_frap` function takes only takes 3 arguments ?
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Change subject: Add support for Idaville HCC platform and iRC regions
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Hi Pual
Can you help review this code change?
Thanks
Kevin Yu
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Change subject: Add support for Idaville HCC platform and iRC regions
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: flashchips: Add Macronix Flash EPN support
......................................................................
Abandoned
need modify the source code
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Change subject: cli_common: Add link to the documentation how to mark chip tested
......................................................................
Patch Set 1: Code-Review+2
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Change subject: cli_common: Add link to the documentation how to mark chip tested
......................................................................
cli_common: Add link to the documentation how to mark chip tested
Perhaps some of the users will be able to follow the instructions
and send a patch to mark chip as tested. The option to send report
to the mailing list remains available as before.
Change-Id: I36105725058f2fecb82408c369b70b3324502ece
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M cli_common.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/81266/1
diff --git a/cli_common.c b/cli_common.c
index 5373585..afcd1f3 100644
--- a/cli_common.c
+++ b/cli_common.c
@@ -80,6 +80,8 @@
"work correctly for you with this flash chip. Please include the flashrom log\n"
"file for all operations you tested (see the man page for details), and mention\n"
"which mainboard or programmer you tested in the subject line.\n"
+ "You can also try to follow the instructions here:\n"
+ "https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html\n"
"Thanks for your help!\n");
}
}
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Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build
......................................................................
Patch Set 1: Code-Review+2
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