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Change subject: hwaccess_x86_io: Fix Android compilation with bionic libc
......................................................................
Patch Set 2: Code-Review+2
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ZhiYuanNJ has posted comments on this change by ZhiYuanNJ. ( https://review.coreboot.org/c/flashrom/+/82776?usp=email )
Change subject: ch347_spi: Add spi clock frequency selection
......................................................................
Patch Set 6:
(2 comments)
File ch347_spi.c:
https://review.coreboot.org/c/flashrom/+/82776/comment/986e4c31_e185e639?us… :
PS5, Line 290: int index = 0;
> I just noticed this when testing your patch. […]
When the clock is set error, index=1, set default 30MHz clock.
https://review.coreboot.org/c/flashrom/+/82776/comment/7e87825b_f26dae2e?us… :
PS5, Line 370: msg_pinfo("CH347 SPI clock set to %s.\n", spispeeds[index].name);
> If the spispeed parameter is invalid, `index` is 8 here, so this prints out `CH347 SPI clock set to […]
Done
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Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83131?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: print.c: Print B (block-protect) test status of the chips
......................................................................
print.c: Print B (block-protect) test status of the chips
This also expands the column for test status by 1 more char, since
now maximum status is longer, PREWB vs PREW.
print.c runs when command line option `flashrom -L` is invoked.
Change-Id: If697fe3ba93dbe34bb8f7a9a4b1686fdb8b3ee58
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83131
Reviewed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M print.c
1 file changed, 13 insertions(+), 3 deletions(-)
Approvals:
Sergii Dmytruk: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/print.c b/print.c
index 015f4a8..892471d 100644
--- a/print.c
+++ b/print.c
@@ -122,7 +122,7 @@
for (i = strlen("Device"); i < maxchiplen; i++)
msg_ginfo(" ");
- msg_ginfo("Test");
+ msg_ginfo("Test ");
for (i = 0; i < border; i++)
msg_ginfo(" ");
msg_ginfo("Known");
@@ -140,7 +140,7 @@
for (i = 0; i < maxvendorlen + maxchiplen; i++)
msg_ginfo(" ");
- msg_ginfo("OK ");
+ msg_ginfo("OK ");
for (i = 0; i < border; i++)
msg_ginfo(" ");
msg_ginfo("Broken");
@@ -151,7 +151,7 @@
msg_ginfo(" ");
msg_gdbg("range [V]");
msg_ginfo("\n\n");
- msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE, - = N/A)\n\n");
+ msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE, B = block-protect, - = N/A)\n\n");
for (chip = flashchips; chip->name != NULL; chip++) {
/* Don't print generic entries. */
@@ -242,6 +242,12 @@
msg_ginfo("-");
else
msg_ginfo(" ");
+ if (chip->tested.wp == OK)
+ msg_ginfo("B");
+ else if (chip->tested.wp == NA)
+ msg_ginfo("-");
+ else
+ msg_ginfo(" ");
for (i = 0; i < border; i++)
msg_ginfo(" ");
@@ -261,6 +267,10 @@
msg_ginfo("W");
else
msg_ginfo(" ");
+ if (chip->tested.wp == BAD)
+ msg_ginfo("B");
+ else
+ msg_ginfo(" ");
for (i = 0; i < border + 1; i++)
msg_ginfo(" ");
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Change subject: flashchips: Add Support for XMC XM25QH16C/XM25QH16D
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/83182/comment/3e1eaaaf_3f312088?us… :
PS2, Line 21935: .voltage = {2700, 3600},
I wanted to ask, why you set minimum voltage as 2.7 , I saw in datasheet it says `Full voltage range: 2.3-3.6V` ? Is there a reason you set 2.7 and not 2.3 ?
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Change subject: flashchips: Add Support for XMC XM25QU80B
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Patch Set 2: Code-Review+2
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Change subject: flashchips: Add Support for XMC XM25QH16C/XM25QH16D
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> I added comments to your other patch CB:83180 , comments about indentation and commit message apply […]
Done
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Ssunk has posted comments on this change by Ssunk. ( https://review.coreboot.org/c/flashrom/+/83180?usp=email )
Change subject: flashchips: Add Support for XMC XM25QU80B
......................................................................
Patch Set 2:
(5 comments)
Patchset:
PS2:
> Hi Kan, you uploaded new patchset and seems like all comments are resolved, but you haven't marked t […]
Got it.
Commit Message:
https://review.coreboot.org/c/flashrom/+/83180/comment/7d35598d_bb078cef?us… :
PS1, Line 6:
: Add Support for XMC XM25QU80B
> Prefix with `flashchips: ` so that it's easier to go through the list of commits. […]
Done
https://review.coreboot.org/c/flashrom/+/83180/comment/774b7c3d_37c9feda?us… :
PS1, Line 11:
> For adding chip model support, we add in commit message testing info: which programmer you were usin […]
Done
File include/flashchips.h:
https://review.coreboot.org/c/flashrom/+/83180/comment/4588b0ff_03095d61?us… :
PS1, Line 856: #define XMC_XM25QU80B 0x5014
> Let's move the line up, put it on #850, after XMC_XM25QU64C. […]
Done
https://review.coreboot.org/c/flashrom/+/83180/comment/5c0fc149_5a69fd5e?us… :
PS1, Line 856: 0x5014
> The ID needs to be aligned with the others (see like other IDs all aligned in a column), so you need […]
Done
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