June 2024 - flashrom-gerrit - mail.coreboot.org

[XS] Change in flashrom[main]: dummyflasher: assign address of function for LLVM
by Fabian Groffen (Code Review) June 28, 2024

June 28, 2024

Fabian Groffen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83262?usp=email ) Change subject: dummyflasher: assign address of function for LLVM ...................................................................... dummyflasher: assign address of function for LLVM ../flashrom-v1.3.0/dummyflasher.c:933:18: error: incompatible function pointer types initializing 'bool (*)(const struct flashrom_flashctx *, uint8_t)' (aka 'bool (*)(const struct flashrom_flashctx *, unsigned char)') with an expression of type 'bool (struct flashrom_flashctx *, uint8_t)' (aka 'bool (struct flashrom_flashctx *, unsigned char)') [-Wincompatible-function-pointer-types] https://bugs.gentoo.org/915617 Change-Id: I8e5c9ea014d40a2e9e0621b25f8c404e80a79952 Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> --- M dummyflasher.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/83262/1 diff --git a/dummyflasher.c b/dummyflasher.c index cf4ca03..cbf1e49 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -969,7 +969,7 @@ .read = default_spi_read, .write_256 = dummy_spi_write_256, .shutdown = dummy_shutdown, - .probe_opcode = dummy_spi_probe_opcode, + .probe_opcode = &dummy_spi_probe_opcode, .delay = dummy_nop_delay, }; -- To view, visit https://review.coreboot.org/c/flashrom/+/83262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I8e5c9ea014d40a2e9e0621b25f8c404e80a79952 Gerrit-Change-Number: 83262 Gerrit-PatchSet: 1 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>

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[XS] Change in flashrom[main]: libflashrom.map: remove non-existant functions
by Fabian Groffen (Code Review) June 28, 2024

June 28, 2024

Fabian Groffen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83261?usp=email ) Change subject: libflashrom.map: remove non-existant functions ...................................................................... libflashrom.map: remove non-existant functions Remove symbol names from the map that do not exist in the code. https://bugs.gentoo.org/928955 Change-Id: I30bab842d9cbd2daaa9902fd3223f47145cb0e7f Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> --- M libflashrom.map 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/61/83261/1 diff --git a/libflashrom.map b/libflashrom.map index 77abf72..e1cdfa6 100644 --- a/libflashrom.map +++ b/libflashrom.map @@ -1,7 +1,5 @@ LIBFLASHROM_1.0 { global: - flashrom_board_info; - flashrom_chipset_info; flashrom_data_free; flashrom_flag_get; flashrom_flag_set; @@ -9,7 +7,6 @@ flashrom_flash_getsize; flashrom_flash_probe; flashrom_flash_release; - flashrom_flashchip_info; flashrom_image_read; flashrom_image_verify; flashrom_image_write; -- To view, visit https://review.coreboot.org/c/flashrom/+/83261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I30bab842d9cbd2daaa9902fd3223f47145cb0e7f Gerrit-Change-Number: 83261 Gerrit-PatchSet: 1 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>

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[S] Change in flashrom[main]: how_to_add_new_chip: Add a section for feature bits and WRSR handling
by Hsuan-ting Chen (Code Review) June 28, 2024

June 28, 2024

Attention is currently required from: Anastasia Klimchuk, Thomas Heijligen. Hsuan-ting Chen has posted comments on this change by Hsuan-ting Chen. ( https://review.coreboot.org/c/flashrom/+/82908?usp=email ) Change subject: how_to_add_new_chip: Add a section for feature bits and WRSR handling ...................................................................... Patch Set 2: (10 comments) Patchset: PS2: Thanks for the suggestions! File doc/contrib_howtos/how_to_add_new_chip.rst: https://review.coreboot.org/c/flashrom/+/82908/comment/0085c63d_1e94e19b?us… : PS1, Line 105: Feature Bits : ------------- > This can be on the same level as "Properties", especially because you have future plans to gradually […] Done https://review.coreboot.org/c/flashrom/+/82908/comment/57b8609c_1770d64c?us… : PS1, Line 108: The ``.feature_bits`` field in a chip definition encodes various features using a bitmask. : Here are some of the selected feature bits that need to be highlighted: > With this, we don't need an item in a list inside Properties. […] Done https://review.coreboot.org/c/flashrom/+/82908/comment/1a3333b7_a079cd5e?us… : PS1, Line 111: Write-Status-Register (WRSR) Handling : ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > This header also goes on level up, use `-` Done https://review.coreboot.org/c/flashrom/+/82908/comment/c2b4d574_a09e6bf8?us… : PS1, Line 113: : ``FEATURE_WRSR_EWSR``, ``FEATURE_WRSR_WREN``, and ``FEATURE_WRSR_EITHER``. These bits used for **SPI only**. > I think this sentence is not needed. […] Done AFAIK it should be SPI only. Move the "SPI only" hints into the next section instead. https://review.coreboot.org/c/flashrom/+/82908/comment/98d08826_969aedc1?us… : PS1, Line 120: This > Delete "This", start with "Indicates that" Done I noticed that it actually doesn't jump to a newline after EWSR, e.g. ``` FEATURE_WRSR_EWSR indicates that we need an Enable-Write-Status-Register (EWSR) instruction which opens the status register for the immediately-followed next WRSR instruction. Usually, the opcode is 0x50. ``` So I used the "indicates" with lowercase and remove the ":" https://review.coreboot.org/c/flashrom/+/82908/comment/c85d39c7_8982b7d3?us… : PS1, Line 124: This > same Done https://review.coreboot.org/c/flashrom/+/82908/comment/74fae8b8_7f28dc8b?us… : PS1, Line 125: priort > typo, prior Done https://review.coreboot.org/c/flashrom/+/82908/comment/cef552ed_32a04ace?us… : PS1, Line 128: This > same Done https://review.coreboot.org/c/flashrom/+/82908/comment/09a6fb9b_ea72a571?us… : PS1, Line 110: : Write-Status-Register (WRSR) Handling : ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ : : ``FEATURE_WRSR_EWSR``, ``FEATURE_WRSR_WREN``, and ``FEATURE_WRSR_EITHER``. These bits used for **SPI only**. : : The Write Status Register (WRSR) is used to configure various settings within the flash chip, including write protection and : other features. The way WRSR is accessed varies between SPI flash chips, leading to the need for these feature bits. : : * ``FEATURE_WRSR_EWSR``: : This indicates that we need an **Enable-Write-Status-Register** (EWSR) instruction which opens the status register for the : immediately-followed next WRSR instruction. Usually, the opcode is **0x50**. : : * ``FEATURE_WRSR_WREN``: : This indicates that we need an **Write-Enable** (WREN) instruction to set the Write Enable Latch (WEL) bit. The WEL bit : must be set priort to every WRSR command. Usually, the opcode is **0x06**. : : * ``FEATURE_WRSR_EITHER``: : This indicates that either EWSR or WREN is supported in this chip. > Thank you for explaining! It's really good that I know your future plans. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/82908?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I34c20933a375380c8702f79ac637595cd3466000 Gerrit-Change-Number: 82908 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 28 Jun 2024 10:12:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hsuan-ting Chen <roccochen(a)google.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[S] Change in flashrom[main]: how_to_add_new_chip: Add a section for feature bits and WRSR handling
by Hsuan-ting Chen (Code Review) June 28, 2024

June 28, 2024

Attention is currently required from: Hsuan-ting Chen, Thomas Heijligen. Hello Anastasia Klimchuk, Hsuan Ting Chen, Thomas Heijligen, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/82908?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: how_to_add_new_chip: Add a section for feature bits and WRSR handling ...................................................................... how_to_add_new_chip: Add a section for feature bits and WRSR handling Feature bits are too complicated to understand if we only read the codes/datasheets. Add a new section in how_to_add_new_chip to add more details about each feature bits. Add the detailed explanation for WRSR handling first. If this new section looks good, I'll try to add some more sections in further commits. BUG=b:345154585 TEST=meson compile -C builddir and view the doc. Change-Id: I34c20933a375380c8702f79ac637595cd3466000 Signed-off-by: Hsuan Ting Chen <roccochen(a)chromium.org> --- M doc/contrib_howtos/how_to_add_new_chip.rst 1 file changed, 25 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/82908/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/82908?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I34c20933a375380c8702f79ac637595cd3466000 Gerrit-Change-Number: 82908 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de>

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[M] Change in flashrom[main]: flashchips: Add chip models GD25LB256F/GD25LR256F
by Victor Lim (Code Review) June 28, 2024

June 28, 2024

Victor Lim has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83254?usp=email ) Change subject: flashchips: Add chip models GD25LB256F/GD25LR256F ...................................................................... flashchips: Add chip models GD25LB256F/GD25LR256F GD25LB256F: 1.8V 256Mbit https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-0… GD25LR256F: 1.8V 256Mbit with RPMC. https://www.gigadevice.com/message-board?cid=39&id=3171&file_type=Datasheet… Tested Erase, write, read, and protection. Change-Id: I0fbd270a57999d4131816c48470588bb7ec22d37 Signed-off-by: Victor <vlim(a)gigadevice.com> --- M flashchips.c 1 file changed, 57 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/83254/1 diff --git a/flashchips.c b/flashchips.c index aa16c50..b6110de 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6953,6 +6953,63 @@ }, { + .vendor = "GigaDevice", + .name = "GD25LB256F/GD25LR256F", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ255E, + .total_size = 32768, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_4BA, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = SPI_BLOCK_ERASE_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_5C, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_DC, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2000}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 0, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, /* BP4 */ + .cmp = {STATUS2, 6, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, + }, + + { .vendor = "GigaDevice", .name = "GD25LR512ME", .bustype = BUS_SPI, -- To view, visit https://review.coreboot.org/c/flashrom/+/83254?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I0fbd270a57999d4131816c48470588bb7ec22d37 Gerrit-Change-Number: 83254 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com>

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[XS] Change in flashrom[main]: VERSION: Update version to 1.4.0-rc1
by Anastasia Klimchuk (Code Review) June 28, 2024

June 28, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83227?usp=email ) Change subject: VERSION: Update version to 1.4.0-rc1 ...................................................................... VERSION: Update version to 1.4.0-rc1 Change-Id: I013a35de898cbd5c09d254baccb3d644c1def2a0 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83227 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M VERSION 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Peter Marheine: Looks good to me, approved diff --git a/VERSION b/VERSION index 90e4bc2..3280933 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -1.4.0-devel +1.4.0-rc1 -- To view, visit https://review.coreboot.org/c/flashrom/+/83227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I013a35de898cbd5c09d254baccb3d644c1def2a0 Gerrit-Change-Number: 83227 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in flashrom[main]: VERSION: Update version to 1.4.0-rc1
by Peter Marheine (Code Review) June 28, 2024

June 28, 2024

Attention is currently required from: Anastasia Klimchuk. Peter Marheine has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83227?usp=email ) Change subject: VERSION: Update version to 1.4.0-rc1 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/83227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I013a35de898cbd5c09d254baccb3d644c1def2a0 Gerrit-Change-Number: 83227 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 28 Jun 2024 00:00:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in flashrom[main]: VERSION: Update version to 1.4.0-rc1
by Anastasia Klimchuk (Code Review) June 27, 2024

June 27, 2024

Attention is currently required from: Peter Marheine. Anastasia Klimchuk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83227?usp=email ) Change subject: VERSION: Update version to 1.4.0-rc1 ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Note: finish and submit CB:83182 before this one Done -- To view, visit https://review.coreboot.org/c/flashrom/+/83227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I013a35de898cbd5c09d254baccb3d644c1def2a0 Gerrit-Change-Number: 83227 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Thu, 27 Jun 2024 23:19:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[S] Change in flashrom[main]: flashchips: Add Support for XMC XM25QH16C/XM25QH16D
by Anastasia Klimchuk (Code Review) June 27, 2024

June 27, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83182?usp=email ) Change subject: flashchips: Add Support for XMC XM25QH16C/XM25QH16D ...................................................................... flashchips: Add Support for XMC XM25QH16C/XM25QH16D Add initial support for the SPI flash chip XM25QH16C/XM25QH16D Datasheet link: https://www.xmcwh.com/uploads/798/XM25QH16C_Ver1.8.pdf Tested with ch341a programmer: probe, read, write, erase Change-Id: I215084ed33ca9261f6c7b91ef868ca8db85e61ad Signed-off-by: Kan Sun <ssunkkan(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83182 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flashchips.c M include/flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flashchips.c b/flashchips.c index aa16c50..1a7954c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -21937,6 +21937,44 @@ { .vendor = "XMC", + .name = "XM25QH16C/XM25QH16D", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = XMC_XM25QH16C, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, + .unlock = SPI_DISABLE_BLOCKPROTECT, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + }, + + { + .vendor = "XMC", .name = "XM25QH64C", .bustype = BUS_SPI, .manufacture_id = ST_ID, diff --git a/include/flashchips.h b/include/flashchips.h index d0c1aff..a43a0f9 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -848,6 +848,7 @@ #define XMC_XM25QH64C 0x4017 #define XMC_XM25QU64C 0x4117 #define XMC_XM25QU80B 0x5014 +#define XMC_XM25QH16C 0x4015 /* Same as XM25QH16D */ #define XMC_XM25QH128A 0x7018 #define XMC_XM25QH128C 0x4018 #define XMC_XM25QU128C 0x4118 -- To view, visit https://review.coreboot.org/c/flashrom/+/83182?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I215084ed33ca9261f6c7b91ef868ca8db85e61ad Gerrit-Change-Number: 83182 Gerrit-PatchSet: 4 Gerrit-Owner: Ssunk <ssunkkan(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in flashrom[main]: flashchips: Add Support for XMC XM25QH16C/XM25QH16D
by Anastasia Klimchuk (Code Review) June 27, 2024

June 27, 2024

Attention is currently required from: Nikolai Artemiev, Ssunk, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change by Ssunk. ( https://review.coreboot.org/c/flashrom/+/83182?usp=email ) Change subject: flashchips: Add Support for XMC XM25QH16C/XM25QH16D ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/83182?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I215084ed33ca9261f6c7b91ef868ca8db85e61ad Gerrit-Change-Number: 83182 Gerrit-PatchSet: 3 Gerrit-Owner: Ssunk <ssunkkan(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Ssunk <ssunkkan(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Thu, 27 Jun 2024 21:16:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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