July 2021 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3
by Sophie van Soest (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Sophie van Soest. Hello build bot (Jenkins), Daniel Maslowski, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/56055 to look at the new patch set (#3). Change subject: Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3 ...................................................................... Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3 Add missing address: 0x8620 for the it97 to use the parameter dualbootbios. Marked Z97 as OK. Dumped and verified both bios. Signed-off-by: Sophie van Soest <sophie(a)entropie.rocks> Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc --- M chipset_enable.c M it87spi.c 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/56055/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/56055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc Gerrit-Change-Number: 56055 Gerrit-PatchSet: 3 Gerrit-Owner: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3
by Sophie van Soest (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Sophie van Soest. Hello build bot (Jenkins), Daniel Maslowski, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/56055 to look at the new patch set (#2). Change subject: Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3 ...................................................................... Enable chipset it97spi: 0x8620 Gigabyte-Z97-HD3 Added missing address: 0x8620 for the it97 to use the parameter dualbootbios. Marked Z97 as OK. Dumped and verified both bios. Signed-off-by: Sophie van Soest <sophie(a)entropie.rocks> Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc --- M chipset_enable.c M it87spi.c 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/56055/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/56055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc Gerrit-Change-Number: 56055 Gerrit-PatchSet: 2 Gerrit-Owner: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: flashrom.8: Add Anastasia to authors list
by Paul Menzel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Edward O'Callaghan. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56028 ) Change subject: flashrom.8: Add Anastasia to authors list ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/56028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib1ede56e2446833f7dc9acacdb0f26ed822bc7a4 Gerrit-Change-Number: 56028 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Sat, 03 Jul 2021 15:59:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3
by Paul Menzel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Sophie van Soest. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56055 ) Change subject: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3 ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/56055/comment/174c6a28_a3eb30f5 PS1, Line 7: Enabled Enable https://review.coreboot.org/c/flashrom/+/56055/comment/22ad49bd_8bce9195 PS1, Line 9: Added missing address: 0x8620 for the it97 to use the parameter dualbootbios. : Marked Z97 as OK. : : Dumped and verified both bios. Nit: I’d use present tense. -- To view, visit https://review.coreboot.org/c/flashrom/+/56055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc Gerrit-Change-Number: 56055 Gerrit-PatchSet: 1 Gerrit-Owner: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Comment-Date: Sat, 03 Jul 2021 15:58:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3
by Daniel Maslowski (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Sophie van Soest. Daniel Maslowski has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56055 ) Change subject: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3 ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Looks good to me! 😊 -- To view, visit https://review.coreboot.org/c/flashrom/+/56055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc Gerrit-Change-Number: 56055 Gerrit-PatchSet: 1 Gerrit-Owner: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sophie van Soest <sophie(a)entropie.rocks> Gerrit-Comment-Date: Sat, 03 Jul 2021 14:36:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3
by Sophie van Soest (Code Review) 03 Jul '21

03 Jul '21

Sophie van Soest has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/56055 ) Change subject: Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3 ...................................................................... Enabled Chipset it97spi: 0x8620 Gigabyte-Z97-HD3 Added missing address: 0x8620 for the it97 to use the parameter dualbootbios. Marked Z97 as OK. Dumped and verified both bios. Signed-off-by: Sophie van Soest <sophie(a)entropie.rocks> Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc --- M chipset_enable.c M it87spi.c 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/56055/1 diff --git a/chipset_enable.c b/chipset_enable.c index cdd51ae..2540692 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1969,7 +1969,7 @@ {0x8086, 0x8cc1, B_FS, NT, "Intel", "9 Series", enable_flash_pch9}, {0x8086, 0x8cc2, B_FS, NT, "Intel", "9 Series Engineering Sample", enable_flash_pch9}, {0x8086, 0x8cc3, B_FS, NT, "Intel", "9 Series", enable_flash_pch9}, - {0x8086, 0x8cc4, B_FS, NT, "Intel", "Z97", enable_flash_pch9}, + {0x8086, 0x8cc4, B_FS, OK, "Intel", "Z97", enable_flash_pch9}, {0x8086, 0x8cc6, B_FS, NT, "Intel", "H97", enable_flash_pch9}, {0x8086, 0x8d40, B_FS, NT, "Intel", "C610/X99 (Wellsburg)", enable_flash_pch8_wb}, {0x8086, 0x8d41, B_FS, NT, "Intel", "C610/X99 (Wellsburg)", enable_flash_pch8_wb}, diff --git a/it87spi.c b/it87spi.c index cbf830b..8490bdd 100644 --- a/it87spi.c +++ b/it87spi.c @@ -454,6 +454,7 @@ case 0x8705: ret |= it8705f_write_enable(superios[i].port); break; + case 0x8620: case 0x8716: case 0x8718: case 0x8720: -- To view, visit https://review.coreboot.org/c/flashrom/+/56055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0be9effe4a2f1f9699e016c7fc45018c9c522cbc Gerrit-Change-Number: 56055 Gerrit-PatchSet: 1 Gerrit-Owner: Sophie van Soest Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add MX25L12873F
by Angel Pons (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56054 ) Change subject: flashchips: Add MX25L12873F ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/56054 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I59c8067f15b5ceac5a2e2f8fe93431a465f17e23 Gerrit-Change-Number: 56054 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sat, 03 Jul 2021 12:02:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flashchips: Add MX25L12873F
by Nico Huber (Code Review) 03 Jul '21

03 Jul '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/56054 ) Change subject: flashchips: Add MX25L12873F ...................................................................... flashchips: Add MX25L12873F Just add the name to the existing entry, as usual it is supposed to be compatible. Change-Id: I59c8067f15b5ceac5a2e2f8fe93431a465f17e23 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M flashchips.c M flashchips.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/56054/1 diff --git a/flashchips.c b/flashchips.c index 6310c12..8cd3dfd 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8359,7 +8359,7 @@ { .vendor = "Macronix", - .name = "MX25L12835F/MX25L12845E/MX25L12865E", + .name = "MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L12805D, diff --git a/flashchips.h b/flashchips.h index dd985a7..249e7b4 100644 --- a/flashchips.h +++ b/flashchips.h @@ -506,7 +506,7 @@ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3233F/MX25L3273E (4k 0x20, 32k 0x52) */ #define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */ -#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E (32k 0x52) */ +#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E, MX25L12873F (32k 0x52) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ -- To view, visit https://review.coreboot.org/c/flashrom/+/56054 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I59c8067f15b5ceac5a2e2f8fe93431a465f17e23 Gerrit-Change-Number: 56054 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
by Michael Niewöhner (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Felix Singer, Nico Huber, Michał Żygowski, Paul Menzel, Angel Pons. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/55715 ) Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops ...................................................................... Patch Set 10: (1 comment) File ite_ec.c: https://review.coreboot.org/c/flashrom/+/55715/comment/31f4833d_11f15376 PS10, Line 585: p = extract_programmer_param("portpair"); : if (p) { : if (!strcmp(p, "0")) { : ctx_data->control_port = 0x64; : ctx_data->data_port = 0x60; : } else if (!strcmp(p, "1")) { : ctx_data->control_port = 0x66; : ctx_data->data_port = 0x62; : } else if (!strcmp(p, "2")) { : ctx_data->control_port = 0x6c; : ctx_data->data_port = 0x68; : } else if (!strcmp(p, "3")) { : ctx_data->control_port = 0x6e; : ctx_data->data_port = 0x6a; : } else { : msg_pdbg("%s(): incorrect portpair param value: %s\n", : __func__, p); : ret = false; : } : } : free(p); : I found out, why the reference implementation first communicates through 62/66 and then switches to a different port pair: Getting the EC fw info like version, project id and so on is done through 62/66 because this is the port pair used for EC fw communication at runtime. This pair is even hardcoded in the vendor UEFI fw. When issuing any flash command, the EC fw disables all interrupts, copies the flash function(s) to scratch ROM in XRAM and jumps there. What port pair is used by the flash functions is specific to the OEM. Some use 60/64 (KBC) like Clevo. Others use different pairs, e.g. Lenovo uses 68/6C or 62/66 in various fw implementations or even have implemented both (Yoga C740 for example). Since uECFlash is vendor-independent and comes from ITE directly, they probably added that option to support them all. -- To view, visit https://review.coreboot.org/c/flashrom/+/55715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0e42260155ffea38a6f60790871cd8da7b657031 Gerrit-Change-Number: 55715 Gerrit-PatchSet: 10 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 03 Jul 2021 11:17:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: flashrom.8: Add Anastasia to authors list
by Angel Pons (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Edward O'Callaghan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56028 ) Change subject: flashrom.8: Add Anastasia to authors list ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: > Angel and Nico are not in this list?? I didn't know of its existence until this patch 😄 -- To view, visit https://review.coreboot.org/c/flashrom/+/56028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib1ede56e2446833f7dc9acacdb0f26ed822bc7a4 Gerrit-Change-Number: 56028 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Sat, 03 Jul 2021 10:25:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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flashrom-gerrit July 2021