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Change subject: bitbang_spi.c: fix spi sequence in time and rename
......................................................................
Patch Set 16:
(1 comment)
Patchset:
PS16:
It is necessary to add mode support, but there is an error in this interface. The bug of this interface existed before, and this interface was not added by me. This patch is almost half a year old, and I feel very tired if you do it like this. Whoever wants to do it. Angel Pons already has a copy of this patch, you can go over there to review
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Change subject: flashchips: add support for Winbond W25Q01JV
......................................................................
Patch Set 4:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/54968/comment/9f40060d_f00fed1b
PS1, Line 17757: /* Full chip erase is fastest, typically takes 200s */
> > > Well, maybe there is one low-hanging fruit: For the erase commandline […]
I'd be happy with just a flag that reverses the order, since I think we'd want it for normal writes too? When flashing new BIOS images, there's often overlap with what's written currently, so using smaller erasers can be an optimization (you can skip erasing/writing), but in this particular chip's case, that still results in very long flash times (almost an hour), compared to a full erase (2 min).
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Change subject: bitbang_spi.c: fix spi sequence in time and rename
......................................................................
Patch Set 16: Code-Review-2
(1 comment)
Patchset:
PS16:
> SCK and MOSI should be changed at once and some bitbang programmers […]
Definitely.
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Change subject: bitbang_spi.c: fix spi sequence in time and rename
......................................................................
Patch Set 16: -Code-Review
(1 comment)
Patchset:
PS16:
I noticed bits of this are in a long discussion in https://review.coreboot.org/c/flashrom/+/49255/28
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 25: -Code-Review
(1 comment)
Patchset:
PS25:
> Also CB:49264
I do now thanks for pointing it out! The patch stream is a bit confused and hard to following coming back to it.
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Change subject: buspirate_spi.c: Refactor singleton states into reentrant pattern
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
File buspirate_spi.c:
https://review.coreboot.org/c/flashrom/+/52958/comment/af0b0ab4_862f1979
PS4, Line 315: int buspirate_spi_init(void)
> I agree it is large. Also I agree this is out of scope for this commit. […]
It's ok. I mean if you get time please follow up splitting the function up please as I think it will unroll out all the clean up path complexity.
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 25: Code-Review-1
(1 comment)
Patchset:
PS25:
> Edward, have you seen Nico's comments on CB:49255 yet?
Also CB:49264
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 25:
(1 comment)
Patchset:
PS25:
Edward, have you seen Nico's comments on CB:49255 yet?
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Change subject: bitbang_spi.c: fix spi sequence in time and rename
......................................................................
Patch Set 16: Code-Review-1
(1 comment)
Patchset:
PS16:
SCK and MOSI should be changed at once and some bitbang programmers
do so. We must not rely on the order. This change is only necessary
to cover up the bugs introduced in the previous commit.
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